Lines Matching refs:smull_operand
1081 InstructionOperand const smull_operand = g.TempRegister(); in VisitWord32Shr() local
1082 Emit(kArm64Umull, smull_operand, g.UseRegister(left->InputAt(0)), in VisitWord32Shr()
1084 Emit(kArm64Lsr, g.DefineAsRegister(node), smull_operand, in VisitWord32Shr()
1132 InstructionOperand const smull_operand = g.TempRegister(); in VisitWord32Sar() local
1133 Emit(kArm64Smull, smull_operand, g.UseRegister(left->InputAt(0)), in VisitWord32Sar()
1135 Emit(kArm64Asr, g.DefineAsRegister(node), smull_operand, in VisitWord32Sar()
1153 InstructionOperand const smull_operand = g.TempRegister(); in VisitWord32Sar() local
1154 Emit(kArm64Smull, smull_operand, g.UseRegister(mul_node->InputAt(0)), in VisitWord32Sar()
1159 add_operand, g.UseRegister(add_node->InputAt(1)), smull_operand, in VisitWord32Sar()
1491 InstructionOperand const smull_operand = g.TempRegister(); in VisitInt32MulHigh() local
1492 Emit(kArm64Smull, smull_operand, g.UseRegister(node->InputAt(0)), in VisitInt32MulHigh()
1494 Emit(kArm64Asr, g.DefineAsRegister(node), smull_operand, g.TempImmediate(32)); in VisitInt32MulHigh()
1500 InstructionOperand const smull_operand = g.TempRegister(); in VisitUint32MulHigh() local
1501 Emit(kArm64Umull, smull_operand, g.UseRegister(node->InputAt(0)), in VisitUint32MulHigh()
1503 Emit(kArm64Lsr, g.DefineAsRegister(node), smull_operand, g.TempImmediate(32)); in VisitUint32MulHigh()