Lines Matching refs:InputOperand
37 Operand InputOperand(size_t index, int extra = 0) { in InputOperand() function in v8::internal::compiler::IA32OperandConverter
330 gen->tasm()->mov(kSpeculationPoisonRegister, i.InputOperand(poison_index)); in MoveOperandIfAliasedWithPoisonRegister()
362 __ asm_instr(i.InputOperand(0), i.InputImmediate(1)); \
368 __ asm_instr(i.InputRegister(0), i.InputOperand(1)); \
411 __ asm_instr(i.InputOperand(0), i.InputImmediate(1)); \
413 __ asm_instr(i.InputRegister(0), i.InputOperand(1)); \
454 __ mov_instr(i.OutputRegister(), i.InputOperand(0)); \
461 Operand src1 = i.InputOperand(instr->InputCount() == 2 ? 1 : 0); \
475 i.InputOperand(1), imm); \
479 __ opcode(i.OutputSimd128Register(), i.InputOperand(1), imm); \
1033 __ imul(i.OutputRegister(), i.InputOperand(0), i.InputInt32(1)); in AssembleArchInstruction()
1035 __ imul(i.OutputRegister(), i.InputOperand(1)); in AssembleArchInstruction()
1046 __ idiv(i.InputOperand(1)); in AssembleArchInstruction()
1050 __ div(i.InputOperand(1)); in AssembleArchInstruction()
1139 __ imul(i.OutputRegister(1), i.InputOperand(0)); in AssembleArchInstruction()
1140 __ mov(i.TempRegister(0), i.InputOperand(1)); in AssembleArchInstruction()
1141 __ imul(i.TempRegister(0), i.InputOperand(2)); in AssembleArchInstruction()
1143 __ mov(i.OutputRegister(0), i.InputOperand(0)); in AssembleArchInstruction()
1182 __ Lzcnt(i.OutputRegister(), i.InputOperand(0)); in AssembleArchInstruction()
1185 __ Tzcnt(i.OutputRegister(), i.InputOperand(0)); in AssembleArchInstruction()
1188 __ Popcnt(i.OutputRegister(), i.InputOperand(0)); in AssembleArchInstruction()
1201 __ ucomiss(i.InputDoubleRegister(0), i.InputOperand(1)); in AssembleArchInstruction()
1204 __ addss(i.InputDoubleRegister(0), i.InputOperand(1)); in AssembleArchInstruction()
1207 __ subss(i.InputDoubleRegister(0), i.InputOperand(1)); in AssembleArchInstruction()
1210 __ mulss(i.InputDoubleRegister(0), i.InputOperand(1)); in AssembleArchInstruction()
1213 __ divss(i.InputDoubleRegister(0), i.InputOperand(1)); in AssembleArchInstruction()
1219 __ sqrtss(i.OutputDoubleRegister(), i.InputOperand(0)); in AssembleArchInstruction()
1243 __ ucomisd(i.InputDoubleRegister(0), i.InputOperand(1)); in AssembleArchInstruction()
1246 __ addsd(i.InputDoubleRegister(0), i.InputOperand(1)); in AssembleArchInstruction()
1249 __ subsd(i.InputDoubleRegister(0), i.InputOperand(1)); in AssembleArchInstruction()
1252 __ mulsd(i.InputDoubleRegister(0), i.InputOperand(1)); in AssembleArchInstruction()
1255 __ divsd(i.InputDoubleRegister(0), i.InputOperand(1)); in AssembleArchInstruction()
1265 __ ucomiss(i.InputDoubleRegister(0), i.InputOperand(1)); in AssembleArchInstruction()
1279 __ movss(i.InputDoubleRegister(0), i.InputOperand(1)); in AssembleArchInstruction()
1291 __ ucomisd(i.InputDoubleRegister(0), i.InputOperand(1)); in AssembleArchInstruction()
1305 __ movsd(i.InputDoubleRegister(0), i.InputOperand(1)); in AssembleArchInstruction()
1316 __ ucomiss(i.InputDoubleRegister(0), i.InputOperand(1)); in AssembleArchInstruction()
1326 __ movss(kScratchDoubleReg, i.InputOperand(1)); in AssembleArchInstruction()
1335 __ movss(i.InputDoubleRegister(0), i.InputOperand(1)); in AssembleArchInstruction()
1346 __ ucomisd(i.InputDoubleRegister(0), i.InputOperand(1)); in AssembleArchInstruction()
1356 __ movsd(kScratchDoubleReg, i.InputOperand(1)); in AssembleArchInstruction()
1365 __ movsd(i.InputDoubleRegister(0), i.InputOperand(1)); in AssembleArchInstruction()
1411 __ sqrtsd(i.OutputDoubleRegister(), i.InputOperand(0)); in AssembleArchInstruction()
1421 __ cvtss2sd(i.OutputDoubleRegister(), i.InputOperand(0)); in AssembleArchInstruction()
1424 __ cvtsd2ss(i.OutputDoubleRegister(), i.InputOperand(0)); in AssembleArchInstruction()
1427 __ cvttss2si(i.OutputRegister(), i.InputOperand(0)); in AssembleArchInstruction()
1430 __ Cvttss2ui(i.OutputRegister(), i.InputOperand(0), kScratchDoubleReg); in AssembleArchInstruction()
1433 __ cvttsd2si(i.OutputRegister(), i.InputOperand(0)); in AssembleArchInstruction()
1436 __ Cvttsd2ui(i.OutputRegister(), i.InputOperand(0), kScratchDoubleReg); in AssembleArchInstruction()
1439 __ cvtsi2ss(i.OutputDoubleRegister(), i.InputOperand(0)); in AssembleArchInstruction()
1442 __ Cvtui2ss(i.OutputDoubleRegister(), i.InputOperand(0), in AssembleArchInstruction()
1446 __ cvtsi2sd(i.OutputDoubleRegister(), i.InputOperand(0)); in AssembleArchInstruction()
1449 __ Cvtui2sd(i.OutputDoubleRegister(), i.InputOperand(0)); in AssembleArchInstruction()
1453 __ mov(i.OutputRegister(), i.InputOperand(0)); in AssembleArchInstruction()
1460 __ mov(i.OutputRegister(), i.InputOperand(0, kDoubleSize / 2)); in AssembleArchInstruction()
1466 __ Pinsrd(i.OutputDoubleRegister(), i.InputOperand(1), 0, true); in AssembleArchInstruction()
1469 __ Pinsrd(i.OutputDoubleRegister(), i.InputOperand(1), 1, true); in AssembleArchInstruction()
1472 __ movd(i.OutputDoubleRegister(), i.InputOperand(0)); in AssembleArchInstruction()
1477 i.InputOperand(1)); in AssembleArchInstruction()
1483 i.InputOperand(1)); in AssembleArchInstruction()
1489 i.InputOperand(1)); in AssembleArchInstruction()
1495 i.InputOperand(1)); in AssembleArchInstruction()
1504 i.InputOperand(1)); in AssembleArchInstruction()
1510 i.InputOperand(1)); in AssembleArchInstruction()
1516 i.InputOperand(1)); in AssembleArchInstruction()
1522 i.InputOperand(1)); in AssembleArchInstruction()
1533 __ vandps(i.OutputDoubleRegister(), kScratchDoubleReg, i.InputOperand(0)); in AssembleArchInstruction()
1541 __ vxorps(i.OutputDoubleRegister(), kScratchDoubleReg, i.InputOperand(0)); in AssembleArchInstruction()
1549 __ vandpd(i.OutputDoubleRegister(), kScratchDoubleReg, i.InputOperand(0)); in AssembleArchInstruction()
1557 __ vxorpd(i.OutputDoubleRegister(), kScratchDoubleReg, i.InputOperand(0)); in AssembleArchInstruction()
1645 __ mov(i.OutputRegister(), i.InputOperand(0)); in AssembleArchInstruction()
1654 __ movss(i.OutputDoubleRegister(), i.InputOperand(0)); in AssembleArchInstruction()
1706 __ movss(kScratchDoubleReg, i.InputOperand(0)); in AssembleArchInstruction()
1723 __ movsd(kScratchDoubleReg, i.InputOperand(0)); in AssembleArchInstruction()
1734 __ movups(kScratchDoubleReg, i.InputOperand(0)); in AssembleArchInstruction()
1754 __ push(i.InputOperand(0)); in AssembleArchInstruction()
1822 __ insertps(i.OutputSimd128Register(), i.InputOperand(2), in AssembleArchInstruction()
1829 i.InputOperand(2), i.InputInt8(1) << 4); in AssembleArchInstruction()
1833 __ Cvtdq2ps(i.OutputSimd128Register(), i.InputOperand(0)); in AssembleArchInstruction()
1868 Operand src = i.InputOperand(0); in AssembleArchInstruction()
1885 i.InputOperand(0)); in AssembleArchInstruction()
1890 Operand src = i.InputOperand(0); in AssembleArchInstruction()
1907 i.InputOperand(0)); in AssembleArchInstruction()
1911 __ Rcpps(i.OutputSimd128Register(), i.InputOperand(0)); in AssembleArchInstruction()
1915 __ Rsqrtps(i.OutputSimd128Register(), i.InputOperand(0)); in AssembleArchInstruction()
1920 __ addps(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
1926 i.InputOperand(1)); in AssembleArchInstruction()
1932 __ haddps(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
1938 i.InputOperand(1)); in AssembleArchInstruction()
1943 __ subps(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
1949 i.InputOperand(1)); in AssembleArchInstruction()
1954 __ mulps(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
1960 i.InputOperand(1)); in AssembleArchInstruction()
1965 __ minps(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
1971 i.InputOperand(1)); in AssembleArchInstruction()
1976 __ maxps(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
1982 i.InputOperand(1)); in AssembleArchInstruction()
1987 __ cmpeqps(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
1993 i.InputOperand(1)); in AssembleArchInstruction()
1998 __ cmpneqps(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
2004 i.InputOperand(1)); in AssembleArchInstruction()
2009 __ cmpltps(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
2015 i.InputOperand(1)); in AssembleArchInstruction()
2020 __ cmpleps(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
2026 i.InputOperand(1)); in AssembleArchInstruction()
2031 __ Movd(dst, i.InputOperand(0)); in AssembleArchInstruction()
2042 __ pinsrd(i.OutputSimd128Register(), i.InputOperand(2), i.InputInt8(1)); in AssembleArchInstruction()
2048 i.InputOperand(2), i.InputInt8(1)); in AssembleArchInstruction()
2088 __ Pmovsxwd(i.OutputSimd128Register(), i.InputOperand(0)); in AssembleArchInstruction()
2093 __ Palignr(dst, i.InputOperand(0), 8); in AssembleArchInstruction()
2099 Operand src = i.InputOperand(0); in AssembleArchInstruction()
2133 __ paddd(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
2139 i.InputOperand(1)); in AssembleArchInstruction()
2145 __ phaddd(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
2151 i.InputOperand(1)); in AssembleArchInstruction()
2156 __ psubd(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
2162 i.InputOperand(1)); in AssembleArchInstruction()
2168 __ pmulld(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
2174 i.InputOperand(1)); in AssembleArchInstruction()
2180 __ pminsd(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
2186 i.InputOperand(1)); in AssembleArchInstruction()
2192 __ pmaxsd(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
2198 i.InputOperand(1)); in AssembleArchInstruction()
2203 __ pcmpeqd(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
2209 i.InputOperand(1)); in AssembleArchInstruction()
2214 __ pcmpeqd(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
2222 i.InputOperand(1)); in AssembleArchInstruction()
2230 __ pcmpgtd(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
2236 i.InputOperand(1)); in AssembleArchInstruction()
2243 Operand src = i.InputOperand(1); in AssembleArchInstruction()
2251 Operand src2 = i.InputOperand(1); in AssembleArchInstruction()
2312 __ Pmovzxwd(i.OutputSimd128Register(), i.InputOperand(0)); in AssembleArchInstruction()
2317 __ Palignr(dst, i.InputOperand(0), 8); in AssembleArchInstruction()
2335 __ pminud(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
2341 i.InputOperand(1)); in AssembleArchInstruction()
2347 __ pmaxud(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
2353 i.InputOperand(1)); in AssembleArchInstruction()
2360 Operand src = i.InputOperand(1); in AssembleArchInstruction()
2371 Operand src2 = i.InputOperand(1); in AssembleArchInstruction()
2382 Operand src = i.InputOperand(1); in AssembleArchInstruction()
2390 Operand src2 = i.InputOperand(1); in AssembleArchInstruction()
2397 __ Movd(dst, i.InputOperand(0)); in AssembleArchInstruction()
2410 __ pinsrw(i.OutputSimd128Register(), i.InputOperand(2), i.InputInt8(1)); in AssembleArchInstruction()
2416 i.InputOperand(2), i.InputInt8(1)); in AssembleArchInstruction()
2420 __ Pmovsxbw(i.OutputSimd128Register(), i.InputOperand(0)); in AssembleArchInstruction()
2425 __ Palignr(dst, i.InputOperand(0), 8); in AssembleArchInstruction()
2431 Operand src = i.InputOperand(0); in AssembleArchInstruction()
2465 __ packssdw(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
2471 i.InputOperand(1)); in AssembleArchInstruction()
2476 __ paddw(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
2482 i.InputOperand(1)); in AssembleArchInstruction()
2487 __ paddsw(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
2493 i.InputOperand(1)); in AssembleArchInstruction()
2499 __ phaddw(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
2505 i.InputOperand(1)); in AssembleArchInstruction()
2510 __ psubw(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
2516 i.InputOperand(1)); in AssembleArchInstruction()
2521 __ psubsw(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
2527 i.InputOperand(1)); in AssembleArchInstruction()
2532 __ pmullw(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
2538 i.InputOperand(1)); in AssembleArchInstruction()
2543 __ pminsw(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
2549 i.InputOperand(1)); in AssembleArchInstruction()
2554 __ pmaxsw(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
2560 i.InputOperand(1)); in AssembleArchInstruction()
2565 __ pcmpeqw(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
2571 i.InputOperand(1)); in AssembleArchInstruction()
2576 __ pcmpeqw(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
2584 i.InputOperand(1)); in AssembleArchInstruction()
2592 __ pcmpgtw(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
2598 i.InputOperand(1)); in AssembleArchInstruction()
2604 Operand src = i.InputOperand(1); in AssembleArchInstruction()
2612 Operand src2 = i.InputOperand(1); in AssembleArchInstruction()
2618 __ Pmovzxbw(i.OutputSimd128Register(), i.InputOperand(0)); in AssembleArchInstruction()
2623 __ Palignr(dst, i.InputOperand(0), 8); in AssembleArchInstruction()
2646 __ pminud(kScratchDoubleReg, i.InputOperand(1)); in AssembleArchInstruction()
2658 __ vpminud(kScratchDoubleReg, kScratchDoubleReg, i.InputOperand(1)); in AssembleArchInstruction()
2664 __ paddusw(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
2670 i.InputOperand(1)); in AssembleArchInstruction()
2675 __ psubusw(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
2681 i.InputOperand(1)); in AssembleArchInstruction()
2687 __ pminuw(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
2693 i.InputOperand(1)); in AssembleArchInstruction()
2699 __ pmaxuw(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
2705 i.InputOperand(1)); in AssembleArchInstruction()
2712 Operand src = i.InputOperand(1); in AssembleArchInstruction()
2723 Operand src2 = i.InputOperand(1); in AssembleArchInstruction()
2734 Operand src = i.InputOperand(1); in AssembleArchInstruction()
2742 Operand src2 = i.InputOperand(1); in AssembleArchInstruction()
2749 __ Movd(dst, i.InputOperand(0)); in AssembleArchInstruction()
2763 __ pinsrb(i.OutputSimd128Register(), i.InputOperand(2), i.InputInt8(1)); in AssembleArchInstruction()
2769 i.InputOperand(2), i.InputInt8(1)); in AssembleArchInstruction()
2774 __ packsswb(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
2780 i.InputOperand(1)); in AssembleArchInstruction()
2785 Operand src = i.InputOperand(0); in AssembleArchInstruction()
2849 __ paddb(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
2855 i.InputOperand(1)); in AssembleArchInstruction()
2860 __ paddsb(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
2866 i.InputOperand(1)); in AssembleArchInstruction()
2871 __ psubb(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
2877 i.InputOperand(1)); in AssembleArchInstruction()
2882 __ psubsb(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
2888 i.InputOperand(1)); in AssembleArchInstruction()
2973 __ pminsb(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
2979 i.InputOperand(1)); in AssembleArchInstruction()
2985 __ pmaxsb(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
2991 i.InputOperand(1)); in AssembleArchInstruction()
2996 __ pcmpeqb(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
3002 i.InputOperand(1)); in AssembleArchInstruction()
3007 __ pcmpeqb(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
3015 i.InputOperand(1)); in AssembleArchInstruction()
3023 __ pcmpgtb(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
3029 i.InputOperand(1)); in AssembleArchInstruction()
3036 Operand src = i.InputOperand(1); in AssembleArchInstruction()
3044 Operand src2 = i.InputOperand(1); in AssembleArchInstruction()
3057 __ pminuw(kScratchDoubleReg, i.InputOperand(1)); in AssembleArchInstruction()
3069 __ vpminuw(kScratchDoubleReg, kScratchDoubleReg, i.InputOperand(1)); in AssembleArchInstruction()
3075 __ paddusb(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
3081 i.InputOperand(1)); in AssembleArchInstruction()
3086 __ psubusb(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
3092 i.InputOperand(1)); in AssembleArchInstruction()
3110 __ pminub(dst, i.InputOperand(1)); in AssembleArchInstruction()
3116 i.InputOperand(1)); in AssembleArchInstruction()
3121 __ pmaxub(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
3127 i.InputOperand(1)); in AssembleArchInstruction()
3133 Operand src = i.InputOperand(1); in AssembleArchInstruction()
3144 Operand src2 = i.InputOperand(1); in AssembleArchInstruction()
3154 Operand src = i.InputOperand(1); in AssembleArchInstruction()
3162 Operand src2 = i.InputOperand(1); in AssembleArchInstruction()
3174 Operand src = i.InputOperand(0); in AssembleArchInstruction()
3187 __ vpxor(i.OutputSimd128Register(), kScratchDoubleReg, i.InputOperand(0)); in AssembleArchInstruction()
3192 __ pand(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
3198 i.InputOperand(1)); in AssembleArchInstruction()
3203 __ por(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
3209 i.InputOperand(1)); in AssembleArchInstruction()
3214 __ pxor(i.OutputSimd128Register(), i.InputOperand(1)); in AssembleArchInstruction()
3220 i.InputOperand(1)); in AssembleArchInstruction()
3237 i.InputOperand(1)); in AssembleArchInstruction()
3238 __ vandps(dst, kScratchDoubleReg, i.InputOperand(0)); in AssembleArchInstruction()
3244 Operand src0 = i.InputOperand(0); in AssembleArchInstruction()
3269 Operand src1 = i.InputOperand(1); in AssembleArchInstruction()
3288 __ Pshufd(i.OutputSimd128Register(), i.InputOperand(0), i.InputInt8(1)); in AssembleArchInstruction()
3295 __ Pshufd(kScratchDoubleReg, i.InputOperand(1), shuffle); in AssembleArchInstruction()
3296 __ Pshufd(i.OutputSimd128Register(), i.InputOperand(0), shuffle); in AssembleArchInstruction()
3305 __ Pshuflw(dst, i.InputOperand(0), i.InputInt8(1)); in AssembleArchInstruction()
3311 __ Pshuflw(kScratchDoubleReg, i.InputOperand(1), i.InputInt8(2)); in AssembleArchInstruction()
3313 __ Pshuflw(dst, i.InputOperand(0), i.InputInt8(2)); in AssembleArchInstruction()
3323 Operand src = i.InputOperand(0); in AssembleArchInstruction()
3397 __ movups(kScratchDoubleReg, i.InputOperand(1)); in AssembleArchInstruction()
3424 __ pblendw(kScratchDoubleReg, i.InputOperand(1), 0x55); in AssembleArchInstruction()
3437 __ vpblendw(kScratchDoubleReg, kScratchDoubleReg, i.InputOperand(1), in AssembleArchInstruction()
3450 __ movups(kScratchDoubleReg, i.InputOperand(1)); in AssembleArchInstruction()
3475 __ movups(kScratchDoubleReg, i.InputOperand(1)); in AssembleArchInstruction()
3507 __ movups(kScratchDoubleReg, i.InputOperand(1)); in AssembleArchInstruction()
3537 __ movups(kScratchDoubleReg, i.InputOperand(1)); in AssembleArchInstruction()
3587 __ vpshuflw(dst, i.InputOperand(0), shuffle_mask); in AssembleArchInstruction()
3614 Operand src = i.InputOperand(0); in AssembleArchInstruction()