Lines Matching defs:rd
1883 void adc(Register rd, Register rn, const Operand& operand) { in adc()
1886 void adc(Condition cond, Register rd, Register rn, const Operand& operand) { in adc()
1890 Register rd, in adc()
1901 void adcs(Register rd, Register rn, const Operand& operand) { in adcs()
1904 void adcs(Condition cond, Register rd, Register rn, const Operand& operand) { in adcs()
1908 Register rd, in adcs()
1919 void add(Register rd, Register rn, const Operand& operand) { in add()
1922 void add(Condition cond, Register rd, Register rn, const Operand& operand) { in add()
1926 Register rd, in add()
1933 void add(Register rd, const Operand& operand) { add(al, rd, operand); } in add()
1940 void adds(Register rd, Register rn, const Operand& operand) { in adds()
1943 void adds(Condition cond, Register rd, Register rn, const Operand& operand) { in adds()
1947 Register rd, in adds()
1956 void addw(Register rd, Register rn, const Operand& operand) { in addw()
1966 void adr(Register rd, Location* location) { adr(al, Best, rd, location); } in adr()
1967 void adr(Condition cond, Register rd, Location* location) { in adr()
1970 void adr(EncodingSize size, Register rd, Location* location) { in adr()
1979 void and_(Register rd, Register rn, const Operand& operand) { in and_()
1982 void and_(Condition cond, Register rd, Register rn, const Operand& operand) { in and_()
1986 Register rd, in and_()
1997 void ands(Register rd, Register rn, const Operand& operand) { in ands()
2000 void ands(Condition cond, Register rd, Register rn, const Operand& operand) { in ands()
2004 Register rd, in ands()
2015 void asr(Register rd, Register rm, const Operand& operand) { in asr()
2018 void asr(Condition cond, Register rd, Register rm, const Operand& operand) { in asr()
2022 Register rd, in asr()
2033 void asrs(Register rd, Register rm, const Operand& operand) { in asrs()
2036 void asrs(Condition cond, Register rd, Register rm, const Operand& operand) { in asrs()
2040 Register rd, in asrs()
2056 void bfc(Register rd, uint32_t lsb, uint32_t width) { in bfc()
2062 void bfi(Register rd, Register rn, uint32_t lsb, uint32_t width) { in bfi()
2071 void bic(Register rd, Register rn, const Operand& operand) { in bic()
2074 void bic(Condition cond, Register rd, Register rn, const Operand& operand) { in bic()
2078 Register rd, in bic()
2089 void bics(Register rd, Register rn, const Operand& operand) { in bics()
2092 void bics(Condition cond, Register rd, Register rn, const Operand& operand) { in bics()
2096 Register rd, in bics()
2140 void clz(Register rd, Register rm) { clz(al, rd, rm); } in clz()
2167 void crc32b(Register rd, Register rn, Register rm) { crc32b(al, rd, rn, rm); } in crc32b()
2170 void crc32cb(Register rd, Register rn, Register rm) { in crc32cb()
2175 void crc32ch(Register rd, Register rn, Register rm) { in crc32ch()
2180 void crc32cw(Register rd, Register rn, Register rm) { in crc32cw()
2185 void crc32h(Register rd, Register rn, Register rm) { crc32h(al, rd, rn, rm); } in crc32h()
2188 void crc32w(Register rd, Register rn, Register rm) { crc32w(al, rd, rn, rm); } in crc32w()
2201 void eor(Register rd, Register rn, const Operand& operand) { in eor()
2204 void eor(Condition cond, Register rd, Register rn, const Operand& operand) { in eor()
2208 Register rd, in eor()
2219 void eors(Register rd, Register rn, const Operand& operand) { in eors()
2222 void eors(Condition cond, Register rd, Register rn, const Operand& operand) { in eors()
2226 Register rd, in eors()
2551 void lsl(Register rd, Register rm, const Operand& operand) { in lsl()
2554 void lsl(Condition cond, Register rd, Register rm, const Operand& operand) { in lsl()
2558 Register rd, in lsl()
2569 void lsls(Register rd, Register rm, const Operand& operand) { in lsls()
2572 void lsls(Condition cond, Register rd, Register rm, const Operand& operand) { in lsls()
2576 Register rd, in lsls()
2587 void lsr(Register rd, Register rm, const Operand& operand) { in lsr()
2590 void lsr(Condition cond, Register rd, Register rm, const Operand& operand) { in lsr()
2594 Register rd, in lsr()
2605 void lsrs(Register rd, Register rm, const Operand& operand) { in lsrs()
2608 void lsrs(Condition cond, Register rd, Register rm, const Operand& operand) { in lsrs()
2612 Register rd, in lsrs()
2619 void mla(Register rd, Register rn, Register rm, Register ra) { in mla()
2624 void mlas(Register rd, Register rn, Register rm, Register ra) { in mlas()
2629 void mls(Register rd, Register rn, Register rm, Register ra) { in mls()
2637 void mov(Register rd, const Operand& operand) { mov(al, Best, rd, operand); } in mov()
2638 void mov(Condition cond, Register rd, const Operand& operand) { in mov()
2641 void mov(EncodingSize size, Register rd, const Operand& operand) { in mov()
2649 void movs(Register rd, const Operand& operand) { in movs()
2652 void movs(Condition cond, Register rd, const Operand& operand) { in movs()
2655 void movs(EncodingSize size, Register rd, const Operand& operand) { in movs()
2660 void movt(Register rd, const Operand& operand) { movt(al, rd, operand); } in movt()
2663 void movw(Register rd, const Operand& operand) { movw(al, rd, operand); } in movw()
2666 void mrs(Register rd, SpecialRegister spec_reg) { mrs(al, rd, spec_reg); } in mrs()
2677 void mul(Register rd, Register rn, Register rm) { mul(al, Best, rd, rn, rm); } in mul()
2678 void mul(Condition cond, Register rd, Register rn, Register rm) { in mul()
2681 void mul(EncodingSize size, Register rd, Register rn, Register rm) { in mul()
2686 void muls(Register rd, Register rn, Register rm) { muls(al, rd, rn, rm); } in muls()
2692 void mvn(Register rd, const Operand& operand) { mvn(al, Best, rd, operand); } in mvn()
2693 void mvn(Condition cond, Register rd, const Operand& operand) { in mvn()
2696 void mvn(EncodingSize size, Register rd, const Operand& operand) { in mvn()
2704 void mvns(Register rd, const Operand& operand) { in mvns()
2707 void mvns(Condition cond, Register rd, const Operand& operand) { in mvns()
2710 void mvns(EncodingSize size, Register rd, const Operand& operand) { in mvns()
2720 void orn(Register rd, Register rn, const Operand& operand) { in orn()
2725 void orns(Register rd, Register rn, const Operand& operand) { in orns()
2734 void orr(Register rd, Register rn, const Operand& operand) { in orr()
2737 void orr(Condition cond, Register rd, Register rn, const Operand& operand) { in orr()
2741 Register rd, in orr()
2752 void orrs(Register rd, Register rn, const Operand& operand) { in orrs()
2755 void orrs(Condition cond, Register rd, Register rn, const Operand& operand) { in orrs()
2759 Register rd, in orrs()
2766 void pkhbt(Register rd, Register rn, const Operand& operand) { in pkhbt()
2771 void pkhtb(Register rd, Register rn, const Operand& operand) { in pkhtb()
2825 void qadd(Register rd, Register rm, Register rn) { qadd(al, rd, rm, rn); } in qadd()
2828 void qadd16(Register rd, Register rn, Register rm) { qadd16(al, rd, rn, rm); } in qadd16()
2831 void qadd8(Register rd, Register rn, Register rm) { qadd8(al, rd, rn, rm); } in qadd8()
2834 void qasx(Register rd, Register rn, Register rm) { qasx(al, rd, rn, rm); } in qasx()
2837 void qdadd(Register rd, Register rm, Register rn) { qdadd(al, rd, rm, rn); } in qdadd()
2840 void qdsub(Register rd, Register rm, Register rn) { qdsub(al, rd, rm, rn); } in qdsub()
2843 void qsax(Register rd, Register rn, Register rm) { qsax(al, rd, rn, rm); } in qsax()
2846 void qsub(Register rd, Register rm, Register rn) { qsub(al, rd, rm, rn); } in qsub()
2849 void qsub16(Register rd, Register rn, Register rm) { qsub16(al, rd, rn, rm); } in qsub16()
2852 void qsub8(Register rd, Register rn, Register rm) { qsub8(al, rd, rn, rm); } in qsub8()
2855 void rbit(Register rd, Register rm) { rbit(al, rd, rm); } in rbit()
2858 void rev(Register rd, Register rm) { rev(al, Best, rd, rm); } in rev()
2859 void rev(Condition cond, Register rd, Register rm) { in rev()
2862 void rev(EncodingSize size, Register rd, Register rm) { in rev()
2867 void rev16(Register rd, Register rm) { rev16(al, Best, rd, rm); } in rev16()
2868 void rev16(Condition cond, Register rd, Register rm) { in rev16()
2871 void rev16(EncodingSize size, Register rd, Register rm) { in rev16()
2876 void revsh(Register rd, Register rm) { revsh(al, Best, rd, rm); } in revsh()
2877 void revsh(Condition cond, Register rd, Register rm) { in revsh()
2880 void revsh(EncodingSize size, Register rd, Register rm) { in revsh()
2889 void ror(Register rd, Register rm, const Operand& operand) { in ror()
2892 void ror(Condition cond, Register rd, Register rm, const Operand& operand) { in ror()
2896 Register rd, in ror()
2907 void rors(Register rd, Register rm, const Operand& operand) { in rors()
2910 void rors(Condition cond, Register rd, Register rm, const Operand& operand) { in rors()
2914 Register rd, in rors()
2921 void rrx(Register rd, Register rm) { rrx(al, rd, rm); } in rrx()
2924 void rrxs(Register rd, Register rm) { rrxs(al, rd, rm); } in rrxs()
2931 void rsb(Register rd, Register rn, const Operand& operand) { in rsb()
2934 void rsb(Condition cond, Register rd, Register rn, const Operand& operand) { in rsb()
2938 Register rd, in rsb()
2949 void rsbs(Register rd, Register rn, const Operand& operand) { in rsbs()
2952 void rsbs(Condition cond, Register rd, Register rn, const Operand& operand) { in rsbs()
2956 Register rd, in rsbs()
2963 void rsc(Register rd, Register rn, const Operand& operand) { in rsc()
2968 void rscs(Register rd, Register rn, const Operand& operand) { in rscs()
2973 void sadd16(Register rd, Register rn, Register rm) { sadd16(al, rd, rn, rm); } in sadd16()
2976 void sadd8(Register rd, Register rn, Register rm) { sadd8(al, rd, rn, rm); } in sadd8()
2979 void sasx(Register rd, Register rn, Register rm) { sasx(al, rd, rn, rm); } in sasx()
2986 void sbc(Register rd, Register rn, const Operand& operand) { in sbc()
2989 void sbc(Condition cond, Register rd, Register rn, const Operand& operand) { in sbc()
2993 Register rd, in sbc()
3004 void sbcs(Register rd, Register rn, const Operand& operand) { in sbcs()
3007 void sbcs(Condition cond, Register rd, Register rn, const Operand& operand) { in sbcs()
3011 Register rd, in sbcs()
3019 void sbfx(Register rd, Register rn, uint32_t lsb, uint32_t width) { in sbfx()
3024 void sdiv(Register rd, Register rn, Register rm) { sdiv(al, rd, rn, rm); } in sdiv()
3027 void sel(Register rd, Register rn, Register rm) { sel(al, rd, rn, rm); } in sel()
3030 void shadd16(Register rd, Register rn, Register rm) { in shadd16()
3035 void shadd8(Register rd, Register rn, Register rm) { shadd8(al, rd, rn, rm); } in shadd8()
3038 void shasx(Register rd, Register rn, Register rm) { shasx(al, rd, rn, rm); } in shasx()
3041 void shsax(Register rd, Register rn, Register rm) { shsax(al, rd, rn, rm); } in shsax()
3044 void shsub16(Register rd, Register rn, Register rm) { in shsub16()
3049 void shsub8(Register rd, Register rn, Register rm) { shsub8(al, rd, rn, rm); } in shsub8()
3053 void smlabb(Register rd, Register rn, Register rm, Register ra) { in smlabb()
3059 void smlabt(Register rd, Register rn, Register rm, Register ra) { in smlabt()
3065 void smlad(Register rd, Register rn, Register rm, Register ra) { in smlad()
3071 void smladx(Register rd, Register rn, Register rm, Register ra) { in smladx()
3125 void smlatb(Register rd, Register rn, Register rm, Register ra) { in smlatb()
3131 void smlatt(Register rd, Register rn, Register rm, Register ra) { in smlatt()
3137 void smlawb(Register rd, Register rn, Register rm, Register ra) { in smlawb()
3143 void smlawt(Register rd, Register rn, Register rm, Register ra) { in smlawt()
3149 void smlsd(Register rd, Register rn, Register rm, Register ra) { in smlsd()
3155 void smlsdx(Register rd, Register rn, Register rm, Register ra) { in smlsdx()
3173 void smmla(Register rd, Register rn, Register rm, Register ra) { in smmla()
3179 void smmlar(Register rd, Register rn, Register rm, Register ra) { in smmlar()
3185 void smmls(Register rd, Register rn, Register rm, Register ra) { in smmls()
3191 void smmlsr(Register rd, Register rn, Register rm, Register ra) { in smmlsr()
3196 void smmul(Register rd, Register rn, Register rm) { smmul(al, rd, rn, rm); } in smmul()
3199 void smmulr(Register rd, Register rn, Register rm) { smmulr(al, rd, rn, rm); } in smmulr()
3202 void smuad(Register rd, Register rn, Register rm) { smuad(al, rd, rn, rm); } in smuad()
3205 void smuadx(Register rd, Register rn, Register rm) { smuadx(al, rd, rn, rm); } in smuadx()
3208 void smulbb(Register rd, Register rn, Register rm) { smulbb(al, rd, rn, rm); } in smulbb()
3211 void smulbt(Register rd, Register rn, Register rm) { smulbt(al, rd, rn, rm); } in smulbt()
3226 void smultb(Register rd, Register rn, Register rm) { smultb(al, rd, rn, rm); } in smultb()
3229 void smultt(Register rd, Register rn, Register rm) { smultt(al, rd, rn, rm); } in smultt()
3232 void smulwb(Register rd, Register rn, Register rm) { smulwb(al, rd, rn, rm); } in smulwb()
3235 void smulwt(Register rd, Register rn, Register rm) { smulwt(al, rd, rn, rm); } in smulwt()
3238 void smusd(Register rd, Register rn, Register rm) { smusd(al, rd, rn, rm); } in smusd()
3241 void smusdx(Register rd, Register rn, Register rm) { smusdx(al, rd, rn, rm); } in smusdx()
3244 void ssat(Register rd, uint32_t imm, const Operand& operand) { in ssat()
3249 void ssat16(Register rd, uint32_t imm, Register rn) { in ssat16()
3254 void ssax(Register rd, Register rn, Register rm) { ssax(al, rd, rn, rm); } in ssax()
3257 void ssub16(Register rd, Register rn, Register rm) { ssub16(al, rd, rn, rm); } in ssub16()
3260 void ssub8(Register rd, Register rn, Register rm) { ssub8(al, rd, rn, rm); } in ssub8()
3272 void stlex(Register rd, Register rt, const MemOperand& operand) { in stlex()
3280 void stlexb(Register rd, Register rt, const MemOperand& operand) { in stlexb()
3289 void stlexd(Register rd, in stlexd()
3300 void stlexh(Register rd, Register rt, const MemOperand& operand) { in stlexh()
3450 void strex(Register rd, Register rt, const MemOperand& operand) { in strex()
3458 void strexb(Register rd, Register rt, const MemOperand& operand) { in strexb()
3467 void strexd(Register rd, in strexd()
3478 void strexh(Register rd, Register rt, const MemOperand& operand) { in strexh()
3501 void sub(Register rd, Register rn, const Operand& operand) { in sub()
3504 void sub(Condition cond, Register rd, Register rn, const Operand& operand) { in sub()
3508 Register rd, in sub()
3515 void sub(Register rd, const Operand& operand) { sub(al, rd, operand); } in sub()
3522 void subs(Register rd, Register rn, const Operand& operand) { in subs()
3525 void subs(Condition cond, Register rd, Register rn, const Operand& operand) { in subs()
3529 Register rd, in subs()
3538 void subw(Register rd, Register rn, const Operand& operand) { in subw()
3546 void sxtab(Register rd, Register rn, const Operand& operand) { in sxtab()
3554 void sxtab16(Register rd, Register rn, const Operand& operand) { in sxtab16()
3559 void sxtah(Register rd, Register rn, const Operand& operand) { in sxtah()
3567 void sxtb(Register rd, const Operand& operand) { in sxtb()
3570 void sxtb(Condition cond, Register rd, const Operand& operand) { in sxtb()
3573 void sxtb(EncodingSize size, Register rd, const Operand& operand) { in sxtb()
3578 void sxtb16(Register rd, const Operand& operand) { sxtb16(al, rd, operand); } in sxtb16()
3584 void sxth(Register rd, const Operand& operand) { in sxth()
3587 void sxth(Condition cond, Register rd, const Operand& operand) { in sxth()
3590 void sxth(EncodingSize size, Register rd, const Operand& operand) { in sxth()
3616 void uadd16(Register rd, Register rn, Register rm) { uadd16(al, rd, rn, rm); } in uadd16()
3619 void uadd8(Register rd, Register rn, Register rm) { uadd8(al, rd, rn, rm); } in uadd8()
3622 void uasx(Register rd, Register rn, Register rm) { uasx(al, rd, rn, rm); } in uasx()
3626 void ubfx(Register rd, Register rn, uint32_t lsb, uint32_t width) { in ubfx()
3636 void udiv(Register rd, Register rn, Register rm) { udiv(al, rd, rn, rm); } in udiv()
3639 void uhadd16(Register rd, Register rn, Register rm) { in uhadd16()
3644 void uhadd8(Register rd, Register rn, Register rm) { uhadd8(al, rd, rn, rm); } in uhadd8()
3647 void uhasx(Register rd, Register rn, Register rm) { uhasx(al, rd, rn, rm); } in uhasx()
3650 void uhsax(Register rd, Register rn, Register rm) { uhsax(al, rd, rn, rm); } in uhsax()
3653 void uhsub16(Register rd, Register rn, Register rm) { in uhsub16()
3658 void uhsub8(Register rd, Register rn, Register rm) { uhsub8(al, rd, rn, rm); } in uhsub8()
3691 void uqadd16(Register rd, Register rn, Register rm) { in uqadd16()
3696 void uqadd8(Register rd, Register rn, Register rm) { uqadd8(al, rd, rn, rm); } in uqadd8()
3699 void uqasx(Register rd, Register rn, Register rm) { uqasx(al, rd, rn, rm); } in uqasx()
3702 void uqsax(Register rd, Register rn, Register rm) { uqsax(al, rd, rn, rm); } in uqsax()
3705 void uqsub16(Register rd, Register rn, Register rm) { in uqsub16()
3710 void uqsub8(Register rd, Register rn, Register rm) { uqsub8(al, rd, rn, rm); } in uqsub8()
3713 void usad8(Register rd, Register rn, Register rm) { usad8(al, rd, rn, rm); } in usad8()
3717 void usada8(Register rd, Register rn, Register rm, Register ra) { in usada8()
3722 void usat(Register rd, uint32_t imm, const Operand& operand) { in usat()
3727 void usat16(Register rd, uint32_t imm, Register rn) { in usat16()
3732 void usax(Register rd, Register rn, Register rm) { usax(al, rd, rn, rm); } in usax()
3735 void usub16(Register rd, Register rn, Register rm) { usub16(al, rd, rn, rm); } in usub16()
3738 void usub8(Register rd, Register rn, Register rm) { usub8(al, rd, rn, rm); } in usub8()
3741 void uxtab(Register rd, Register rn, const Operand& operand) { in uxtab()
3749 void uxtab16(Register rd, Register rn, const Operand& operand) { in uxtab16()
3754 void uxtah(Register rd, Register rn, const Operand& operand) { in uxtah()
3762 void uxtb(Register rd, const Operand& operand) { in uxtb()
3765 void uxtb(Condition cond, Register rd, const Operand& operand) { in uxtb()
3768 void uxtb(EncodingSize size, Register rd, const Operand& operand) { in uxtb()
3773 void uxtb16(Register rd, const Operand& operand) { uxtb16(al, rd, operand); } in uxtb16()
3779 void uxth(Register rd, const Operand& operand) { in uxth()
3782 void uxth(Condition cond, Register rd, const Operand& operand) { in uxth()
3785 void uxth(EncodingSize size, Register rd, const Operand& operand) { in uxth()
3791 void vaba(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vaba()
3797 void vaba(DataType dt, QRegister rd, QRegister rn, QRegister rm) { in vaba()
3803 void vabal(DataType dt, QRegister rd, DRegister rn, DRegister rm) { in vabal()
3809 void vabd(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vabd()
3815 void vabd(DataType dt, QRegister rd, QRegister rn, QRegister rm) { in vabd()
3821 void vabdl(DataType dt, QRegister rd, DRegister rn, DRegister rm) { in vabdl()
3826 void vabs(DataType dt, DRegister rd, DRegister rm) { vabs(al, dt, rd, rm); } in vabs()
3829 void vabs(DataType dt, QRegister rd, QRegister rm) { vabs(al, dt, rd, rm); } in vabs()
3832 void vabs(DataType dt, SRegister rd, SRegister rm) { vabs(al, dt, rd, rm); } in vabs()
3836 void vacge(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vacge()
3842 void vacge(DataType dt, QRegister rd, QRegister rn, QRegister rm) { in vacge()
3848 void vacgt(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vacgt()
3854 void vacgt(DataType dt, QRegister rd, QRegister rn, QRegister rm) { in vacgt()
3860 void vacle(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vacle()
3866 void vacle(DataType dt, QRegister rd, QRegister rn, QRegister rm) { in vacle()
3872 void vaclt(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vaclt()
3878 void vaclt(DataType dt, QRegister rd, QRegister rn, QRegister rm) { in vaclt()
3884 void vadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vadd()
3890 void vadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) { in vadd()
3896 void vadd(DataType dt, SRegister rd, SRegister rn, SRegister rm) { in vadd()
3902 void vaddhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) { in vaddhn()
3908 void vaddl(DataType dt, QRegister rd, DRegister rn, DRegister rm) { in vaddl()
3914 void vaddw(DataType dt, QRegister rd, QRegister rn, DRegister rm) { in vaddw()
3923 void vand(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) { in vand()
3932 void vand(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) { in vand()
3941 void vbic(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) { in vbic()
3950 void vbic(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) { in vbic()
3956 void vbif(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vbif()
3959 void vbif(DRegister rd, DRegister rn, DRegister rm) { in vbif()
3962 void vbif(Condition cond, DRegister rd, DRegister rn, DRegister rm) { in vbif()
3968 void vbif(DataType dt, QRegister rd, QRegister rn, QRegister rm) { in vbif()
3971 void vbif(QRegister rd, QRegister rn, QRegister rm) { in vbif()
3974 void vbif(Condition cond, QRegister rd, QRegister rn, QRegister rm) { in vbif()
3980 void vbit(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vbit()
3983 void vbit(DRegister rd, DRegister rn, DRegister rm) { in vbit()
3986 void vbit(Condition cond, DRegister rd, DRegister rn, DRegister rm) { in vbit()
3992 void vbit(DataType dt, QRegister rd, QRegister rn, QRegister rm) { in vbit()
3995 void vbit(QRegister rd, QRegister rn, QRegister rm) { in vbit()
3998 void vbit(Condition cond, QRegister rd, QRegister rn, QRegister rm) { in vbit()
4004 void vbsl(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vbsl()
4007 void vbsl(DRegister rd, DRegister rn, DRegister rm) { in vbsl()
4010 void vbsl(Condition cond, DRegister rd, DRegister rn, DRegister rm) { in vbsl()
4016 void vbsl(DataType dt, QRegister rd, QRegister rn, QRegister rm) { in vbsl()
4019 void vbsl(QRegister rd, QRegister rn, QRegister rm) { in vbsl()
4022 void vbsl(Condition cond, QRegister rd, QRegister rn, QRegister rm) { in vbsl()
4031 void vceq(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { in vceq()
4040 void vceq(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { in vceq()
4046 void vceq(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vceq()
4052 void vceq(DataType dt, QRegister rd, QRegister rn, QRegister rm) { in vceq()
4061 void vcge(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { in vcge()
4070 void vcge(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { in vcge()
4076 void vcge(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vcge()
4082 void vcge(DataType dt, QRegister rd, QRegister rn, QRegister rm) { in vcge()
4091 void vcgt(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { in vcgt()
4100 void vcgt(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { in vcgt()
4106 void vcgt(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vcgt()
4112 void vcgt(DataType dt, QRegister rd, QRegister rn, QRegister rm) { in vcgt()
4121 void vcle(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { in vcle()
4130 void vcle(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { in vcle()
4136 void vcle(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vcle()
4142 void vcle(DataType dt, QRegister rd, QRegister rn, QRegister rm) { in vcle()
4147 void vcls(DataType dt, DRegister rd, DRegister rm) { vcls(al, dt, rd, rm); } in vcls()
4150 void vcls(DataType dt, QRegister rd, QRegister rm) { vcls(al, dt, rd, rm); } in vcls()
4157 void vclt(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { in vclt()
4166 void vclt(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { in vclt()
4172 void vclt(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vclt()
4178 void vclt(DataType dt, QRegister rd, QRegister rn, QRegister rm) { in vclt()
4183 void vclz(DataType dt, DRegister rd, DRegister rm) { vclz(al, dt, rd, rm); } in vclz()
4186 void vclz(DataType dt, QRegister rd, QRegister rm) { vclz(al, dt, rd, rm); } in vclz()
4189 void vcmp(DataType dt, SRegister rd, const SOperand& operand) { in vcmp()
4194 void vcmp(DataType dt, DRegister rd, const DOperand& operand) { in vcmp()
4202 void vcmpe(DataType dt, SRegister rd, const SOperand& operand) { in vcmpe()
4210 void vcmpe(DataType dt, DRegister rd, const DOperand& operand) { in vcmpe()
4215 void vcnt(DataType dt, DRegister rd, DRegister rm) { vcnt(al, dt, rd, rm); } in vcnt()
4218 void vcnt(DataType dt, QRegister rd, QRegister rm) { vcnt(al, dt, rd, rm); } in vcnt()
4222 void vcvt(DataType dt1, DataType dt2, DRegister rd, SRegister rm) { in vcvt()
4228 void vcvt(DataType dt1, DataType dt2, SRegister rd, DRegister rm) { in vcvt()
4239 DataType dt1, DataType dt2, DRegister rd, DRegister rm, int32_t fbits) { in vcvt()
4250 DataType dt1, DataType dt2, QRegister rd, QRegister rm, int32_t fbits) { in vcvt()
4261 DataType dt1, DataType dt2, SRegister rd, SRegister rm, int32_t fbits) { in vcvt()
4267 void vcvt(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { in vcvt()
4273 void vcvt(DataType dt1, DataType dt2, QRegister rd, QRegister rm) { in vcvt()
4279 void vcvt(DataType dt1, DataType dt2, DRegister rd, QRegister rm) { in vcvt()
4285 void vcvt(DataType dt1, DataType dt2, QRegister rd, DRegister rm) { in vcvt()
4291 void vcvt(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { in vcvt()
4305 void vcvtb(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { in vcvtb()
4311 void vcvtb(DataType dt1, DataType dt2, DRegister rd, SRegister rm) { in vcvtb()
4317 void vcvtb(DataType dt1, DataType dt2, SRegister rd, DRegister rm) { in vcvtb()
4347 void vcvtr(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { in vcvtr()
4353 void vcvtr(DataType dt1, DataType dt2, SRegister rd, DRegister rm) { in vcvtr()
4359 void vcvtt(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { in vcvtt()
4365 void vcvtt(DataType dt1, DataType dt2, DRegister rd, SRegister rm) { in vcvtt()
4371 void vcvtt(DataType dt1, DataType dt2, SRegister rd, DRegister rm) { in vcvtt()
4377 void vdiv(DataType dt, SRegister rd, SRegister rn, SRegister rm) { in vdiv()
4383 void vdiv(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vdiv()
4388 void vdup(DataType dt, QRegister rd, Register rt) { vdup(al, dt, rd, rt); } in vdup()
4391 void vdup(DataType dt, DRegister rd, Register rt) { vdup(al, dt, rd, rt); } in vdup()
4394 void vdup(DataType dt, DRegister rd, DRegisterLane rm) { in vdup()
4399 void vdup(DataType dt, QRegister rd, DRegisterLane rm) { in vdup()
4405 void veor(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in veor()
4408 void veor(DRegister rd, DRegister rn, DRegister rm) { in veor()
4411 void veor(Condition cond, DRegister rd, DRegister rn, DRegister rm) { in veor()
4417 void veor(DataType dt, QRegister rd, QRegister rn, QRegister rm) { in veor()
4420 void veor(QRegister rd, QRegister rn, QRegister rm) { in veor()
4423 void veor(Condition cond, QRegister rd, QRegister rn, QRegister rm) { in veor()
4434 DRegister rd, in vext()
4448 QRegister rd, in vext()
4457 void vfma(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vfma()
4463 void vfma(DataType dt, QRegister rd, QRegister rn, QRegister rm) { in vfma()
4469 void vfma(DataType dt, SRegister rd, SRegister rn, SRegister rm) { in vfma()
4475 void vfms(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vfms()
4481 void vfms(DataType dt, QRegister rd, QRegister rn, QRegister rm) { in vfms()
4487 void vfms(DataType dt, SRegister rd, SRegister rn, SRegister rm) { in vfms()
4493 void vfnma(DataType dt, SRegister rd, SRegister rn, SRegister rm) { in vfnma()
4499 void vfnma(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vfnma()
4505 void vfnms(DataType dt, SRegister rd, SRegister rn, SRegister rm) { in vfnms()
4511 void vfnms(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vfnms()
4517 void vhadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vhadd()
4523 void vhadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) { in vhadd()
4529 void vhsub(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vhsub()
4535 void vhsub(DataType dt, QRegister rd, QRegister rn, QRegister rm) { in vhsub()
4721 void vldr(DataType dt, DRegister rd, Location* location) { in vldr()
4724 void vldr(DRegister rd, Location* location) { in vldr()
4727 void vldr(Condition cond, DRegister rd, Location* location) { in vldr()
4735 void vldr(DataType dt, DRegister rd, const MemOperand& operand) { in vldr()
4738 void vldr(DRegister rd, const MemOperand& operand) { in vldr()
4741 void vldr(Condition cond, DRegister rd, const MemOperand& operand) { in vldr()
4751 void vldr(DataType dt, SRegister rd, Location* location) { in vldr()
4754 void vldr(SRegister rd, Location* location) { in vldr()
4757 void vldr(Condition cond, SRegister rd, Location* location) { in vldr()
4765 void vldr(DataType dt, SRegister rd, const MemOperand& operand) { in vldr()
4768 void vldr(SRegister rd, const MemOperand& operand) { in vldr()
4771 void vldr(Condition cond, SRegister rd, const MemOperand& operand) { in vldr()
4777 void vmax(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vmax()
4783 void vmax(DataType dt, QRegister rd, QRegister rn, QRegister rm) { in vmax()
4795 void vmin(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vmin()
4801 void vmin(DataType dt, QRegister rd, QRegister rn, QRegister rm) { in vmin()
4816 void vmla(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) { in vmla()
4825 void vmla(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) { in vmla()
4831 void vmla(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vmla()
4837 void vmla(DataType dt, QRegister rd, QRegister rn, QRegister rm) { in vmla()
4843 void vmla(DataType dt, SRegister rd, SRegister rn, SRegister rm) { in vmla()
4852 void vmlal(DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) { in vmlal()
4858 void vmlal(DataType dt, QRegister rd, DRegister rn, DRegister rm) { in vmlal()
4867 void vmls(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) { in vmls()
4876 void vmls(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) { in vmls()
4882 void vmls(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vmls()
4888 void vmls(DataType dt, QRegister rd, QRegister rn, QRegister rm) { in vmls()
4894 void vmls(DataType dt, SRegister rd, SRegister rn, SRegister rm) { in vmls()
4903 void vmlsl(DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) { in vmlsl()
4909 void vmlsl(DataType dt, QRegister rd, DRegister rn, DRegister rm) { in vmlsl()
4938 void vmov(DataType dt, DRegisterLane rd, Register rt) { in vmov()
4941 void vmov(DRegisterLane rd, Register rt) { in vmov()
4944 void vmov(Condition cond, DRegisterLane rd, Register rt) { in vmov()
4949 void vmov(DataType dt, DRegister rd, const DOperand& operand) { in vmov()
4954 void vmov(DataType dt, QRegister rd, const QOperand& operand) { in vmov()
4959 void vmov(DataType dt, SRegister rd, const SOperand& operand) { in vmov()
4975 void vmovl(DataType dt, QRegister rd, DRegister rm) { vmovl(al, dt, rd, rm); } in vmovl()
4978 void vmovn(DataType dt, DRegister rd, QRegister rm) { vmovn(al, dt, rd, rm); } in vmovn()
4995 DataType dt, DRegister rd, DRegister rn, DRegister dm, unsigned index) { in vmul()
5006 DataType dt, QRegister rd, QRegister rn, DRegister dm, unsigned index) { in vmul()
5012 void vmul(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vmul()
5018 void vmul(DataType dt, QRegister rd, QRegister rn, QRegister rm) { in vmul()
5024 void vmul(DataType dt, SRegister rd, SRegister rn, SRegister rm) { in vmul()
5035 DataType dt, QRegister rd, DRegister rn, DRegister dm, unsigned index) { in vmull()
5041 void vmull(DataType dt, QRegister rd, DRegister rn, DRegister rm) { in vmull()
5046 void vmvn(DataType dt, DRegister rd, const DOperand& operand) { in vmvn()
5051 void vmvn(DataType dt, QRegister rd, const QOperand& operand) { in vmvn()
5056 void vneg(DataType dt, DRegister rd, DRegister rm) { vneg(al, dt, rd, rm); } in vneg()
5059 void vneg(DataType dt, QRegister rd, QRegister rm) { vneg(al, dt, rd, rm); } in vneg()
5062 void vneg(DataType dt, SRegister rd, SRegister rm) { vneg(al, dt, rd, rm); } in vneg()
5066 void vnmla(DataType dt, SRegister rd, SRegister rn, SRegister rm) { in vnmla()
5072 void vnmla(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vnmla()
5078 void vnmls(DataType dt, SRegister rd, SRegister rn, SRegister rm) { in vnmls()
5084 void vnmls(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vnmls()
5090 void vnmul(DataType dt, SRegister rd, SRegister rn, SRegister rm) { in vnmul()
5096 void vnmul(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vnmul()
5105 void vorn(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) { in vorn()
5114 void vorn(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) { in vorn()
5123 void vorr(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) { in vorr()
5126 void vorr(DRegister rd, DRegister rn, const DOperand& operand) { in vorr()
5130 DRegister rd, in vorr()
5141 void vorr(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) { in vorr()
5144 void vorr(QRegister rd, QRegister rn, const QOperand& operand) { in vorr()
5148 QRegister rd, in vorr()
5155 void vpadal(DataType dt, DRegister rd, DRegister rm) { in vpadal()
5160 void vpadal(DataType dt, QRegister rd, QRegister rm) { in vpadal()
5166 void vpadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vpadd()
5171 void vpaddl(DataType dt, DRegister rd, DRegister rm) { in vpaddl()
5176 void vpaddl(DataType dt, QRegister rd, QRegister rm) { in vpaddl()
5182 void vpmax(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vpmax()
5188 void vpmin(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vpmin()
5225 void vqabs(DataType dt, DRegister rd, DRegister rm) { vqabs(al, dt, rd, rm); } in vqabs()
5228 void vqabs(DataType dt, QRegister rd, QRegister rm) { vqabs(al, dt, rd, rm); } in vqabs()
5232 void vqadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vqadd()
5238 void vqadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) { in vqadd()
5244 void vqdmlal(DataType dt, QRegister rd, DRegister rn, DRegister rm) { in vqdmlal()
5255 DataType dt, QRegister rd, DRegister rn, DRegister dm, unsigned index) { in vqdmlal()
5261 void vqdmlsl(DataType dt, QRegister rd, DRegister rn, DRegister rm) { in vqdmlsl()
5272 DataType dt, QRegister rd, DRegister rn, DRegister dm, unsigned index) { in vqdmlsl()
5278 void vqdmulh(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vqdmulh()
5284 void vqdmulh(DataType dt, QRegister rd, QRegister rn, QRegister rm) { in vqdmulh()
5293 void vqdmulh(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) { in vqdmulh()
5302 void vqdmulh(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) { in vqdmulh()
5308 void vqdmull(DataType dt, QRegister rd, DRegister rn, DRegister rm) { in vqdmull()
5317 void vqdmull(DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) { in vqdmull()
5322 void vqmovn(DataType dt, DRegister rd, QRegister rm) { in vqmovn()
5327 void vqmovun(DataType dt, DRegister rd, QRegister rm) { in vqmovun()
5332 void vqneg(DataType dt, DRegister rd, DRegister rm) { vqneg(al, dt, rd, rm); } in vqneg()
5335 void vqneg(DataType dt, QRegister rd, QRegister rm) { vqneg(al, dt, rd, rm); } in vqneg()
5339 void vqrdmulh(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vqrdmulh()
5345 void vqrdmulh(DataType dt, QRegister rd, QRegister rn, QRegister rm) { in vqrdmulh()
5354 void vqrdmulh(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) { in vqrdmulh()
5363 void vqrdmulh(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) { in vqrdmulh()
5369 void vqrshl(DataType dt, DRegister rd, DRegister rm, DRegister rn) { in vqrshl()
5375 void vqrshl(DataType dt, QRegister rd, QRegister rm, QRegister rn) { in vqrshl()
5385 DRegister rd, in vqrshrn()
5397 DRegister rd, in vqrshrun()
5408 void vqshl(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { in vqshl()
5417 void vqshl(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { in vqshl()
5427 DRegister rd, in vqshlu()
5439 QRegister rd, in vqshlu()
5451 DRegister rd, in vqshrn()
5463 DRegister rd, in vqshrun()
5471 void vqsub(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vqsub()
5477 void vqsub(DataType dt, QRegister rd, QRegister rn, QRegister rm) { in vqsub()
5483 void vraddhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) { in vraddhn()
5488 void vrecpe(DataType dt, DRegister rd, DRegister rm) { in vrecpe()
5493 void vrecpe(DataType dt, QRegister rd, QRegister rm) { in vrecpe()
5499 void vrecps(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vrecps()
5505 void vrecps(DataType dt, QRegister rd, QRegister rn, QRegister rm) { in vrecps()
5510 void vrev16(DataType dt, DRegister rd, DRegister rm) { in vrev16()
5515 void vrev16(DataType dt, QRegister rd, QRegister rm) { in vrev16()
5520 void vrev32(DataType dt, DRegister rd, DRegister rm) { in vrev32()
5525 void vrev32(DataType dt, QRegister rd, QRegister rm) { in vrev32()
5530 void vrev64(DataType dt, DRegister rd, DRegister rm) { in vrev64()
5535 void vrev64(DataType dt, QRegister rd, QRegister rm) { in vrev64()
5541 void vrhadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vrhadd()
5547 void vrhadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) { in vrhadd()
5576 void vrintr(DataType dt, SRegister rd, SRegister rm) { in vrintr()
5581 void vrintr(DataType dt, DRegister rd, DRegister rm) { in vrintr()
5586 void vrintx(DataType dt, DRegister rd, DRegister rm) { in vrintx()
5593 void vrintx(DataType dt, SRegister rd, SRegister rm) { in vrintx()
5598 void vrintz(DataType dt, DRegister rd, DRegister rm) { in vrintz()
5605 void vrintz(DataType dt, SRegister rd, SRegister rm) { in vrintz()
5611 void vrshl(DataType dt, DRegister rd, DRegister rm, DRegister rn) { in vrshl()
5617 void vrshl(DataType dt, QRegister rd, QRegister rm, QRegister rn) { in vrshl()
5626 void vrshr(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { in vrshr()
5635 void vrshr(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { in vrshr()
5645 DRegister rd, in vrshrn()
5652 void vrsqrte(DataType dt, DRegister rd, DRegister rm) { in vrsqrte()
5657 void vrsqrte(DataType dt, QRegister rd, QRegister rm) { in vrsqrte()
5663 void vrsqrts(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vrsqrts()
5669 void vrsqrts(DataType dt, QRegister rd, QRegister rn, QRegister rm) { in vrsqrts()
5678 void vrsra(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { in vrsra()
5687 void vrsra(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { in vrsra()
5693 void vrsubhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) { in vrsubhn()
5718 void vshl(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { in vshl()
5727 void vshl(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { in vshl()
5736 void vshll(DataType dt, QRegister rd, DRegister rm, const DOperand& operand) { in vshll()
5745 void vshr(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { in vshr()
5754 void vshr(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { in vshr()
5763 void vshrn(DataType dt, DRegister rd, QRegister rm, const QOperand& operand) { in vshrn()
5772 void vsli(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { in vsli()
5781 void vsli(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { in vsli()
5786 void vsqrt(DataType dt, SRegister rd, SRegister rm) { vsqrt(al, dt, rd, rm); } in vsqrt()
5789 void vsqrt(DataType dt, DRegister rd, DRegister rm) { vsqrt(al, dt, rd, rm); } in vsqrt()
5796 void vsra(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { in vsra()
5805 void vsra(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { in vsra()
5814 void vsri(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { in vsri()
5823 void vsri(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { in vsri()
6007 void vstr(DataType dt, DRegister rd, const MemOperand& operand) { in vstr()
6010 void vstr(DRegister rd, const MemOperand& operand) { in vstr()
6013 void vstr(Condition cond, DRegister rd, const MemOperand& operand) { in vstr()
6021 void vstr(DataType dt, SRegister rd, const MemOperand& operand) { in vstr()
6024 void vstr(SRegister rd, const MemOperand& operand) { in vstr()
6027 void vstr(Condition cond, SRegister rd, const MemOperand& operand) { in vstr()
6033 void vsub(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vsub()
6039 void vsub(DataType dt, QRegister rd, QRegister rn, QRegister rm) { in vsub()
6045 void vsub(DataType dt, SRegister rd, SRegister rn, SRegister rm) { in vsub()
6051 void vsubhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) { in vsubhn()
6057 void vsubl(DataType dt, QRegister rd, DRegister rn, DRegister rm) { in vsubl()
6063 void vsubw(DataType dt, QRegister rd, QRegister rn, DRegister rm) { in vsubw()
6068 void vswp(DataType dt, DRegister rd, DRegister rm) { vswp(al, dt, rd, rm); } in vswp()
6069 void vswp(DRegister rd, DRegister rm) { in vswp()
6072 void vswp(Condition cond, DRegister rd, DRegister rm) { in vswp()
6077 void vswp(DataType dt, QRegister rd, QRegister rm) { vswp(al, dt, rd, rm); } in vswp()
6078 void vswp(QRegister rd, QRegister rm) { in vswp()
6081 void vswp(Condition cond, QRegister rd, QRegister rm) { in vswp()
6091 DRegister rd, in vtbl()
6103 DRegister rd, in vtbx()
6110 void vtrn(DataType dt, DRegister rd, DRegister rm) { vtrn(al, dt, rd, rm); } in vtrn()
6113 void vtrn(DataType dt, QRegister rd, QRegister rm) { vtrn(al, dt, rd, rm); } in vtrn()
6117 void vtst(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vtst()
6123 void vtst(DataType dt, QRegister rd, QRegister rn, QRegister rm) { in vtst()
6128 void vuzp(DataType dt, DRegister rd, DRegister rm) { vuzp(al, dt, rd, rm); } in vuzp()
6131 void vuzp(DataType dt, QRegister rd, QRegister rm) { vuzp(al, dt, rd, rm); } in vuzp()
6134 void vzip(DataType dt, DRegister rd, DRegister rm) { vzip(al, dt, rd, rm); } in vzip()
6137 void vzip(DataType dt, QRegister rd, QRegister rm) { vzip(al, dt, rd, rm); } in vzip()