Lines Matching refs:rt2
62 V(Ldp, CPURegister&, rt, rt2, LoadPairOpFor(rt, rt2)) \
63 V(Stp, CPURegister&, rt, rt2, StorePairOpFor(rt, rt2)) \
64 V(Ldpsw, CPURegister&, rt, rt2, LDPSW_x)
784 const CPURegister& rt2,
1641 void Ldaxp(const Register& rt, const Register& rt2, const MemOperand& src) { in Ldaxp() argument
1643 VIXL_ASSERT(!rt.Aliases(rt2)); in Ldaxp()
1645 ldaxp(rt, rt2, src); in Ldaxp()
1701 const Register& rt2, \
1705 ASM(rs, rs2, rt, rt2, src); \
1796 const CPURegister& rt2, in Ldnp() argument
1800 ldnp(rt, rt2, src); in Ldnp()
1883 void Ldxp(const Register& rt, const Register& rt2, const MemOperand& src) { in Ldxp() argument
1885 VIXL_ASSERT(!rt.Aliases(rt2)); in Ldxp()
1887 ldxp(rt, rt2, src); in Ldxp()
2252 const Register& rt2, in Stlxp() argument
2257 VIXL_ASSERT(!rs.Aliases(rt2)); in Stlxp()
2259 stlxp(rs, rt, rt2, dst); in Stlxp()
2283 const CPURegister& rt2, in Stnp() argument
2287 stnp(rt, rt2, dst); in Stnp()
2291 const Register& rt2, in Stxp() argument
2296 VIXL_ASSERT(!rs.Aliases(rt2)); in Stxp()
2298 stxp(rs, rt, rt2, dst); in Stxp()