/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |* Target Instruction Enum Values and Descriptors *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ #ifdef GET_INSTRINFO_ENUM #undef GET_INSTRINFO_ENUM namespace llvm { namespace ARM { enum { PHI = 0, INLINEASM = 1, CFI_INSTRUCTION = 2, EH_LABEL = 3, GC_LABEL = 4, ANNOTATION_LABEL = 5, KILL = 6, EXTRACT_SUBREG = 7, INSERT_SUBREG = 8, IMPLICIT_DEF = 9, SUBREG_TO_REG = 10, COPY_TO_REGCLASS = 11, DBG_VALUE = 12, DBG_LABEL = 13, REG_SEQUENCE = 14, COPY = 15, BUNDLE = 16, LIFETIME_START = 17, LIFETIME_END = 18, STACKMAP = 19, FENTRY_CALL = 20, PATCHPOINT = 21, LOAD_STACK_GUARD = 22, STATEPOINT = 23, LOCAL_ESCAPE = 24, FAULTING_OP = 25, PATCHABLE_OP = 26, PATCHABLE_FUNCTION_ENTER = 27, PATCHABLE_RET = 28, PATCHABLE_FUNCTION_EXIT = 29, PATCHABLE_TAIL_CALL = 30, PATCHABLE_EVENT_CALL = 31, PATCHABLE_TYPED_EVENT_CALL = 32, ICALL_BRANCH_FUNNEL = 33, G_ADD = 34, G_SUB = 35, G_MUL = 36, G_SDIV = 37, G_UDIV = 38, G_SREM = 39, G_UREM = 40, G_AND = 41, G_OR = 42, G_XOR = 43, G_IMPLICIT_DEF = 44, G_PHI = 45, G_FRAME_INDEX = 46, G_GLOBAL_VALUE = 47, G_EXTRACT = 48, G_UNMERGE_VALUES = 49, G_INSERT = 50, G_MERGE_VALUES = 51, G_PTRTOINT = 52, G_INTTOPTR = 53, G_BITCAST = 54, G_LOAD = 55, G_SEXTLOAD = 56, G_ZEXTLOAD = 57, G_STORE = 58, G_ATOMIC_CMPXCHG_WITH_SUCCESS = 59, G_ATOMIC_CMPXCHG = 60, G_ATOMICRMW_XCHG = 61, G_ATOMICRMW_ADD = 62, G_ATOMICRMW_SUB = 63, G_ATOMICRMW_AND = 64, G_ATOMICRMW_NAND = 65, G_ATOMICRMW_OR = 66, G_ATOMICRMW_XOR = 67, G_ATOMICRMW_MAX = 68, G_ATOMICRMW_MIN = 69, G_ATOMICRMW_UMAX = 70, G_ATOMICRMW_UMIN = 71, G_BRCOND = 72, G_BRINDIRECT = 73, G_INTRINSIC = 74, G_INTRINSIC_W_SIDE_EFFECTS = 75, G_ANYEXT = 76, G_TRUNC = 77, G_CONSTANT = 78, G_FCONSTANT = 79, G_VASTART = 80, G_VAARG = 81, G_SEXT = 82, G_ZEXT = 83, G_SHL = 84, G_LSHR = 85, G_ASHR = 86, G_ICMP = 87, G_FCMP = 88, G_SELECT = 89, G_UADDE = 90, G_USUBE = 91, G_SADDO = 92, G_SSUBO = 93, G_UMULO = 94, G_SMULO = 95, G_UMULH = 96, G_SMULH = 97, G_FADD = 98, G_FSUB = 99, G_FMUL = 100, G_FMA = 101, G_FDIV = 102, G_FREM = 103, G_FPOW = 104, G_FEXP = 105, G_FEXP2 = 106, G_FLOG = 107, G_FLOG2 = 108, G_FNEG = 109, G_FPEXT = 110, G_FPTRUNC = 111, G_FPTOSI = 112, G_FPTOUI = 113, G_SITOFP = 114, G_UITOFP = 115, G_FABS = 116, G_GEP = 117, G_PTR_MASK = 118, G_BR = 119, G_INSERT_VECTOR_ELT = 120, G_EXTRACT_VECTOR_ELT = 121, G_SHUFFLE_VECTOR = 122, G_BSWAP = 123, G_ADDRSPACE_CAST = 124, G_BLOCK_ADDR = 125, ABS = 126, ADDSri = 127, ADDSrr = 128, ADDSrsi = 129, ADDSrsr = 130, ADJCALLSTACKDOWN = 131, ADJCALLSTACKUP = 132, ASRi = 133, ASRr = 134, B = 135, BCCZi64 = 136, BCCi64 = 137, BMOVPCB_CALL = 138, BMOVPCRX_CALL = 139, BR_JTadd = 140, BR_JTm_i12 = 141, BR_JTm_rs = 142, BR_JTr = 143, BX_CALL = 144, CMP_SWAP_16 = 145, CMP_SWAP_32 = 146, CMP_SWAP_64 = 147, CMP_SWAP_8 = 148, CONSTPOOL_ENTRY = 149, COPY_STRUCT_BYVAL_I32 = 150, CompilerBarrier = 151, ITasm = 152, Int_eh_sjlj_dispatchsetup = 153, Int_eh_sjlj_longjmp = 154, Int_eh_sjlj_setjmp = 155, Int_eh_sjlj_setjmp_nofp = 156, Int_eh_sjlj_setup_dispatch = 157, JUMPTABLE_ADDRS = 158, JUMPTABLE_INSTS = 159, JUMPTABLE_TBB = 160, JUMPTABLE_TBH = 161, LDMIA_RET = 162, LDRBT_POST = 163, LDRConstPool = 164, LDRLIT_ga_abs = 165, LDRLIT_ga_pcrel = 166, LDRLIT_ga_pcrel_ldr = 167, LDRT_POST = 168, LEApcrel = 169, LEApcrelJT = 170, LSLi = 171, LSLr = 172, LSRi = 173, LSRr = 174, MEMCPY = 175, MLAv5 = 176, MOVCCi = 177, MOVCCi16 = 178, MOVCCi32imm = 179, MOVCCr = 180, MOVCCsi = 181, MOVCCsr = 182, MOVPCRX = 183, MOVTi16_ga_pcrel = 184, MOV_ga_pcrel = 185, MOV_ga_pcrel_ldr = 186, MOVi16_ga_pcrel = 187, MOVi32imm = 188, MOVsra_flag = 189, MOVsrl_flag = 190, MULv5 = 191, MVNCCi = 192, PICADD = 193, PICLDR = 194, PICLDRB = 195, PICLDRH = 196, PICLDRSB = 197, PICLDRSH = 198, PICSTR = 199, PICSTRB = 200, PICSTRH = 201, RORi = 202, RORr = 203, RRX = 204, RRXi = 205, RSBSri = 206, RSBSrsi = 207, RSBSrsr = 208, SMLALv5 = 209, SMULLv5 = 210, SPACE = 211, STRBT_POST = 212, STRBi_preidx = 213, STRBr_preidx = 214, STRH_preidx = 215, STRT_POST = 216, STRi_preidx = 217, STRr_preidx = 218, SUBS_PC_LR = 219, SUBSri = 220, SUBSrr = 221, SUBSrsi = 222, SUBSrsr = 223, TAILJMPd = 224, TAILJMPr = 225, TAILJMPr4 = 226, TCRETURNdi = 227, TCRETURNri = 228, TPsoft = 229, UMLALv5 = 230, UMULLv5 = 231, VLD1LNdAsm_16 = 232, VLD1LNdAsm_32 = 233, VLD1LNdAsm_8 = 234, VLD1LNdWB_fixed_Asm_16 = 235, VLD1LNdWB_fixed_Asm_32 = 236, VLD1LNdWB_fixed_Asm_8 = 237, VLD1LNdWB_register_Asm_16 = 238, VLD1LNdWB_register_Asm_32 = 239, VLD1LNdWB_register_Asm_8 = 240, VLD2LNdAsm_16 = 241, VLD2LNdAsm_32 = 242, VLD2LNdAsm_8 = 243, VLD2LNdWB_fixed_Asm_16 = 244, VLD2LNdWB_fixed_Asm_32 = 245, VLD2LNdWB_fixed_Asm_8 = 246, VLD2LNdWB_register_Asm_16 = 247, VLD2LNdWB_register_Asm_32 = 248, VLD2LNdWB_register_Asm_8 = 249, VLD2LNqAsm_16 = 250, VLD2LNqAsm_32 = 251, VLD2LNqWB_fixed_Asm_16 = 252, VLD2LNqWB_fixed_Asm_32 = 253, VLD2LNqWB_register_Asm_16 = 254, VLD2LNqWB_register_Asm_32 = 255, VLD3DUPdAsm_16 = 256, VLD3DUPdAsm_32 = 257, VLD3DUPdAsm_8 = 258, VLD3DUPdWB_fixed_Asm_16 = 259, VLD3DUPdWB_fixed_Asm_32 = 260, VLD3DUPdWB_fixed_Asm_8 = 261, VLD3DUPdWB_register_Asm_16 = 262, VLD3DUPdWB_register_Asm_32 = 263, VLD3DUPdWB_register_Asm_8 = 264, VLD3DUPqAsm_16 = 265, VLD3DUPqAsm_32 = 266, VLD3DUPqAsm_8 = 267, VLD3DUPqWB_fixed_Asm_16 = 268, VLD3DUPqWB_fixed_Asm_32 = 269, VLD3DUPqWB_fixed_Asm_8 = 270, VLD3DUPqWB_register_Asm_16 = 271, VLD3DUPqWB_register_Asm_32 = 272, VLD3DUPqWB_register_Asm_8 = 273, VLD3LNdAsm_16 = 274, VLD3LNdAsm_32 = 275, VLD3LNdAsm_8 = 276, VLD3LNdWB_fixed_Asm_16 = 277, VLD3LNdWB_fixed_Asm_32 = 278, VLD3LNdWB_fixed_Asm_8 = 279, VLD3LNdWB_register_Asm_16 = 280, VLD3LNdWB_register_Asm_32 = 281, VLD3LNdWB_register_Asm_8 = 282, VLD3LNqAsm_16 = 283, VLD3LNqAsm_32 = 284, VLD3LNqWB_fixed_Asm_16 = 285, VLD3LNqWB_fixed_Asm_32 = 286, VLD3LNqWB_register_Asm_16 = 287, VLD3LNqWB_register_Asm_32 = 288, VLD3dAsm_16 = 289, VLD3dAsm_32 = 290, VLD3dAsm_8 = 291, VLD3dWB_fixed_Asm_16 = 292, VLD3dWB_fixed_Asm_32 = 293, VLD3dWB_fixed_Asm_8 = 294, VLD3dWB_register_Asm_16 = 295, VLD3dWB_register_Asm_32 = 296, VLD3dWB_register_Asm_8 = 297, VLD3qAsm_16 = 298, VLD3qAsm_32 = 299, VLD3qAsm_8 = 300, VLD3qWB_fixed_Asm_16 = 301, VLD3qWB_fixed_Asm_32 = 302, VLD3qWB_fixed_Asm_8 = 303, VLD3qWB_register_Asm_16 = 304, VLD3qWB_register_Asm_32 = 305, VLD3qWB_register_Asm_8 = 306, VLD4DUPdAsm_16 = 307, VLD4DUPdAsm_32 = 308, VLD4DUPdAsm_8 = 309, VLD4DUPdWB_fixed_Asm_16 = 310, VLD4DUPdWB_fixed_Asm_32 = 311, VLD4DUPdWB_fixed_Asm_8 = 312, VLD4DUPdWB_register_Asm_16 = 313, VLD4DUPdWB_register_Asm_32 = 314, VLD4DUPdWB_register_Asm_8 = 315, VLD4DUPqAsm_16 = 316, VLD4DUPqAsm_32 = 317, VLD4DUPqAsm_8 = 318, VLD4DUPqWB_fixed_Asm_16 = 319, VLD4DUPqWB_fixed_Asm_32 = 320, VLD4DUPqWB_fixed_Asm_8 = 321, VLD4DUPqWB_register_Asm_16 = 322, VLD4DUPqWB_register_Asm_32 = 323, VLD4DUPqWB_register_Asm_8 = 324, VLD4LNdAsm_16 = 325, VLD4LNdAsm_32 = 326, VLD4LNdAsm_8 = 327, VLD4LNdWB_fixed_Asm_16 = 328, VLD4LNdWB_fixed_Asm_32 = 329, VLD4LNdWB_fixed_Asm_8 = 330, VLD4LNdWB_register_Asm_16 = 331, VLD4LNdWB_register_Asm_32 = 332, VLD4LNdWB_register_Asm_8 = 333, VLD4LNqAsm_16 = 334, VLD4LNqAsm_32 = 335, VLD4LNqWB_fixed_Asm_16 = 336, VLD4LNqWB_fixed_Asm_32 = 337, VLD4LNqWB_register_Asm_16 = 338, VLD4LNqWB_register_Asm_32 = 339, VLD4dAsm_16 = 340, VLD4dAsm_32 = 341, VLD4dAsm_8 = 342, VLD4dWB_fixed_Asm_16 = 343, VLD4dWB_fixed_Asm_32 = 344, VLD4dWB_fixed_Asm_8 = 345, VLD4dWB_register_Asm_16 = 346, VLD4dWB_register_Asm_32 = 347, VLD4dWB_register_Asm_8 = 348, VLD4qAsm_16 = 349, VLD4qAsm_32 = 350, VLD4qAsm_8 = 351, VLD4qWB_fixed_Asm_16 = 352, VLD4qWB_fixed_Asm_32 = 353, VLD4qWB_fixed_Asm_8 = 354, VLD4qWB_register_Asm_16 = 355, VLD4qWB_register_Asm_32 = 356, VLD4qWB_register_Asm_8 = 357, VMOVD0 = 358, VMOVDcc = 359, VMOVQ0 = 360, VMOVScc = 361, VST1LNdAsm_16 = 362, VST1LNdAsm_32 = 363, VST1LNdAsm_8 = 364, VST1LNdWB_fixed_Asm_16 = 365, VST1LNdWB_fixed_Asm_32 = 366, VST1LNdWB_fixed_Asm_8 = 367, VST1LNdWB_register_Asm_16 = 368, VST1LNdWB_register_Asm_32 = 369, VST1LNdWB_register_Asm_8 = 370, VST2LNdAsm_16 = 371, VST2LNdAsm_32 = 372, VST2LNdAsm_8 = 373, VST2LNdWB_fixed_Asm_16 = 374, VST2LNdWB_fixed_Asm_32 = 375, VST2LNdWB_fixed_Asm_8 = 376, VST2LNdWB_register_Asm_16 = 377, VST2LNdWB_register_Asm_32 = 378, VST2LNdWB_register_Asm_8 = 379, VST2LNqAsm_16 = 380, VST2LNqAsm_32 = 381, VST2LNqWB_fixed_Asm_16 = 382, VST2LNqWB_fixed_Asm_32 = 383, VST2LNqWB_register_Asm_16 = 384, VST2LNqWB_register_Asm_32 = 385, VST3LNdAsm_16 = 386, VST3LNdAsm_32 = 387, VST3LNdAsm_8 = 388, VST3LNdWB_fixed_Asm_16 = 389, VST3LNdWB_fixed_Asm_32 = 390, VST3LNdWB_fixed_Asm_8 = 391, VST3LNdWB_register_Asm_16 = 392, VST3LNdWB_register_Asm_32 = 393, VST3LNdWB_register_Asm_8 = 394, VST3LNqAsm_16 = 395, VST3LNqAsm_32 = 396, VST3LNqWB_fixed_Asm_16 = 397, VST3LNqWB_fixed_Asm_32 = 398, VST3LNqWB_register_Asm_16 = 399, VST3LNqWB_register_Asm_32 = 400, VST3dAsm_16 = 401, VST3dAsm_32 = 402, VST3dAsm_8 = 403, VST3dWB_fixed_Asm_16 = 404, VST3dWB_fixed_Asm_32 = 405, VST3dWB_fixed_Asm_8 = 406, VST3dWB_register_Asm_16 = 407, VST3dWB_register_Asm_32 = 408, VST3dWB_register_Asm_8 = 409, VST3qAsm_16 = 410, VST3qAsm_32 = 411, VST3qAsm_8 = 412, VST3qWB_fixed_Asm_16 = 413, VST3qWB_fixed_Asm_32 = 414, VST3qWB_fixed_Asm_8 = 415, VST3qWB_register_Asm_16 = 416, VST3qWB_register_Asm_32 = 417, VST3qWB_register_Asm_8 = 418, VST4LNdAsm_16 = 419, VST4LNdAsm_32 = 420, VST4LNdAsm_8 = 421, VST4LNdWB_fixed_Asm_16 = 422, VST4LNdWB_fixed_Asm_32 = 423, VST4LNdWB_fixed_Asm_8 = 424, VST4LNdWB_register_Asm_16 = 425, VST4LNdWB_register_Asm_32 = 426, VST4LNdWB_register_Asm_8 = 427, VST4LNqAsm_16 = 428, VST4LNqAsm_32 = 429, VST4LNqWB_fixed_Asm_16 = 430, VST4LNqWB_fixed_Asm_32 = 431, VST4LNqWB_register_Asm_16 = 432, VST4LNqWB_register_Asm_32 = 433, VST4dAsm_16 = 434, VST4dAsm_32 = 435, VST4dAsm_8 = 436, VST4dWB_fixed_Asm_16 = 437, VST4dWB_fixed_Asm_32 = 438, VST4dWB_fixed_Asm_8 = 439, VST4dWB_register_Asm_16 = 440, VST4dWB_register_Asm_32 = 441, VST4dWB_register_Asm_8 = 442, VST4qAsm_16 = 443, VST4qAsm_32 = 444, VST4qAsm_8 = 445, VST4qWB_fixed_Asm_16 = 446, VST4qWB_fixed_Asm_32 = 447, VST4qWB_fixed_Asm_8 = 448, VST4qWB_register_Asm_16 = 449, VST4qWB_register_Asm_32 = 450, VST4qWB_register_Asm_8 = 451, WIN__CHKSTK = 452, WIN__DBZCHK = 453, t2ABS = 454, t2ADDSri = 455, t2ADDSrr = 456, t2ADDSrs = 457, t2BR_JT = 458, t2LDMIA_RET = 459, t2LDRBpcrel = 460, t2LDRConstPool = 461, t2LDRHpcrel = 462, t2LDRSBpcrel = 463, t2LDRSHpcrel = 464, t2LDRpci_pic = 465, t2LDRpcrel = 466, t2LEApcrel = 467, t2LEApcrelJT = 468, t2MOVCCasr = 469, t2MOVCCi = 470, t2MOVCCi16 = 471, t2MOVCCi32imm = 472, t2MOVCClsl = 473, t2MOVCClsr = 474, t2MOVCCr = 475, t2MOVCCror = 476, t2MOVSsi = 477, t2MOVSsr = 478, t2MOVTi16_ga_pcrel = 479, t2MOV_ga_pcrel = 480, t2MOVi16_ga_pcrel = 481, t2MOVi32imm = 482, t2MOVsi = 483, t2MOVsr = 484, t2MVNCCi = 485, t2RSBSri = 486, t2RSBSrs = 487, t2STRB_preidx = 488, t2STRH_preidx = 489, t2STR_preidx = 490, t2SUBSri = 491, t2SUBSrr = 492, t2SUBSrs = 493, t2TBB_JT = 494, t2TBH_JT = 495, tADCS = 496, tADDSi3 = 497, tADDSi8 = 498, tADDSrr = 499, tADDframe = 500, tADJCALLSTACKDOWN = 501, tADJCALLSTACKUP = 502, tBRIND = 503, tBR_JTr = 504, tBX_CALL = 505, tBX_RET = 506, tBX_RET_vararg = 507, tBfar = 508, tLDMIA_UPD = 509, tLDRConstPool = 510, tLDRLIT_ga_abs = 511, tLDRLIT_ga_pcrel = 512, tLDR_postidx = 513, tLDRpci_pic = 514, tLEApcrel = 515, tLEApcrelJT = 516, tMOVCCr_pseudo = 517, tPOP_RET = 518, tSBCS = 519, tSUBSi3 = 520, tSUBSi8 = 521, tSUBSrr = 522, tTAILJMPd = 523, tTAILJMPdND = 524, tTAILJMPr = 525, tTBB_JT = 526, tTBH_JT = 527, tTPsoft = 528, ADCri = 529, ADCrr = 530, ADCrsi = 531, ADCrsr = 532, ADDri = 533, ADDrr = 534, ADDrsi = 535, ADDrsr = 536, ADR = 537, AESD = 538, AESE = 539, AESIMC = 540, AESMC = 541, ANDri = 542, ANDrr = 543, ANDrsi = 544, ANDrsr = 545, BFC = 546, BFI = 547, BICri = 548, BICrr = 549, BICrsi = 550, BICrsr = 551, BKPT = 552, BL = 553, BLX = 554, BLX_pred = 555, BLXi = 556, BL_pred = 557, BX = 558, BXJ = 559, BX_RET = 560, BX_pred = 561, Bcc = 562, CDP = 563, CDP2 = 564, CLREX = 565, CLZ = 566, CMNri = 567, CMNzrr = 568, CMNzrsi = 569, CMNzrsr = 570, CMPri = 571, CMPrr = 572, CMPrsi = 573, CMPrsr = 574, CPS1p = 575, CPS2p = 576, CPS3p = 577, CRC32B = 578, CRC32CB = 579, CRC32CH = 580, CRC32CW = 581, CRC32H = 582, CRC32W = 583, DBG = 584, DMB = 585, DSB = 586, EORri = 587, EORrr = 588, EORrsi = 589, EORrsr = 590, ERET = 591, FCONSTD = 592, FCONSTH = 593, FCONSTS = 594, FLDMXDB_UPD = 595, FLDMXIA = 596, FLDMXIA_UPD = 597, FMSTAT = 598, FSTMXDB_UPD = 599, FSTMXIA = 600, FSTMXIA_UPD = 601, HINT = 602, HLT = 603, HVC = 604, ISB = 605, LDA = 606, LDAB = 607, LDAEX = 608, LDAEXB = 609, LDAEXD = 610, LDAEXH = 611, LDAH = 612, LDC2L_OFFSET = 613, LDC2L_OPTION = 614, LDC2L_POST = 615, LDC2L_PRE = 616, LDC2_OFFSET = 617, LDC2_OPTION = 618, LDC2_POST = 619, LDC2_PRE = 620, LDCL_OFFSET = 621, LDCL_OPTION = 622, LDCL_POST = 623, LDCL_PRE = 624, LDC_OFFSET = 625, LDC_OPTION = 626, LDC_POST = 627, LDC_PRE = 628, LDMDA = 629, LDMDA_UPD = 630, LDMDB = 631, LDMDB_UPD = 632, LDMIA = 633, LDMIA_UPD = 634, LDMIB = 635, LDMIB_UPD = 636, LDRBT_POST_IMM = 637, LDRBT_POST_REG = 638, LDRB_POST_IMM = 639, LDRB_POST_REG = 640, LDRB_PRE_IMM = 641, LDRB_PRE_REG = 642, LDRBi12 = 643, LDRBrs = 644, LDRD = 645, LDRD_POST = 646, LDRD_PRE = 647, LDREX = 648, LDREXB = 649, LDREXD = 650, LDREXH = 651, LDRH = 652, LDRHTi = 653, LDRHTr = 654, LDRH_POST = 655, LDRH_PRE = 656, LDRSB = 657, LDRSBTi = 658, LDRSBTr = 659, LDRSB_POST = 660, LDRSB_PRE = 661, LDRSH = 662, LDRSHTi = 663, LDRSHTr = 664, LDRSH_POST = 665, LDRSH_PRE = 666, LDRT_POST_IMM = 667, LDRT_POST_REG = 668, LDR_POST_IMM = 669, LDR_POST_REG = 670, LDR_PRE_IMM = 671, LDR_PRE_REG = 672, LDRcp = 673, LDRi12 = 674, LDRrs = 675, MCR = 676, MCR2 = 677, MCRR = 678, MCRR2 = 679, MLA = 680, MLS = 681, MOVPCLR = 682, MOVTi16 = 683, MOVi = 684, MOVi16 = 685, MOVr = 686, MOVr_TC = 687, MOVsi = 688, MOVsr = 689, MRC = 690, MRC2 = 691, MRRC = 692, MRRC2 = 693, MRS = 694, MRSbanked = 695, MRSsys = 696, MSR = 697, MSRbanked = 698, MSRi = 699, MUL = 700, MVNi = 701, MVNr = 702, MVNsi = 703, MVNsr = 704, ORRri = 705, ORRrr = 706, ORRrsi = 707, ORRrsr = 708, PKHBT = 709, PKHTB = 710, PLDWi12 = 711, PLDWrs = 712, PLDi12 = 713, PLDrs = 714, PLIi12 = 715, PLIrs = 716, QADD = 717, QADD16 = 718, QADD8 = 719, QASX = 720, QDADD = 721, QDSUB = 722, QSAX = 723, QSUB = 724, QSUB16 = 725, QSUB8 = 726, RBIT = 727, REV = 728, REV16 = 729, REVSH = 730, RFEDA = 731, RFEDA_UPD = 732, RFEDB = 733, RFEDB_UPD = 734, RFEIA = 735, RFEIA_UPD = 736, RFEIB = 737, RFEIB_UPD = 738, RSBri = 739, RSBrr = 740, RSBrsi = 741, RSBrsr = 742, RSCri = 743, RSCrr = 744, RSCrsi = 745, RSCrsr = 746, SADD16 = 747, SADD8 = 748, SASX = 749, SBCri = 750, SBCrr = 751, SBCrsi = 752, SBCrsr = 753, SBFX = 754, SDIV = 755, SEL = 756, SETEND = 757, SETPAN = 758, SHA1C = 759, SHA1H = 760, SHA1M = 761, SHA1P = 762, SHA1SU0 = 763, SHA1SU1 = 764, SHA256H = 765, SHA256H2 = 766, SHA256SU0 = 767, SHA256SU1 = 768, SHADD16 = 769, SHADD8 = 770, SHASX = 771, SHSAX = 772, SHSUB16 = 773, SHSUB8 = 774, SMC = 775, SMLABB = 776, SMLABT = 777, SMLAD = 778, SMLADX = 779, SMLAL = 780, SMLALBB = 781, SMLALBT = 782, SMLALD = 783, SMLALDX = 784, SMLALTB = 785, SMLALTT = 786, SMLATB = 787, SMLATT = 788, SMLAWB = 789, SMLAWT = 790, SMLSD = 791, SMLSDX = 792, SMLSLD = 793, SMLSLDX = 794, SMMLA = 795, SMMLAR = 796, SMMLS = 797, SMMLSR = 798, SMMUL = 799, SMMULR = 800, SMUAD = 801, SMUADX = 802, SMULBB = 803, SMULBT = 804, SMULL = 805, SMULTB = 806, SMULTT = 807, SMULWB = 808, SMULWT = 809, SMUSD = 810, SMUSDX = 811, SRSDA = 812, SRSDA_UPD = 813, SRSDB = 814, SRSDB_UPD = 815, SRSIA = 816, SRSIA_UPD = 817, SRSIB = 818, SRSIB_UPD = 819, SSAT = 820, SSAT16 = 821, SSAX = 822, SSUB16 = 823, SSUB8 = 824, STC2L_OFFSET = 825, STC2L_OPTION = 826, STC2L_POST = 827, STC2L_PRE = 828, STC2_OFFSET = 829, STC2_OPTION = 830, STC2_POST = 831, STC2_PRE = 832, STCL_OFFSET = 833, STCL_OPTION = 834, STCL_POST = 835, STCL_PRE = 836, STC_OFFSET = 837, STC_OPTION = 838, STC_POST = 839, STC_PRE = 840, STL = 841, STLB = 842, STLEX = 843, STLEXB = 844, STLEXD = 845, STLEXH = 846, STLH = 847, STMDA = 848, STMDA_UPD = 849, STMDB = 850, STMDB_UPD = 851, STMIA = 852, STMIA_UPD = 853, STMIB = 854, STMIB_UPD = 855, STRBT_POST_IMM = 856, STRBT_POST_REG = 857, STRB_POST_IMM = 858, STRB_POST_REG = 859, STRB_PRE_IMM = 860, STRB_PRE_REG = 861, STRBi12 = 862, STRBrs = 863, STRD = 864, STRD_POST = 865, STRD_PRE = 866, STREX = 867, STREXB = 868, STREXD = 869, STREXH = 870, STRH = 871, STRHTi = 872, STRHTr = 873, STRH_POST = 874, STRH_PRE = 875, STRT_POST_IMM = 876, STRT_POST_REG = 877, STR_POST_IMM = 878, STR_POST_REG = 879, STR_PRE_IMM = 880, STR_PRE_REG = 881, STRi12 = 882, STRrs = 883, SUBri = 884, SUBrr = 885, SUBrsi = 886, SUBrsr = 887, SVC = 888, SWP = 889, SWPB = 890, SXTAB = 891, SXTAB16 = 892, SXTAH = 893, SXTB = 894, SXTB16 = 895, SXTH = 896, TEQri = 897, TEQrr = 898, TEQrsi = 899, TEQrsr = 900, TRAP = 901, TRAPNaCl = 902, TSB = 903, TSTri = 904, TSTrr = 905, TSTrsi = 906, TSTrsr = 907, UADD16 = 908, UADD8 = 909, UASX = 910, UBFX = 911, UDF = 912, UDIV = 913, UHADD16 = 914, UHADD8 = 915, UHASX = 916, UHSAX = 917, UHSUB16 = 918, UHSUB8 = 919, UMAAL = 920, UMLAL = 921, UMULL = 922, UQADD16 = 923, UQADD8 = 924, UQASX = 925, UQSAX = 926, UQSUB16 = 927, UQSUB8 = 928, USAD8 = 929, USADA8 = 930, USAT = 931, USAT16 = 932, USAX = 933, USUB16 = 934, USUB8 = 935, UXTAB = 936, UXTAB16 = 937, UXTAH = 938, UXTB = 939, UXTB16 = 940, UXTH = 941, VABALsv2i64 = 942, VABALsv4i32 = 943, VABALsv8i16 = 944, VABALuv2i64 = 945, VABALuv4i32 = 946, VABALuv8i16 = 947, VABAsv16i8 = 948, VABAsv2i32 = 949, VABAsv4i16 = 950, VABAsv4i32 = 951, VABAsv8i16 = 952, VABAsv8i8 = 953, VABAuv16i8 = 954, VABAuv2i32 = 955, VABAuv4i16 = 956, VABAuv4i32 = 957, VABAuv8i16 = 958, VABAuv8i8 = 959, VABDLsv2i64 = 960, VABDLsv4i32 = 961, VABDLsv8i16 = 962, VABDLuv2i64 = 963, VABDLuv4i32 = 964, VABDLuv8i16 = 965, VABDfd = 966, VABDfq = 967, VABDhd = 968, VABDhq = 969, VABDsv16i8 = 970, VABDsv2i32 = 971, VABDsv4i16 = 972, VABDsv4i32 = 973, VABDsv8i16 = 974, VABDsv8i8 = 975, VABDuv16i8 = 976, VABDuv2i32 = 977, VABDuv4i16 = 978, VABDuv4i32 = 979, VABDuv8i16 = 980, VABDuv8i8 = 981, VABSD = 982, VABSH = 983, VABSS = 984, VABSfd = 985, VABSfq = 986, VABShd = 987, VABShq = 988, VABSv16i8 = 989, VABSv2i32 = 990, VABSv4i16 = 991, VABSv4i32 = 992, VABSv8i16 = 993, VABSv8i8 = 994, VACGEfd = 995, VACGEfq = 996, VACGEhd = 997, VACGEhq = 998, VACGTfd = 999, VACGTfq = 1000, VACGThd = 1001, VACGThq = 1002, VADDD = 1003, VADDH = 1004, VADDHNv2i32 = 1005, VADDHNv4i16 = 1006, VADDHNv8i8 = 1007, VADDLsv2i64 = 1008, VADDLsv4i32 = 1009, VADDLsv8i16 = 1010, VADDLuv2i64 = 1011, VADDLuv4i32 = 1012, VADDLuv8i16 = 1013, VADDS = 1014, VADDWsv2i64 = 1015, VADDWsv4i32 = 1016, VADDWsv8i16 = 1017, VADDWuv2i64 = 1018, VADDWuv4i32 = 1019, VADDWuv8i16 = 1020, VADDfd = 1021, VADDfq = 1022, VADDhd = 1023, VADDhq = 1024, VADDv16i8 = 1025, VADDv1i64 = 1026, VADDv2i32 = 1027, VADDv2i64 = 1028, VADDv4i16 = 1029, VADDv4i32 = 1030, VADDv8i16 = 1031, VADDv8i8 = 1032, VANDd = 1033, VANDq = 1034, VBICd = 1035, VBICiv2i32 = 1036, VBICiv4i16 = 1037, VBICiv4i32 = 1038, VBICiv8i16 = 1039, VBICq = 1040, VBIFd = 1041, VBIFq = 1042, VBITd = 1043, VBITq = 1044, VBSLd = 1045, VBSLq = 1046, VCADDv2f32 = 1047, VCADDv4f16 = 1048, VCADDv4f32 = 1049, VCADDv8f16 = 1050, VCEQfd = 1051, VCEQfq = 1052, VCEQhd = 1053, VCEQhq = 1054, VCEQv16i8 = 1055, VCEQv2i32 = 1056, VCEQv4i16 = 1057, VCEQv4i32 = 1058, VCEQv8i16 = 1059, VCEQv8i8 = 1060, VCEQzv16i8 = 1061, VCEQzv2f32 = 1062, VCEQzv2i32 = 1063, VCEQzv4f16 = 1064, VCEQzv4f32 = 1065, VCEQzv4i16 = 1066, VCEQzv4i32 = 1067, VCEQzv8f16 = 1068, VCEQzv8i16 = 1069, VCEQzv8i8 = 1070, VCGEfd = 1071, VCGEfq = 1072, VCGEhd = 1073, VCGEhq = 1074, VCGEsv16i8 = 1075, VCGEsv2i32 = 1076, VCGEsv4i16 = 1077, VCGEsv4i32 = 1078, VCGEsv8i16 = 1079, VCGEsv8i8 = 1080, VCGEuv16i8 = 1081, VCGEuv2i32 = 1082, VCGEuv4i16 = 1083, VCGEuv4i32 = 1084, VCGEuv8i16 = 1085, VCGEuv8i8 = 1086, VCGEzv16i8 = 1087, VCGEzv2f32 = 1088, VCGEzv2i32 = 1089, VCGEzv4f16 = 1090, VCGEzv4f32 = 1091, VCGEzv4i16 = 1092, VCGEzv4i32 = 1093, VCGEzv8f16 = 1094, VCGEzv8i16 = 1095, VCGEzv8i8 = 1096, VCGTfd = 1097, VCGTfq = 1098, VCGThd = 1099, VCGThq = 1100, VCGTsv16i8 = 1101, VCGTsv2i32 = 1102, VCGTsv4i16 = 1103, VCGTsv4i32 = 1104, VCGTsv8i16 = 1105, VCGTsv8i8 = 1106, VCGTuv16i8 = 1107, VCGTuv2i32 = 1108, VCGTuv4i16 = 1109, VCGTuv4i32 = 1110, VCGTuv8i16 = 1111, VCGTuv8i8 = 1112, VCGTzv16i8 = 1113, VCGTzv2f32 = 1114, VCGTzv2i32 = 1115, VCGTzv4f16 = 1116, VCGTzv4f32 = 1117, VCGTzv4i16 = 1118, VCGTzv4i32 = 1119, VCGTzv8f16 = 1120, VCGTzv8i16 = 1121, VCGTzv8i8 = 1122, VCLEzv16i8 = 1123, VCLEzv2f32 = 1124, VCLEzv2i32 = 1125, VCLEzv4f16 = 1126, VCLEzv4f32 = 1127, VCLEzv4i16 = 1128, VCLEzv4i32 = 1129, VCLEzv8f16 = 1130, VCLEzv8i16 = 1131, VCLEzv8i8 = 1132, VCLSv16i8 = 1133, VCLSv2i32 = 1134, VCLSv4i16 = 1135, VCLSv4i32 = 1136, VCLSv8i16 = 1137, VCLSv8i8 = 1138, VCLTzv16i8 = 1139, VCLTzv2f32 = 1140, VCLTzv2i32 = 1141, VCLTzv4f16 = 1142, VCLTzv4f32 = 1143, VCLTzv4i16 = 1144, VCLTzv4i32 = 1145, VCLTzv8f16 = 1146, VCLTzv8i16 = 1147, VCLTzv8i8 = 1148, VCLZv16i8 = 1149, VCLZv2i32 = 1150, VCLZv4i16 = 1151, VCLZv4i32 = 1152, VCLZv8i16 = 1153, VCLZv8i8 = 1154, VCMLAv2f32 = 1155, VCMLAv2f32_indexed = 1156, VCMLAv4f16 = 1157, VCMLAv4f16_indexed = 1158, VCMLAv4f32 = 1159, VCMLAv4f32_indexed = 1160, VCMLAv8f16 = 1161, VCMLAv8f16_indexed = 1162, VCMPD = 1163, VCMPED = 1164, VCMPEH = 1165, VCMPES = 1166, VCMPEZD = 1167, VCMPEZH = 1168, VCMPEZS = 1169, VCMPH = 1170, VCMPS = 1171, VCMPZD = 1172, VCMPZH = 1173, VCMPZS = 1174, VCNTd = 1175, VCNTq = 1176, VCVTANSDf = 1177, VCVTANSDh = 1178, VCVTANSQf = 1179, VCVTANSQh = 1180, VCVTANUDf = 1181, VCVTANUDh = 1182, VCVTANUQf = 1183, VCVTANUQh = 1184, VCVTASD = 1185, VCVTASH = 1186, VCVTASS = 1187, VCVTAUD = 1188, VCVTAUH = 1189, VCVTAUS = 1190, VCVTBDH = 1191, VCVTBHD = 1192, VCVTBHS = 1193, VCVTBSH = 1194, VCVTDS = 1195, VCVTMNSDf = 1196, VCVTMNSDh = 1197, VCVTMNSQf = 1198, VCVTMNSQh = 1199, VCVTMNUDf = 1200, VCVTMNUDh = 1201, VCVTMNUQf = 1202, VCVTMNUQh = 1203, VCVTMSD = 1204, VCVTMSH = 1205, VCVTMSS = 1206, VCVTMUD = 1207, VCVTMUH = 1208, VCVTMUS = 1209, VCVTNNSDf = 1210, VCVTNNSDh = 1211, VCVTNNSQf = 1212, VCVTNNSQh = 1213, VCVTNNUDf = 1214, VCVTNNUDh = 1215, VCVTNNUQf = 1216, VCVTNNUQh = 1217, VCVTNSD = 1218, VCVTNSH = 1219, VCVTNSS = 1220, VCVTNUD = 1221, VCVTNUH = 1222, VCVTNUS = 1223, VCVTPNSDf = 1224, VCVTPNSDh = 1225, VCVTPNSQf = 1226, VCVTPNSQh = 1227, VCVTPNUDf = 1228, VCVTPNUDh = 1229, VCVTPNUQf = 1230, VCVTPNUQh = 1231, VCVTPSD = 1232, VCVTPSH = 1233, VCVTPSS = 1234, VCVTPUD = 1235, VCVTPUH = 1236, VCVTPUS = 1237, VCVTSD = 1238, VCVTTDH = 1239, VCVTTHD = 1240, VCVTTHS = 1241, VCVTTSH = 1242, VCVTf2h = 1243, VCVTf2sd = 1244, VCVTf2sq = 1245, VCVTf2ud = 1246, VCVTf2uq = 1247, VCVTf2xsd = 1248, VCVTf2xsq = 1249, VCVTf2xud = 1250, VCVTf2xuq = 1251, VCVTh2f = 1252, VCVTh2sd = 1253, VCVTh2sq = 1254, VCVTh2ud = 1255, VCVTh2uq = 1256, VCVTh2xsd = 1257, VCVTh2xsq = 1258, VCVTh2xud = 1259, VCVTh2xuq = 1260, VCVTs2fd = 1261, VCVTs2fq = 1262, VCVTs2hd = 1263, VCVTs2hq = 1264, VCVTu2fd = 1265, VCVTu2fq = 1266, VCVTu2hd = 1267, VCVTu2hq = 1268, VCVTxs2fd = 1269, VCVTxs2fq = 1270, VCVTxs2hd = 1271, VCVTxs2hq = 1272, VCVTxu2fd = 1273, VCVTxu2fq = 1274, VCVTxu2hd = 1275, VCVTxu2hq = 1276, VDIVD = 1277, VDIVH = 1278, VDIVS = 1279, VDUP16d = 1280, VDUP16q = 1281, VDUP32d = 1282, VDUP32q = 1283, VDUP8d = 1284, VDUP8q = 1285, VDUPLN16d = 1286, VDUPLN16q = 1287, VDUPLN32d = 1288, VDUPLN32q = 1289, VDUPLN8d = 1290, VDUPLN8q = 1291, VEORd = 1292, VEORq = 1293, VEXTd16 = 1294, VEXTd32 = 1295, VEXTd8 = 1296, VEXTq16 = 1297, VEXTq32 = 1298, VEXTq64 = 1299, VEXTq8 = 1300, VFMAD = 1301, VFMAH = 1302, VFMAS = 1303, VFMAfd = 1304, VFMAfq = 1305, VFMAhd = 1306, VFMAhq = 1307, VFMSD = 1308, VFMSH = 1309, VFMSS = 1310, VFMSfd = 1311, VFMSfq = 1312, VFMShd = 1313, VFMShq = 1314, VFNMAD = 1315, VFNMAH = 1316, VFNMAS = 1317, VFNMSD = 1318, VFNMSH = 1319, VFNMSS = 1320, VGETLNi32 = 1321, VGETLNs16 = 1322, VGETLNs8 = 1323, VGETLNu16 = 1324, VGETLNu8 = 1325, VHADDsv16i8 = 1326, VHADDsv2i32 = 1327, VHADDsv4i16 = 1328, VHADDsv4i32 = 1329, VHADDsv8i16 = 1330, VHADDsv8i8 = 1331, VHADDuv16i8 = 1332, VHADDuv2i32 = 1333, VHADDuv4i16 = 1334, VHADDuv4i32 = 1335, VHADDuv8i16 = 1336, VHADDuv8i8 = 1337, VHSUBsv16i8 = 1338, VHSUBsv2i32 = 1339, VHSUBsv4i16 = 1340, VHSUBsv4i32 = 1341, VHSUBsv8i16 = 1342, VHSUBsv8i8 = 1343, VHSUBuv16i8 = 1344, VHSUBuv2i32 = 1345, VHSUBuv4i16 = 1346, VHSUBuv4i32 = 1347, VHSUBuv8i16 = 1348, VHSUBuv8i8 = 1349, VINSH = 1350, VJCVT = 1351, VLD1DUPd16 = 1352, VLD1DUPd16wb_fixed = 1353, VLD1DUPd16wb_register = 1354, VLD1DUPd32 = 1355, VLD1DUPd32wb_fixed = 1356, VLD1DUPd32wb_register = 1357, VLD1DUPd8 = 1358, VLD1DUPd8wb_fixed = 1359, VLD1DUPd8wb_register = 1360, VLD1DUPq16 = 1361, VLD1DUPq16wb_fixed = 1362, VLD1DUPq16wb_register = 1363, VLD1DUPq32 = 1364, VLD1DUPq32wb_fixed = 1365, VLD1DUPq32wb_register = 1366, VLD1DUPq8 = 1367, VLD1DUPq8wb_fixed = 1368, VLD1DUPq8wb_register = 1369, VLD1LNd16 = 1370, VLD1LNd16_UPD = 1371, VLD1LNd32 = 1372, VLD1LNd32_UPD = 1373, VLD1LNd8 = 1374, VLD1LNd8_UPD = 1375, VLD1LNq16Pseudo = 1376, VLD1LNq16Pseudo_UPD = 1377, VLD1LNq32Pseudo = 1378, VLD1LNq32Pseudo_UPD = 1379, VLD1LNq8Pseudo = 1380, VLD1LNq8Pseudo_UPD = 1381, VLD1d16 = 1382, VLD1d16Q = 1383, VLD1d16QPseudo = 1384, VLD1d16Qwb_fixed = 1385, VLD1d16Qwb_register = 1386, VLD1d16T = 1387, VLD1d16TPseudo = 1388, VLD1d16Twb_fixed = 1389, VLD1d16Twb_register = 1390, VLD1d16wb_fixed = 1391, VLD1d16wb_register = 1392, VLD1d32 = 1393, VLD1d32Q = 1394, VLD1d32QPseudo = 1395, VLD1d32Qwb_fixed = 1396, VLD1d32Qwb_register = 1397, VLD1d32T = 1398, VLD1d32TPseudo = 1399, VLD1d32Twb_fixed = 1400, VLD1d32Twb_register = 1401, VLD1d32wb_fixed = 1402, VLD1d32wb_register = 1403, VLD1d64 = 1404, VLD1d64Q = 1405, VLD1d64QPseudo = 1406, VLD1d64QPseudoWB_fixed = 1407, VLD1d64QPseudoWB_register = 1408, VLD1d64Qwb_fixed = 1409, VLD1d64Qwb_register = 1410, VLD1d64T = 1411, VLD1d64TPseudo = 1412, VLD1d64TPseudoWB_fixed = 1413, VLD1d64TPseudoWB_register = 1414, VLD1d64Twb_fixed = 1415, VLD1d64Twb_register = 1416, VLD1d64wb_fixed = 1417, VLD1d64wb_register = 1418, VLD1d8 = 1419, VLD1d8Q = 1420, VLD1d8QPseudo = 1421, VLD1d8Qwb_fixed = 1422, VLD1d8Qwb_register = 1423, VLD1d8T = 1424, VLD1d8TPseudo = 1425, VLD1d8Twb_fixed = 1426, VLD1d8Twb_register = 1427, VLD1d8wb_fixed = 1428, VLD1d8wb_register = 1429, VLD1q16 = 1430, VLD1q16HighQPseudo = 1431, VLD1q16HighTPseudo = 1432, VLD1q16LowQPseudo_UPD = 1433, VLD1q16LowTPseudo_UPD = 1434, VLD1q16wb_fixed = 1435, VLD1q16wb_register = 1436, VLD1q32 = 1437, VLD1q32HighQPseudo = 1438, VLD1q32HighTPseudo = 1439, VLD1q32LowQPseudo_UPD = 1440, VLD1q32LowTPseudo_UPD = 1441, VLD1q32wb_fixed = 1442, VLD1q32wb_register = 1443, VLD1q64 = 1444, VLD1q64HighQPseudo = 1445, VLD1q64HighTPseudo = 1446, VLD1q64LowQPseudo_UPD = 1447, VLD1q64LowTPseudo_UPD = 1448, VLD1q64wb_fixed = 1449, VLD1q64wb_register = 1450, VLD1q8 = 1451, VLD1q8HighQPseudo = 1452, VLD1q8HighTPseudo = 1453, VLD1q8LowQPseudo_UPD = 1454, VLD1q8LowTPseudo_UPD = 1455, VLD1q8wb_fixed = 1456, VLD1q8wb_register = 1457, VLD2DUPd16 = 1458, VLD2DUPd16wb_fixed = 1459, VLD2DUPd16wb_register = 1460, VLD2DUPd16x2 = 1461, VLD2DUPd16x2wb_fixed = 1462, VLD2DUPd16x2wb_register = 1463, VLD2DUPd32 = 1464, VLD2DUPd32wb_fixed = 1465, VLD2DUPd32wb_register = 1466, VLD2DUPd32x2 = 1467, VLD2DUPd32x2wb_fixed = 1468, VLD2DUPd32x2wb_register = 1469, VLD2DUPd8 = 1470, VLD2DUPd8wb_fixed = 1471, VLD2DUPd8wb_register = 1472, VLD2DUPd8x2 = 1473, VLD2DUPd8x2wb_fixed = 1474, VLD2DUPd8x2wb_register = 1475, VLD2DUPq16EvenPseudo = 1476, VLD2DUPq16OddPseudo = 1477, VLD2DUPq32EvenPseudo = 1478, VLD2DUPq32OddPseudo = 1479, VLD2DUPq8EvenPseudo = 1480, VLD2DUPq8OddPseudo = 1481, VLD2LNd16 = 1482, VLD2LNd16Pseudo = 1483, VLD2LNd16Pseudo_UPD = 1484, VLD2LNd16_UPD = 1485, VLD2LNd32 = 1486, VLD2LNd32Pseudo = 1487, VLD2LNd32Pseudo_UPD = 1488, VLD2LNd32_UPD = 1489, VLD2LNd8 = 1490, VLD2LNd8Pseudo = 1491, VLD2LNd8Pseudo_UPD = 1492, VLD2LNd8_UPD = 1493, VLD2LNq16 = 1494, VLD2LNq16Pseudo = 1495, VLD2LNq16Pseudo_UPD = 1496, VLD2LNq16_UPD = 1497, VLD2LNq32 = 1498, VLD2LNq32Pseudo = 1499, VLD2LNq32Pseudo_UPD = 1500, VLD2LNq32_UPD = 1501, VLD2b16 = 1502, VLD2b16wb_fixed = 1503, VLD2b16wb_register = 1504, VLD2b32 = 1505, VLD2b32wb_fixed = 1506, VLD2b32wb_register = 1507, VLD2b8 = 1508, VLD2b8wb_fixed = 1509, VLD2b8wb_register = 1510, VLD2d16 = 1511, VLD2d16wb_fixed = 1512, VLD2d16wb_register = 1513, VLD2d32 = 1514, VLD2d32wb_fixed = 1515, VLD2d32wb_register = 1516, VLD2d8 = 1517, VLD2d8wb_fixed = 1518, VLD2d8wb_register = 1519, VLD2q16 = 1520, VLD2q16Pseudo = 1521, VLD2q16PseudoWB_fixed = 1522, VLD2q16PseudoWB_register = 1523, VLD2q16wb_fixed = 1524, VLD2q16wb_register = 1525, VLD2q32 = 1526, VLD2q32Pseudo = 1527, VLD2q32PseudoWB_fixed = 1528, VLD2q32PseudoWB_register = 1529, VLD2q32wb_fixed = 1530, VLD2q32wb_register = 1531, VLD2q8 = 1532, VLD2q8Pseudo = 1533, VLD2q8PseudoWB_fixed = 1534, VLD2q8PseudoWB_register = 1535, VLD2q8wb_fixed = 1536, VLD2q8wb_register = 1537, VLD3DUPd16 = 1538, VLD3DUPd16Pseudo = 1539, VLD3DUPd16Pseudo_UPD = 1540, VLD3DUPd16_UPD = 1541, VLD3DUPd32 = 1542, VLD3DUPd32Pseudo = 1543, VLD3DUPd32Pseudo_UPD = 1544, VLD3DUPd32_UPD = 1545, VLD3DUPd8 = 1546, VLD3DUPd8Pseudo = 1547, VLD3DUPd8Pseudo_UPD = 1548, VLD3DUPd8_UPD = 1549, VLD3DUPq16 = 1550, VLD3DUPq16EvenPseudo = 1551, VLD3DUPq16OddPseudo = 1552, VLD3DUPq16_UPD = 1553, VLD3DUPq32 = 1554, VLD3DUPq32EvenPseudo = 1555, VLD3DUPq32OddPseudo = 1556, VLD3DUPq32_UPD = 1557, VLD3DUPq8 = 1558, VLD3DUPq8EvenPseudo = 1559, VLD3DUPq8OddPseudo = 1560, VLD3DUPq8_UPD = 1561, VLD3LNd16 = 1562, VLD3LNd16Pseudo = 1563, VLD3LNd16Pseudo_UPD = 1564, VLD3LNd16_UPD = 1565, VLD3LNd32 = 1566, VLD3LNd32Pseudo = 1567, VLD3LNd32Pseudo_UPD = 1568, VLD3LNd32_UPD = 1569, VLD3LNd8 = 1570, VLD3LNd8Pseudo = 1571, VLD3LNd8Pseudo_UPD = 1572, VLD3LNd8_UPD = 1573, VLD3LNq16 = 1574, VLD3LNq16Pseudo = 1575, VLD3LNq16Pseudo_UPD = 1576, VLD3LNq16_UPD = 1577, VLD3LNq32 = 1578, VLD3LNq32Pseudo = 1579, VLD3LNq32Pseudo_UPD = 1580, VLD3LNq32_UPD = 1581, VLD3d16 = 1582, VLD3d16Pseudo = 1583, VLD3d16Pseudo_UPD = 1584, VLD3d16_UPD = 1585, VLD3d32 = 1586, VLD3d32Pseudo = 1587, VLD3d32Pseudo_UPD = 1588, VLD3d32_UPD = 1589, VLD3d8 = 1590, VLD3d8Pseudo = 1591, VLD3d8Pseudo_UPD = 1592, VLD3d8_UPD = 1593, VLD3q16 = 1594, VLD3q16Pseudo_UPD = 1595, VLD3q16_UPD = 1596, VLD3q16oddPseudo = 1597, VLD3q16oddPseudo_UPD = 1598, VLD3q32 = 1599, VLD3q32Pseudo_UPD = 1600, VLD3q32_UPD = 1601, VLD3q32oddPseudo = 1602, VLD3q32oddPseudo_UPD = 1603, VLD3q8 = 1604, VLD3q8Pseudo_UPD = 1605, VLD3q8_UPD = 1606, VLD3q8oddPseudo = 1607, VLD3q8oddPseudo_UPD = 1608, VLD4DUPd16 = 1609, VLD4DUPd16Pseudo = 1610, VLD4DUPd16Pseudo_UPD = 1611, VLD4DUPd16_UPD = 1612, VLD4DUPd32 = 1613, VLD4DUPd32Pseudo = 1614, VLD4DUPd32Pseudo_UPD = 1615, VLD4DUPd32_UPD = 1616, VLD4DUPd8 = 1617, VLD4DUPd8Pseudo = 1618, VLD4DUPd8Pseudo_UPD = 1619, VLD4DUPd8_UPD = 1620, VLD4DUPq16 = 1621, VLD4DUPq16EvenPseudo = 1622, VLD4DUPq16OddPseudo = 1623, VLD4DUPq16_UPD = 1624, VLD4DUPq32 = 1625, VLD4DUPq32EvenPseudo = 1626, VLD4DUPq32OddPseudo = 1627, VLD4DUPq32_UPD = 1628, VLD4DUPq8 = 1629, VLD4DUPq8EvenPseudo = 1630, VLD4DUPq8OddPseudo = 1631, VLD4DUPq8_UPD = 1632, VLD4LNd16 = 1633, VLD4LNd16Pseudo = 1634, VLD4LNd16Pseudo_UPD = 1635, VLD4LNd16_UPD = 1636, VLD4LNd32 = 1637, VLD4LNd32Pseudo = 1638, VLD4LNd32Pseudo_UPD = 1639, VLD4LNd32_UPD = 1640, VLD4LNd8 = 1641, VLD4LNd8Pseudo = 1642, VLD4LNd8Pseudo_UPD = 1643, VLD4LNd8_UPD = 1644, VLD4LNq16 = 1645, VLD4LNq16Pseudo = 1646, VLD4LNq16Pseudo_UPD = 1647, VLD4LNq16_UPD = 1648, VLD4LNq32 = 1649, VLD4LNq32Pseudo = 1650, VLD4LNq32Pseudo_UPD = 1651, VLD4LNq32_UPD = 1652, VLD4d16 = 1653, VLD4d16Pseudo = 1654, VLD4d16Pseudo_UPD = 1655, VLD4d16_UPD = 1656, VLD4d32 = 1657, VLD4d32Pseudo = 1658, VLD4d32Pseudo_UPD = 1659, VLD4d32_UPD = 1660, VLD4d8 = 1661, VLD4d8Pseudo = 1662, VLD4d8Pseudo_UPD = 1663, VLD4d8_UPD = 1664, VLD4q16 = 1665, VLD4q16Pseudo_UPD = 1666, VLD4q16_UPD = 1667, VLD4q16oddPseudo = 1668, VLD4q16oddPseudo_UPD = 1669, VLD4q32 = 1670, VLD4q32Pseudo_UPD = 1671, VLD4q32_UPD = 1672, VLD4q32oddPseudo = 1673, VLD4q32oddPseudo_UPD = 1674, VLD4q8 = 1675, VLD4q8Pseudo_UPD = 1676, VLD4q8_UPD = 1677, VLD4q8oddPseudo = 1678, VLD4q8oddPseudo_UPD = 1679, VLDMDDB_UPD = 1680, VLDMDIA = 1681, VLDMDIA_UPD = 1682, VLDMQIA = 1683, VLDMSDB_UPD = 1684, VLDMSIA = 1685, VLDMSIA_UPD = 1686, VLDRD = 1687, VLDRH = 1688, VLDRS = 1689, VLLDM = 1690, VLSTM = 1691, VMAXNMD = 1692, VMAXNMH = 1693, VMAXNMNDf = 1694, VMAXNMNDh = 1695, VMAXNMNQf = 1696, VMAXNMNQh = 1697, VMAXNMS = 1698, VMAXfd = 1699, VMAXfq = 1700, VMAXhd = 1701, VMAXhq = 1702, VMAXsv16i8 = 1703, VMAXsv2i32 = 1704, VMAXsv4i16 = 1705, VMAXsv4i32 = 1706, VMAXsv8i16 = 1707, VMAXsv8i8 = 1708, VMAXuv16i8 = 1709, VMAXuv2i32 = 1710, VMAXuv4i16 = 1711, VMAXuv4i32 = 1712, VMAXuv8i16 = 1713, VMAXuv8i8 = 1714, VMINNMD = 1715, VMINNMH = 1716, VMINNMNDf = 1717, VMINNMNDh = 1718, VMINNMNQf = 1719, VMINNMNQh = 1720, VMINNMS = 1721, VMINfd = 1722, VMINfq = 1723, VMINhd = 1724, VMINhq = 1725, VMINsv16i8 = 1726, VMINsv2i32 = 1727, VMINsv4i16 = 1728, VMINsv4i32 = 1729, VMINsv8i16 = 1730, VMINsv8i8 = 1731, VMINuv16i8 = 1732, VMINuv2i32 = 1733, VMINuv4i16 = 1734, VMINuv4i32 = 1735, VMINuv8i16 = 1736, VMINuv8i8 = 1737, VMLAD = 1738, VMLAH = 1739, VMLALslsv2i32 = 1740, VMLALslsv4i16 = 1741, VMLALsluv2i32 = 1742, VMLALsluv4i16 = 1743, VMLALsv2i64 = 1744, VMLALsv4i32 = 1745, VMLALsv8i16 = 1746, VMLALuv2i64 = 1747, VMLALuv4i32 = 1748, VMLALuv8i16 = 1749, VMLAS = 1750, VMLAfd = 1751, VMLAfq = 1752, VMLAhd = 1753, VMLAhq = 1754, VMLAslfd = 1755, VMLAslfq = 1756, VMLAslhd = 1757, VMLAslhq = 1758, VMLAslv2i32 = 1759, VMLAslv4i16 = 1760, VMLAslv4i32 = 1761, VMLAslv8i16 = 1762, VMLAv16i8 = 1763, VMLAv2i32 = 1764, VMLAv4i16 = 1765, VMLAv4i32 = 1766, VMLAv8i16 = 1767, VMLAv8i8 = 1768, VMLSD = 1769, VMLSH = 1770, VMLSLslsv2i32 = 1771, VMLSLslsv4i16 = 1772, VMLSLsluv2i32 = 1773, VMLSLsluv4i16 = 1774, VMLSLsv2i64 = 1775, VMLSLsv4i32 = 1776, VMLSLsv8i16 = 1777, VMLSLuv2i64 = 1778, VMLSLuv4i32 = 1779, VMLSLuv8i16 = 1780, VMLSS = 1781, VMLSfd = 1782, VMLSfq = 1783, VMLShd = 1784, VMLShq = 1785, VMLSslfd = 1786, VMLSslfq = 1787, VMLSslhd = 1788, VMLSslhq = 1789, VMLSslv2i32 = 1790, VMLSslv4i16 = 1791, VMLSslv4i32 = 1792, VMLSslv8i16 = 1793, VMLSv16i8 = 1794, VMLSv2i32 = 1795, VMLSv4i16 = 1796, VMLSv4i32 = 1797, VMLSv8i16 = 1798, VMLSv8i8 = 1799, VMOVD = 1800, VMOVDRR = 1801, VMOVH = 1802, VMOVHR = 1803, VMOVLsv2i64 = 1804, VMOVLsv4i32 = 1805, VMOVLsv8i16 = 1806, VMOVLuv2i64 = 1807, VMOVLuv4i32 = 1808, VMOVLuv8i16 = 1809, VMOVNv2i32 = 1810, VMOVNv4i16 = 1811, VMOVNv8i8 = 1812, VMOVRH = 1813, VMOVRRD = 1814, VMOVRRS = 1815, VMOVRS = 1816, VMOVS = 1817, VMOVSR = 1818, VMOVSRR = 1819, VMOVv16i8 = 1820, VMOVv1i64 = 1821, VMOVv2f32 = 1822, VMOVv2i32 = 1823, VMOVv2i64 = 1824, VMOVv4f32 = 1825, VMOVv4i16 = 1826, VMOVv4i32 = 1827, VMOVv8i16 = 1828, VMOVv8i8 = 1829, VMRS = 1830, VMRS_FPEXC = 1831, VMRS_FPINST = 1832, VMRS_FPINST2 = 1833, VMRS_FPSID = 1834, VMRS_MVFR0 = 1835, VMRS_MVFR1 = 1836, VMRS_MVFR2 = 1837, VMSR = 1838, VMSR_FPEXC = 1839, VMSR_FPINST = 1840, VMSR_FPINST2 = 1841, VMSR_FPSID = 1842, VMULD = 1843, VMULH = 1844, VMULLp64 = 1845, VMULLp8 = 1846, VMULLslsv2i32 = 1847, VMULLslsv4i16 = 1848, VMULLsluv2i32 = 1849, VMULLsluv4i16 = 1850, VMULLsv2i64 = 1851, VMULLsv4i32 = 1852, VMULLsv8i16 = 1853, VMULLuv2i64 = 1854, VMULLuv4i32 = 1855, VMULLuv8i16 = 1856, VMULS = 1857, VMULfd = 1858, VMULfq = 1859, VMULhd = 1860, VMULhq = 1861, VMULpd = 1862, VMULpq = 1863, VMULslfd = 1864, VMULslfq = 1865, VMULslhd = 1866, VMULslhq = 1867, VMULslv2i32 = 1868, VMULslv4i16 = 1869, VMULslv4i32 = 1870, VMULslv8i16 = 1871, VMULv16i8 = 1872, VMULv2i32 = 1873, VMULv4i16 = 1874, VMULv4i32 = 1875, VMULv8i16 = 1876, VMULv8i8 = 1877, VMVNd = 1878, VMVNq = 1879, VMVNv2i32 = 1880, VMVNv4i16 = 1881, VMVNv4i32 = 1882, VMVNv8i16 = 1883, VNEGD = 1884, VNEGH = 1885, VNEGS = 1886, VNEGf32q = 1887, VNEGfd = 1888, VNEGhd = 1889, VNEGhq = 1890, VNEGs16d = 1891, VNEGs16q = 1892, VNEGs32d = 1893, VNEGs32q = 1894, VNEGs8d = 1895, VNEGs8q = 1896, VNMLAD = 1897, VNMLAH = 1898, VNMLAS = 1899, VNMLSD = 1900, VNMLSH = 1901, VNMLSS = 1902, VNMULD = 1903, VNMULH = 1904, VNMULS = 1905, VORNd = 1906, VORNq = 1907, VORRd = 1908, VORRiv2i32 = 1909, VORRiv4i16 = 1910, VORRiv4i32 = 1911, VORRiv8i16 = 1912, VORRq = 1913, VPADALsv16i8 = 1914, VPADALsv2i32 = 1915, VPADALsv4i16 = 1916, VPADALsv4i32 = 1917, VPADALsv8i16 = 1918, VPADALsv8i8 = 1919, VPADALuv16i8 = 1920, VPADALuv2i32 = 1921, VPADALuv4i16 = 1922, VPADALuv4i32 = 1923, VPADALuv8i16 = 1924, VPADALuv8i8 = 1925, VPADDLsv16i8 = 1926, VPADDLsv2i32 = 1927, VPADDLsv4i16 = 1928, VPADDLsv4i32 = 1929, VPADDLsv8i16 = 1930, VPADDLsv8i8 = 1931, VPADDLuv16i8 = 1932, VPADDLuv2i32 = 1933, VPADDLuv4i16 = 1934, VPADDLuv4i32 = 1935, VPADDLuv8i16 = 1936, VPADDLuv8i8 = 1937, VPADDf = 1938, VPADDh = 1939, VPADDi16 = 1940, VPADDi32 = 1941, VPADDi8 = 1942, VPMAXf = 1943, VPMAXh = 1944, VPMAXs16 = 1945, VPMAXs32 = 1946, VPMAXs8 = 1947, VPMAXu16 = 1948, VPMAXu32 = 1949, VPMAXu8 = 1950, VPMINf = 1951, VPMINh = 1952, VPMINs16 = 1953, VPMINs32 = 1954, VPMINs8 = 1955, VPMINu16 = 1956, VPMINu32 = 1957, VPMINu8 = 1958, VQABSv16i8 = 1959, VQABSv2i32 = 1960, VQABSv4i16 = 1961, VQABSv4i32 = 1962, VQABSv8i16 = 1963, VQABSv8i8 = 1964, VQADDsv16i8 = 1965, VQADDsv1i64 = 1966, VQADDsv2i32 = 1967, VQADDsv2i64 = 1968, VQADDsv4i16 = 1969, VQADDsv4i32 = 1970, VQADDsv8i16 = 1971, VQADDsv8i8 = 1972, VQADDuv16i8 = 1973, VQADDuv1i64 = 1974, VQADDuv2i32 = 1975, VQADDuv2i64 = 1976, VQADDuv4i16 = 1977, VQADDuv4i32 = 1978, VQADDuv8i16 = 1979, VQADDuv8i8 = 1980, VQDMLALslv2i32 = 1981, VQDMLALslv4i16 = 1982, VQDMLALv2i64 = 1983, VQDMLALv4i32 = 1984, VQDMLSLslv2i32 = 1985, VQDMLSLslv4i16 = 1986, VQDMLSLv2i64 = 1987, VQDMLSLv4i32 = 1988, VQDMULHslv2i32 = 1989, VQDMULHslv4i16 = 1990, VQDMULHslv4i32 = 1991, VQDMULHslv8i16 = 1992, VQDMULHv2i32 = 1993, VQDMULHv4i16 = 1994, VQDMULHv4i32 = 1995, VQDMULHv8i16 = 1996, VQDMULLslv2i32 = 1997, VQDMULLslv4i16 = 1998, VQDMULLv2i64 = 1999, VQDMULLv4i32 = 2000, VQMOVNsuv2i32 = 2001, VQMOVNsuv4i16 = 2002, VQMOVNsuv8i8 = 2003, VQMOVNsv2i32 = 2004, VQMOVNsv4i16 = 2005, VQMOVNsv8i8 = 2006, VQMOVNuv2i32 = 2007, VQMOVNuv4i16 = 2008, VQMOVNuv8i8 = 2009, VQNEGv16i8 = 2010, VQNEGv2i32 = 2011, VQNEGv4i16 = 2012, VQNEGv4i32 = 2013, VQNEGv8i16 = 2014, VQNEGv8i8 = 2015, VQRDMLAHslv2i32 = 2016, VQRDMLAHslv4i16 = 2017, VQRDMLAHslv4i32 = 2018, VQRDMLAHslv8i16 = 2019, VQRDMLAHv2i32 = 2020, VQRDMLAHv4i16 = 2021, VQRDMLAHv4i32 = 2022, VQRDMLAHv8i16 = 2023, VQRDMLSHslv2i32 = 2024, VQRDMLSHslv4i16 = 2025, VQRDMLSHslv4i32 = 2026, VQRDMLSHslv8i16 = 2027, VQRDMLSHv2i32 = 2028, VQRDMLSHv4i16 = 2029, VQRDMLSHv4i32 = 2030, VQRDMLSHv8i16 = 2031, VQRDMULHslv2i32 = 2032, VQRDMULHslv4i16 = 2033, VQRDMULHslv4i32 = 2034, VQRDMULHslv8i16 = 2035, VQRDMULHv2i32 = 2036, VQRDMULHv4i16 = 2037, VQRDMULHv4i32 = 2038, VQRDMULHv8i16 = 2039, VQRSHLsv16i8 = 2040, VQRSHLsv1i64 = 2041, VQRSHLsv2i32 = 2042, VQRSHLsv2i64 = 2043, VQRSHLsv4i16 = 2044, VQRSHLsv4i32 = 2045, VQRSHLsv8i16 = 2046, VQRSHLsv8i8 = 2047, VQRSHLuv16i8 = 2048, VQRSHLuv1i64 = 2049, VQRSHLuv2i32 = 2050, VQRSHLuv2i64 = 2051, VQRSHLuv4i16 = 2052, VQRSHLuv4i32 = 2053, VQRSHLuv8i16 = 2054, VQRSHLuv8i8 = 2055, VQRSHRNsv2i32 = 2056, VQRSHRNsv4i16 = 2057, VQRSHRNsv8i8 = 2058, VQRSHRNuv2i32 = 2059, VQRSHRNuv4i16 = 2060, VQRSHRNuv8i8 = 2061, VQRSHRUNv2i32 = 2062, VQRSHRUNv4i16 = 2063, VQRSHRUNv8i8 = 2064, VQSHLsiv16i8 = 2065, VQSHLsiv1i64 = 2066, VQSHLsiv2i32 = 2067, VQSHLsiv2i64 = 2068, VQSHLsiv4i16 = 2069, VQSHLsiv4i32 = 2070, VQSHLsiv8i16 = 2071, VQSHLsiv8i8 = 2072, VQSHLsuv16i8 = 2073, VQSHLsuv1i64 = 2074, VQSHLsuv2i32 = 2075, VQSHLsuv2i64 = 2076, VQSHLsuv4i16 = 2077, VQSHLsuv4i32 = 2078, VQSHLsuv8i16 = 2079, VQSHLsuv8i8 = 2080, VQSHLsv16i8 = 2081, VQSHLsv1i64 = 2082, VQSHLsv2i32 = 2083, VQSHLsv2i64 = 2084, VQSHLsv4i16 = 2085, VQSHLsv4i32 = 2086, VQSHLsv8i16 = 2087, VQSHLsv8i8 = 2088, VQSHLuiv16i8 = 2089, VQSHLuiv1i64 = 2090, VQSHLuiv2i32 = 2091, VQSHLuiv2i64 = 2092, VQSHLuiv4i16 = 2093, VQSHLuiv4i32 = 2094, VQSHLuiv8i16 = 2095, VQSHLuiv8i8 = 2096, VQSHLuv16i8 = 2097, VQSHLuv1i64 = 2098, VQSHLuv2i32 = 2099, VQSHLuv2i64 = 2100, VQSHLuv4i16 = 2101, VQSHLuv4i32 = 2102, VQSHLuv8i16 = 2103, VQSHLuv8i8 = 2104, VQSHRNsv2i32 = 2105, VQSHRNsv4i16 = 2106, VQSHRNsv8i8 = 2107, VQSHRNuv2i32 = 2108, VQSHRNuv4i16 = 2109, VQSHRNuv8i8 = 2110, VQSHRUNv2i32 = 2111, VQSHRUNv4i16 = 2112, VQSHRUNv8i8 = 2113, VQSUBsv16i8 = 2114, VQSUBsv1i64 = 2115, VQSUBsv2i32 = 2116, VQSUBsv2i64 = 2117, VQSUBsv4i16 = 2118, VQSUBsv4i32 = 2119, VQSUBsv8i16 = 2120, VQSUBsv8i8 = 2121, VQSUBuv16i8 = 2122, VQSUBuv1i64 = 2123, VQSUBuv2i32 = 2124, VQSUBuv2i64 = 2125, VQSUBuv4i16 = 2126, VQSUBuv4i32 = 2127, VQSUBuv8i16 = 2128, VQSUBuv8i8 = 2129, VRADDHNv2i32 = 2130, VRADDHNv4i16 = 2131, VRADDHNv8i8 = 2132, VRECPEd = 2133, VRECPEfd = 2134, VRECPEfq = 2135, VRECPEhd = 2136, VRECPEhq = 2137, VRECPEq = 2138, VRECPSfd = 2139, VRECPSfq = 2140, VRECPShd = 2141, VRECPShq = 2142, VREV16d8 = 2143, VREV16q8 = 2144, VREV32d16 = 2145, VREV32d8 = 2146, VREV32q16 = 2147, VREV32q8 = 2148, VREV64d16 = 2149, VREV64d32 = 2150, VREV64d8 = 2151, VREV64q16 = 2152, VREV64q32 = 2153, VREV64q8 = 2154, VRHADDsv16i8 = 2155, VRHADDsv2i32 = 2156, VRHADDsv4i16 = 2157, VRHADDsv4i32 = 2158, VRHADDsv8i16 = 2159, VRHADDsv8i8 = 2160, VRHADDuv16i8 = 2161, VRHADDuv2i32 = 2162, VRHADDuv4i16 = 2163, VRHADDuv4i32 = 2164, VRHADDuv8i16 = 2165, VRHADDuv8i8 = 2166, VRINTAD = 2167, VRINTAH = 2168, VRINTANDf = 2169, VRINTANDh = 2170, VRINTANQf = 2171, VRINTANQh = 2172, VRINTAS = 2173, VRINTMD = 2174, VRINTMH = 2175, VRINTMNDf = 2176, VRINTMNDh = 2177, VRINTMNQf = 2178, VRINTMNQh = 2179, VRINTMS = 2180, VRINTND = 2181, VRINTNH = 2182, VRINTNNDf = 2183, VRINTNNDh = 2184, VRINTNNQf = 2185, VRINTNNQh = 2186, VRINTNS = 2187, VRINTPD = 2188, VRINTPH = 2189, VRINTPNDf = 2190, VRINTPNDh = 2191, VRINTPNQf = 2192, VRINTPNQh = 2193, VRINTPS = 2194, VRINTRD = 2195, VRINTRH = 2196, VRINTRS = 2197, VRINTXD = 2198, VRINTXH = 2199, VRINTXNDf = 2200, VRINTXNDh = 2201, VRINTXNQf = 2202, VRINTXNQh = 2203, VRINTXS = 2204, VRINTZD = 2205, VRINTZH = 2206, VRINTZNDf = 2207, VRINTZNDh = 2208, VRINTZNQf = 2209, VRINTZNQh = 2210, VRINTZS = 2211, VRSHLsv16i8 = 2212, VRSHLsv1i64 = 2213, VRSHLsv2i32 = 2214, VRSHLsv2i64 = 2215, VRSHLsv4i16 = 2216, VRSHLsv4i32 = 2217, VRSHLsv8i16 = 2218, VRSHLsv8i8 = 2219, VRSHLuv16i8 = 2220, VRSHLuv1i64 = 2221, VRSHLuv2i32 = 2222, VRSHLuv2i64 = 2223, VRSHLuv4i16 = 2224, VRSHLuv4i32 = 2225, VRSHLuv8i16 = 2226, VRSHLuv8i8 = 2227, VRSHRNv2i32 = 2228, VRSHRNv4i16 = 2229, VRSHRNv8i8 = 2230, VRSHRsv16i8 = 2231, VRSHRsv1i64 = 2232, VRSHRsv2i32 = 2233, VRSHRsv2i64 = 2234, VRSHRsv4i16 = 2235, VRSHRsv4i32 = 2236, VRSHRsv8i16 = 2237, VRSHRsv8i8 = 2238, VRSHRuv16i8 = 2239, VRSHRuv1i64 = 2240, VRSHRuv2i32 = 2241, VRSHRuv2i64 = 2242, VRSHRuv4i16 = 2243, VRSHRuv4i32 = 2244, VRSHRuv8i16 = 2245, VRSHRuv8i8 = 2246, VRSQRTEd = 2247, VRSQRTEfd = 2248, VRSQRTEfq = 2249, VRSQRTEhd = 2250, VRSQRTEhq = 2251, VRSQRTEq = 2252, VRSQRTSfd = 2253, VRSQRTSfq = 2254, VRSQRTShd = 2255, VRSQRTShq = 2256, VRSRAsv16i8 = 2257, VRSRAsv1i64 = 2258, VRSRAsv2i32 = 2259, VRSRAsv2i64 = 2260, VRSRAsv4i16 = 2261, VRSRAsv4i32 = 2262, VRSRAsv8i16 = 2263, VRSRAsv8i8 = 2264, VRSRAuv16i8 = 2265, VRSRAuv1i64 = 2266, VRSRAuv2i32 = 2267, VRSRAuv2i64 = 2268, VRSRAuv4i16 = 2269, VRSRAuv4i32 = 2270, VRSRAuv8i16 = 2271, VRSRAuv8i8 = 2272, VRSUBHNv2i32 = 2273, VRSUBHNv4i16 = 2274, VRSUBHNv8i8 = 2275, VSDOTD = 2276, VSDOTDI = 2277, VSDOTQ = 2278, VSDOTQI = 2279, VSELEQD = 2280, VSELEQH = 2281, VSELEQS = 2282, VSELGED = 2283, VSELGEH = 2284, VSELGES = 2285, VSELGTD = 2286, VSELGTH = 2287, VSELGTS = 2288, VSELVSD = 2289, VSELVSH = 2290, VSELVSS = 2291, VSETLNi16 = 2292, VSETLNi32 = 2293, VSETLNi8 = 2294, VSHLLi16 = 2295, VSHLLi32 = 2296, VSHLLi8 = 2297, VSHLLsv2i64 = 2298, VSHLLsv4i32 = 2299, VSHLLsv8i16 = 2300, VSHLLuv2i64 = 2301, VSHLLuv4i32 = 2302, VSHLLuv8i16 = 2303, VSHLiv16i8 = 2304, VSHLiv1i64 = 2305, VSHLiv2i32 = 2306, VSHLiv2i64 = 2307, VSHLiv4i16 = 2308, VSHLiv4i32 = 2309, VSHLiv8i16 = 2310, VSHLiv8i8 = 2311, VSHLsv16i8 = 2312, VSHLsv1i64 = 2313, VSHLsv2i32 = 2314, VSHLsv2i64 = 2315, VSHLsv4i16 = 2316, VSHLsv4i32 = 2317, VSHLsv8i16 = 2318, VSHLsv8i8 = 2319, VSHLuv16i8 = 2320, VSHLuv1i64 = 2321, VSHLuv2i32 = 2322, VSHLuv2i64 = 2323, VSHLuv4i16 = 2324, VSHLuv4i32 = 2325, VSHLuv8i16 = 2326, VSHLuv8i8 = 2327, VSHRNv2i32 = 2328, VSHRNv4i16 = 2329, VSHRNv8i8 = 2330, VSHRsv16i8 = 2331, VSHRsv1i64 = 2332, VSHRsv2i32 = 2333, VSHRsv2i64 = 2334, VSHRsv4i16 = 2335, VSHRsv4i32 = 2336, VSHRsv8i16 = 2337, VSHRsv8i8 = 2338, VSHRuv16i8 = 2339, VSHRuv1i64 = 2340, VSHRuv2i32 = 2341, VSHRuv2i64 = 2342, VSHRuv4i16 = 2343, VSHRuv4i32 = 2344, VSHRuv8i16 = 2345, VSHRuv8i8 = 2346, VSHTOD = 2347, VSHTOH = 2348, VSHTOS = 2349, VSITOD = 2350, VSITOH = 2351, VSITOS = 2352, VSLIv16i8 = 2353, VSLIv1i64 = 2354, VSLIv2i32 = 2355, VSLIv2i64 = 2356, VSLIv4i16 = 2357, VSLIv4i32 = 2358, VSLIv8i16 = 2359, VSLIv8i8 = 2360, VSLTOD = 2361, VSLTOH = 2362, VSLTOS = 2363, VSQRTD = 2364, VSQRTH = 2365, VSQRTS = 2366, VSRAsv16i8 = 2367, VSRAsv1i64 = 2368, VSRAsv2i32 = 2369, VSRAsv2i64 = 2370, VSRAsv4i16 = 2371, VSRAsv4i32 = 2372, VSRAsv8i16 = 2373, VSRAsv8i8 = 2374, VSRAuv16i8 = 2375, VSRAuv1i64 = 2376, VSRAuv2i32 = 2377, VSRAuv2i64 = 2378, VSRAuv4i16 = 2379, VSRAuv4i32 = 2380, VSRAuv8i16 = 2381, VSRAuv8i8 = 2382, VSRIv16i8 = 2383, VSRIv1i64 = 2384, VSRIv2i32 = 2385, VSRIv2i64 = 2386, VSRIv4i16 = 2387, VSRIv4i32 = 2388, VSRIv8i16 = 2389, VSRIv8i8 = 2390, VST1LNd16 = 2391, VST1LNd16_UPD = 2392, VST1LNd32 = 2393, VST1LNd32_UPD = 2394, VST1LNd8 = 2395, VST1LNd8_UPD = 2396, VST1LNq16Pseudo = 2397, VST1LNq16Pseudo_UPD = 2398, VST1LNq32Pseudo = 2399, VST1LNq32Pseudo_UPD = 2400, VST1LNq8Pseudo = 2401, VST1LNq8Pseudo_UPD = 2402, VST1d16 = 2403, VST1d16Q = 2404, VST1d16QPseudo = 2405, VST1d16Qwb_fixed = 2406, VST1d16Qwb_register = 2407, VST1d16T = 2408, VST1d16TPseudo = 2409, VST1d16Twb_fixed = 2410, VST1d16Twb_register = 2411, VST1d16wb_fixed = 2412, VST1d16wb_register = 2413, VST1d32 = 2414, VST1d32Q = 2415, VST1d32QPseudo = 2416, VST1d32Qwb_fixed = 2417, VST1d32Qwb_register = 2418, VST1d32T = 2419, VST1d32TPseudo = 2420, VST1d32Twb_fixed = 2421, VST1d32Twb_register = 2422, VST1d32wb_fixed = 2423, VST1d32wb_register = 2424, VST1d64 = 2425, VST1d64Q = 2426, VST1d64QPseudo = 2427, VST1d64QPseudoWB_fixed = 2428, VST1d64QPseudoWB_register = 2429, VST1d64Qwb_fixed = 2430, VST1d64Qwb_register = 2431, VST1d64T = 2432, VST1d64TPseudo = 2433, VST1d64TPseudoWB_fixed = 2434, VST1d64TPseudoWB_register = 2435, VST1d64Twb_fixed = 2436, VST1d64Twb_register = 2437, VST1d64wb_fixed = 2438, VST1d64wb_register = 2439, VST1d8 = 2440, VST1d8Q = 2441, VST1d8QPseudo = 2442, VST1d8Qwb_fixed = 2443, VST1d8Qwb_register = 2444, VST1d8T = 2445, VST1d8TPseudo = 2446, VST1d8Twb_fixed = 2447, VST1d8Twb_register = 2448, VST1d8wb_fixed = 2449, VST1d8wb_register = 2450, VST1q16 = 2451, VST1q16HighQPseudo = 2452, VST1q16HighTPseudo = 2453, VST1q16LowQPseudo_UPD = 2454, VST1q16LowTPseudo_UPD = 2455, VST1q16wb_fixed = 2456, VST1q16wb_register = 2457, VST1q32 = 2458, VST1q32HighQPseudo = 2459, VST1q32HighTPseudo = 2460, VST1q32LowQPseudo_UPD = 2461, VST1q32LowTPseudo_UPD = 2462, VST1q32wb_fixed = 2463, VST1q32wb_register = 2464, VST1q64 = 2465, VST1q64HighQPseudo = 2466, VST1q64HighTPseudo = 2467, VST1q64LowQPseudo_UPD = 2468, VST1q64LowTPseudo_UPD = 2469, VST1q64wb_fixed = 2470, VST1q64wb_register = 2471, VST1q8 = 2472, VST1q8HighQPseudo = 2473, VST1q8HighTPseudo = 2474, VST1q8LowQPseudo_UPD = 2475, VST1q8LowTPseudo_UPD = 2476, VST1q8wb_fixed = 2477, VST1q8wb_register = 2478, VST2LNd16 = 2479, VST2LNd16Pseudo = 2480, VST2LNd16Pseudo_UPD = 2481, VST2LNd16_UPD = 2482, VST2LNd32 = 2483, VST2LNd32Pseudo = 2484, VST2LNd32Pseudo_UPD = 2485, VST2LNd32_UPD = 2486, VST2LNd8 = 2487, VST2LNd8Pseudo = 2488, VST2LNd8Pseudo_UPD = 2489, VST2LNd8_UPD = 2490, VST2LNq16 = 2491, VST2LNq16Pseudo = 2492, VST2LNq16Pseudo_UPD = 2493, VST2LNq16_UPD = 2494, VST2LNq32 = 2495, VST2LNq32Pseudo = 2496, VST2LNq32Pseudo_UPD = 2497, VST2LNq32_UPD = 2498, VST2b16 = 2499, VST2b16wb_fixed = 2500, VST2b16wb_register = 2501, VST2b32 = 2502, VST2b32wb_fixed = 2503, VST2b32wb_register = 2504, VST2b8 = 2505, VST2b8wb_fixed = 2506, VST2b8wb_register = 2507, VST2d16 = 2508, VST2d16wb_fixed = 2509, VST2d16wb_register = 2510, VST2d32 = 2511, VST2d32wb_fixed = 2512, VST2d32wb_register = 2513, VST2d8 = 2514, VST2d8wb_fixed = 2515, VST2d8wb_register = 2516, VST2q16 = 2517, VST2q16Pseudo = 2518, VST2q16PseudoWB_fixed = 2519, VST2q16PseudoWB_register = 2520, VST2q16wb_fixed = 2521, VST2q16wb_register = 2522, VST2q32 = 2523, VST2q32Pseudo = 2524, VST2q32PseudoWB_fixed = 2525, VST2q32PseudoWB_register = 2526, VST2q32wb_fixed = 2527, VST2q32wb_register = 2528, VST2q8 = 2529, VST2q8Pseudo = 2530, VST2q8PseudoWB_fixed = 2531, VST2q8PseudoWB_register = 2532, VST2q8wb_fixed = 2533, VST2q8wb_register = 2534, VST3LNd16 = 2535, VST3LNd16Pseudo = 2536, VST3LNd16Pseudo_UPD = 2537, VST3LNd16_UPD = 2538, VST3LNd32 = 2539, VST3LNd32Pseudo = 2540, VST3LNd32Pseudo_UPD = 2541, VST3LNd32_UPD = 2542, VST3LNd8 = 2543, VST3LNd8Pseudo = 2544, VST3LNd8Pseudo_UPD = 2545, VST3LNd8_UPD = 2546, VST3LNq16 = 2547, VST3LNq16Pseudo = 2548, VST3LNq16Pseudo_UPD = 2549, VST3LNq16_UPD = 2550, VST3LNq32 = 2551, VST3LNq32Pseudo = 2552, VST3LNq32Pseudo_UPD = 2553, VST3LNq32_UPD = 2554, VST3d16 = 2555, VST3d16Pseudo = 2556, VST3d16Pseudo_UPD = 2557, VST3d16_UPD = 2558, VST3d32 = 2559, VST3d32Pseudo = 2560, VST3d32Pseudo_UPD = 2561, VST3d32_UPD = 2562, VST3d8 = 2563, VST3d8Pseudo = 2564, VST3d8Pseudo_UPD = 2565, VST3d8_UPD = 2566, VST3q16 = 2567, VST3q16Pseudo_UPD = 2568, VST3q16_UPD = 2569, VST3q16oddPseudo = 2570, VST3q16oddPseudo_UPD = 2571, VST3q32 = 2572, VST3q32Pseudo_UPD = 2573, VST3q32_UPD = 2574, VST3q32oddPseudo = 2575, VST3q32oddPseudo_UPD = 2576, VST3q8 = 2577, VST3q8Pseudo_UPD = 2578, VST3q8_UPD = 2579, VST3q8oddPseudo = 2580, VST3q8oddPseudo_UPD = 2581, VST4LNd16 = 2582, VST4LNd16Pseudo = 2583, VST4LNd16Pseudo_UPD = 2584, VST4LNd16_UPD = 2585, VST4LNd32 = 2586, VST4LNd32Pseudo = 2587, VST4LNd32Pseudo_UPD = 2588, VST4LNd32_UPD = 2589, VST4LNd8 = 2590, VST4LNd8Pseudo = 2591, VST4LNd8Pseudo_UPD = 2592, VST4LNd8_UPD = 2593, VST4LNq16 = 2594, VST4LNq16Pseudo = 2595, VST4LNq16Pseudo_UPD = 2596, VST4LNq16_UPD = 2597, VST4LNq32 = 2598, VST4LNq32Pseudo = 2599, VST4LNq32Pseudo_UPD = 2600, VST4LNq32_UPD = 2601, VST4d16 = 2602, VST4d16Pseudo = 2603, VST4d16Pseudo_UPD = 2604, VST4d16_UPD = 2605, VST4d32 = 2606, VST4d32Pseudo = 2607, VST4d32Pseudo_UPD = 2608, VST4d32_UPD = 2609, VST4d8 = 2610, VST4d8Pseudo = 2611, VST4d8Pseudo_UPD = 2612, VST4d8_UPD = 2613, VST4q16 = 2614, VST4q16Pseudo_UPD = 2615, VST4q16_UPD = 2616, VST4q16oddPseudo = 2617, VST4q16oddPseudo_UPD = 2618, VST4q32 = 2619, VST4q32Pseudo_UPD = 2620, VST4q32_UPD = 2621, VST4q32oddPseudo = 2622, VST4q32oddPseudo_UPD = 2623, VST4q8 = 2624, VST4q8Pseudo_UPD = 2625, VST4q8_UPD = 2626, VST4q8oddPseudo = 2627, VST4q8oddPseudo_UPD = 2628, VSTMDDB_UPD = 2629, VSTMDIA = 2630, VSTMDIA_UPD = 2631, VSTMQIA = 2632, VSTMSDB_UPD = 2633, VSTMSIA = 2634, VSTMSIA_UPD = 2635, VSTRD = 2636, VSTRH = 2637, VSTRS = 2638, VSUBD = 2639, VSUBH = 2640, VSUBHNv2i32 = 2641, VSUBHNv4i16 = 2642, VSUBHNv8i8 = 2643, VSUBLsv2i64 = 2644, VSUBLsv4i32 = 2645, VSUBLsv8i16 = 2646, VSUBLuv2i64 = 2647, VSUBLuv4i32 = 2648, VSUBLuv8i16 = 2649, VSUBS = 2650, VSUBWsv2i64 = 2651, VSUBWsv4i32 = 2652, VSUBWsv8i16 = 2653, VSUBWuv2i64 = 2654, VSUBWuv4i32 = 2655, VSUBWuv8i16 = 2656, VSUBfd = 2657, VSUBfq = 2658, VSUBhd = 2659, VSUBhq = 2660, VSUBv16i8 = 2661, VSUBv1i64 = 2662, VSUBv2i32 = 2663, VSUBv2i64 = 2664, VSUBv4i16 = 2665, VSUBv4i32 = 2666, VSUBv8i16 = 2667, VSUBv8i8 = 2668, VSWPd = 2669, VSWPq = 2670, VTBL1 = 2671, VTBL2 = 2672, VTBL3 = 2673, VTBL3Pseudo = 2674, VTBL4 = 2675, VTBL4Pseudo = 2676, VTBX1 = 2677, VTBX2 = 2678, VTBX3 = 2679, VTBX3Pseudo = 2680, VTBX4 = 2681, VTBX4Pseudo = 2682, VTOSHD = 2683, VTOSHH = 2684, VTOSHS = 2685, VTOSIRD = 2686, VTOSIRH = 2687, VTOSIRS = 2688, VTOSIZD = 2689, VTOSIZH = 2690, VTOSIZS = 2691, VTOSLD = 2692, VTOSLH = 2693, VTOSLS = 2694, VTOUHD = 2695, VTOUHH = 2696, VTOUHS = 2697, VTOUIRD = 2698, VTOUIRH = 2699, VTOUIRS = 2700, VTOUIZD = 2701, VTOUIZH = 2702, VTOUIZS = 2703, VTOULD = 2704, VTOULH = 2705, VTOULS = 2706, VTRNd16 = 2707, VTRNd32 = 2708, VTRNd8 = 2709, VTRNq16 = 2710, VTRNq32 = 2711, VTRNq8 = 2712, VTSTv16i8 = 2713, VTSTv2i32 = 2714, VTSTv4i16 = 2715, VTSTv4i32 = 2716, VTSTv8i16 = 2717, VTSTv8i8 = 2718, VUDOTD = 2719, VUDOTDI = 2720, VUDOTQ = 2721, VUDOTQI = 2722, VUHTOD = 2723, VUHTOH = 2724, VUHTOS = 2725, VUITOD = 2726, VUITOH = 2727, VUITOS = 2728, VULTOD = 2729, VULTOH = 2730, VULTOS = 2731, VUZPd16 = 2732, VUZPd8 = 2733, VUZPq16 = 2734, VUZPq32 = 2735, VUZPq8 = 2736, VZIPd16 = 2737, VZIPd8 = 2738, VZIPq16 = 2739, VZIPq32 = 2740, VZIPq8 = 2741, sysLDMDA = 2742, sysLDMDA_UPD = 2743, sysLDMDB = 2744, sysLDMDB_UPD = 2745, sysLDMIA = 2746, sysLDMIA_UPD = 2747, sysLDMIB = 2748, sysLDMIB_UPD = 2749, sysSTMDA = 2750, sysSTMDA_UPD = 2751, sysSTMDB = 2752, sysSTMDB_UPD = 2753, sysSTMIA = 2754, sysSTMIA_UPD = 2755, sysSTMIB = 2756, sysSTMIB_UPD = 2757, t2ADCri = 2758, t2ADCrr = 2759, t2ADCrs = 2760, t2ADDri = 2761, t2ADDri12 = 2762, t2ADDrr = 2763, t2ADDrs = 2764, t2ADR = 2765, t2ANDri = 2766, t2ANDrr = 2767, t2ANDrs = 2768, t2ASRri = 2769, t2ASRrr = 2770, t2B = 2771, t2BFC = 2772, t2BFI = 2773, t2BICri = 2774, t2BICrr = 2775, t2BICrs = 2776, t2BXJ = 2777, t2Bcc = 2778, t2CDP = 2779, t2CDP2 = 2780, t2CLREX = 2781, t2CLZ = 2782, t2CMNri = 2783, t2CMNzrr = 2784, t2CMNzrs = 2785, t2CMPri = 2786, t2CMPrr = 2787, t2CMPrs = 2788, t2CPS1p = 2789, t2CPS2p = 2790, t2CPS3p = 2791, t2CRC32B = 2792, t2CRC32CB = 2793, t2CRC32CH = 2794, t2CRC32CW = 2795, t2CRC32H = 2796, t2CRC32W = 2797, t2DBG = 2798, t2DCPS1 = 2799, t2DCPS2 = 2800, t2DCPS3 = 2801, t2DMB = 2802, t2DSB = 2803, t2EORri = 2804, t2EORrr = 2805, t2EORrs = 2806, t2HINT = 2807, t2HVC = 2808, t2ISB = 2809, t2IT = 2810, t2Int_eh_sjlj_setjmp = 2811, t2Int_eh_sjlj_setjmp_nofp = 2812, t2LDA = 2813, t2LDAB = 2814, t2LDAEX = 2815, t2LDAEXB = 2816, t2LDAEXD = 2817, t2LDAEXH = 2818, t2LDAH = 2819, t2LDC2L_OFFSET = 2820, t2LDC2L_OPTION = 2821, t2LDC2L_POST = 2822, t2LDC2L_PRE = 2823, t2LDC2_OFFSET = 2824, t2LDC2_OPTION = 2825, t2LDC2_POST = 2826, t2LDC2_PRE = 2827, t2LDCL_OFFSET = 2828, t2LDCL_OPTION = 2829, t2LDCL_POST = 2830, t2LDCL_PRE = 2831, t2LDC_OFFSET = 2832, t2LDC_OPTION = 2833, t2LDC_POST = 2834, t2LDC_PRE = 2835, t2LDMDB = 2836, t2LDMDB_UPD = 2837, t2LDMIA = 2838, t2LDMIA_UPD = 2839, t2LDRBT = 2840, t2LDRB_POST = 2841, t2LDRB_PRE = 2842, t2LDRBi12 = 2843, t2LDRBi8 = 2844, t2LDRBpci = 2845, t2LDRBs = 2846, t2LDRD_POST = 2847, t2LDRD_PRE = 2848, t2LDRDi8 = 2849, t2LDREX = 2850, t2LDREXB = 2851, t2LDREXD = 2852, t2LDREXH = 2853, t2LDRHT = 2854, t2LDRH_POST = 2855, t2LDRH_PRE = 2856, t2LDRHi12 = 2857, t2LDRHi8 = 2858, t2LDRHpci = 2859, t2LDRHs = 2860, t2LDRSBT = 2861, t2LDRSB_POST = 2862, t2LDRSB_PRE = 2863, t2LDRSBi12 = 2864, t2LDRSBi8 = 2865, t2LDRSBpci = 2866, t2LDRSBs = 2867, t2LDRSHT = 2868, t2LDRSH_POST = 2869, t2LDRSH_PRE = 2870, t2LDRSHi12 = 2871, t2LDRSHi8 = 2872, t2LDRSHpci = 2873, t2LDRSHs = 2874, t2LDRT = 2875, t2LDR_POST = 2876, t2LDR_PRE = 2877, t2LDRi12 = 2878, t2LDRi8 = 2879, t2LDRpci = 2880, t2LDRs = 2881, t2LSLri = 2882, t2LSLrr = 2883, t2LSRri = 2884, t2LSRrr = 2885, t2MCR = 2886, t2MCR2 = 2887, t2MCRR = 2888, t2MCRR2 = 2889, t2MLA = 2890, t2MLS = 2891, t2MOVTi16 = 2892, t2MOVi = 2893, t2MOVi16 = 2894, t2MOVr = 2895, t2MOVsra_flag = 2896, t2MOVsrl_flag = 2897, t2MRC = 2898, t2MRC2 = 2899, t2MRRC = 2900, t2MRRC2 = 2901, t2MRS_AR = 2902, t2MRS_M = 2903, t2MRSbanked = 2904, t2MRSsys_AR = 2905, t2MSR_AR = 2906, t2MSR_M = 2907, t2MSRbanked = 2908, t2MUL = 2909, t2MVNi = 2910, t2MVNr = 2911, t2MVNs = 2912, t2ORNri = 2913, t2ORNrr = 2914, t2ORNrs = 2915, t2ORRri = 2916, t2ORRrr = 2917, t2ORRrs = 2918, t2PKHBT = 2919, t2PKHTB = 2920, t2PLDWi12 = 2921, t2PLDWi8 = 2922, t2PLDWs = 2923, t2PLDi12 = 2924, t2PLDi8 = 2925, t2PLDpci = 2926, t2PLDs = 2927, t2PLIi12 = 2928, t2PLIi8 = 2929, t2PLIpci = 2930, t2PLIs = 2931, t2QADD = 2932, t2QADD16 = 2933, t2QADD8 = 2934, t2QASX = 2935, t2QDADD = 2936, t2QDSUB = 2937, t2QSAX = 2938, t2QSUB = 2939, t2QSUB16 = 2940, t2QSUB8 = 2941, t2RBIT = 2942, t2REV = 2943, t2REV16 = 2944, t2REVSH = 2945, t2RFEDB = 2946, t2RFEDBW = 2947, t2RFEIA = 2948, t2RFEIAW = 2949, t2RORri = 2950, t2RORrr = 2951, t2RRX = 2952, t2RSBri = 2953, t2RSBrr = 2954, t2RSBrs = 2955, t2SADD16 = 2956, t2SADD8 = 2957, t2SASX = 2958, t2SBCri = 2959, t2SBCrr = 2960, t2SBCrs = 2961, t2SBFX = 2962, t2SDIV = 2963, t2SEL = 2964, t2SETPAN = 2965, t2SG = 2966, t2SHADD16 = 2967, t2SHADD8 = 2968, t2SHASX = 2969, t2SHSAX = 2970, t2SHSUB16 = 2971, t2SHSUB8 = 2972, t2SMC = 2973, t2SMLABB = 2974, t2SMLABT = 2975, t2SMLAD = 2976, t2SMLADX = 2977, t2SMLAL = 2978, t2SMLALBB = 2979, t2SMLALBT = 2980, t2SMLALD = 2981, t2SMLALDX = 2982, t2SMLALTB = 2983, t2SMLALTT = 2984, t2SMLATB = 2985, t2SMLATT = 2986, t2SMLAWB = 2987, t2SMLAWT = 2988, t2SMLSD = 2989, t2SMLSDX = 2990, t2SMLSLD = 2991, t2SMLSLDX = 2992, t2SMMLA = 2993, t2SMMLAR = 2994, t2SMMLS = 2995, t2SMMLSR = 2996, t2SMMUL = 2997, t2SMMULR = 2998, t2SMUAD = 2999, t2SMUADX = 3000, t2SMULBB = 3001, t2SMULBT = 3002, t2SMULL = 3003, t2SMULTB = 3004, t2SMULTT = 3005, t2SMULWB = 3006, t2SMULWT = 3007, t2SMUSD = 3008, t2SMUSDX = 3009, t2SRSDB = 3010, t2SRSDB_UPD = 3011, t2SRSIA = 3012, t2SRSIA_UPD = 3013, t2SSAT = 3014, t2SSAT16 = 3015, t2SSAX = 3016, t2SSUB16 = 3017, t2SSUB8 = 3018, t2STC2L_OFFSET = 3019, t2STC2L_OPTION = 3020, t2STC2L_POST = 3021, t2STC2L_PRE = 3022, t2STC2_OFFSET = 3023, t2STC2_OPTION = 3024, t2STC2_POST = 3025, t2STC2_PRE = 3026, t2STCL_OFFSET = 3027, t2STCL_OPTION = 3028, t2STCL_POST = 3029, t2STCL_PRE = 3030, t2STC_OFFSET = 3031, t2STC_OPTION = 3032, t2STC_POST = 3033, t2STC_PRE = 3034, t2STL = 3035, t2STLB = 3036, t2STLEX = 3037, t2STLEXB = 3038, t2STLEXD = 3039, t2STLEXH = 3040, t2STLH = 3041, t2STMDB = 3042, t2STMDB_UPD = 3043, t2STMIA = 3044, t2STMIA_UPD = 3045, t2STRBT = 3046, t2STRB_POST = 3047, t2STRB_PRE = 3048, t2STRBi12 = 3049, t2STRBi8 = 3050, t2STRBs = 3051, t2STRD_POST = 3052, t2STRD_PRE = 3053, t2STRDi8 = 3054, t2STREX = 3055, t2STREXB = 3056, t2STREXD = 3057, t2STREXH = 3058, t2STRHT = 3059, t2STRH_POST = 3060, t2STRH_PRE = 3061, t2STRHi12 = 3062, t2STRHi8 = 3063, t2STRHs = 3064, t2STRT = 3065, t2STR_POST = 3066, t2STR_PRE = 3067, t2STRi12 = 3068, t2STRi8 = 3069, t2STRs = 3070, t2SUBS_PC_LR = 3071, t2SUBri = 3072, t2SUBri12 = 3073, t2SUBrr = 3074, t2SUBrs = 3075, t2SXTAB = 3076, t2SXTAB16 = 3077, t2SXTAH = 3078, t2SXTB = 3079, t2SXTB16 = 3080, t2SXTH = 3081, t2TBB = 3082, t2TBH = 3083, t2TEQri = 3084, t2TEQrr = 3085, t2TEQrs = 3086, t2TSB = 3087, t2TSTri = 3088, t2TSTrr = 3089, t2TSTrs = 3090, t2TT = 3091, t2TTA = 3092, t2TTAT = 3093, t2TTT = 3094, t2UADD16 = 3095, t2UADD8 = 3096, t2UASX = 3097, t2UBFX = 3098, t2UDF = 3099, t2UDIV = 3100, t2UHADD16 = 3101, t2UHADD8 = 3102, t2UHASX = 3103, t2UHSAX = 3104, t2UHSUB16 = 3105, t2UHSUB8 = 3106, t2UMAAL = 3107, t2UMLAL = 3108, t2UMULL = 3109, t2UQADD16 = 3110, t2UQADD8 = 3111, t2UQASX = 3112, t2UQSAX = 3113, t2UQSUB16 = 3114, t2UQSUB8 = 3115, t2USAD8 = 3116, t2USADA8 = 3117, t2USAT = 3118, t2USAT16 = 3119, t2USAX = 3120, t2USUB16 = 3121, t2USUB8 = 3122, t2UXTAB = 3123, t2UXTAB16 = 3124, t2UXTAH = 3125, t2UXTB = 3126, t2UXTB16 = 3127, t2UXTH = 3128, tADC = 3129, tADDhirr = 3130, tADDi3 = 3131, tADDi8 = 3132, tADDrSP = 3133, tADDrSPi = 3134, tADDrr = 3135, tADDspi = 3136, tADDspr = 3137, tADR = 3138, tAND = 3139, tASRri = 3140, tASRrr = 3141, tB = 3142, tBIC = 3143, tBKPT = 3144, tBL = 3145, tBLXNSr = 3146, tBLXi = 3147, tBLXr = 3148, tBX = 3149, tBXNS = 3150, tBcc = 3151, tCBNZ = 3152, tCBZ = 3153, tCMNz = 3154, tCMPhir = 3155, tCMPi8 = 3156, tCMPr = 3157, tCPS = 3158, tEOR = 3159, tHINT = 3160, tHLT = 3161, tInt_WIN_eh_sjlj_longjmp = 3162, tInt_eh_sjlj_longjmp = 3163, tInt_eh_sjlj_setjmp = 3164, tLDMIA = 3165, tLDRBi = 3166, tLDRBr = 3167, tLDRHi = 3168, tLDRHr = 3169, tLDRSB = 3170, tLDRSH = 3171, tLDRi = 3172, tLDRpci = 3173, tLDRr = 3174, tLDRspi = 3175, tLSLri = 3176, tLSLrr = 3177, tLSRri = 3178, tLSRrr = 3179, tMOVSr = 3180, tMOVi8 = 3181, tMOVr = 3182, tMUL = 3183, tMVN = 3184, tORR = 3185, tPICADD = 3186, tPOP = 3187, tPUSH = 3188, tREV = 3189, tREV16 = 3190, tREVSH = 3191, tROR = 3192, tRSB = 3193, tSBC = 3194, tSETEND = 3195, tSTMIA_UPD = 3196, tSTRBi = 3197, tSTRBr = 3198, tSTRHi = 3199, tSTRHr = 3200, tSTRi = 3201, tSTRr = 3202, tSTRspi = 3203, tSUBi3 = 3204, tSUBi8 = 3205, tSUBrr = 3206, tSUBspi = 3207, tSVC = 3208, tSXTB = 3209, tSXTH = 3210, tTRAP = 3211, tTST = 3212, tUDF = 3213, tUXTB = 3214, tUXTH = 3215, t__brkdiv0 = 3216, INSTRUCTION_LIST_END = 3217 }; } // end ARM namespace } // end llvm namespace #endif // GET_INSTRINFO_ENUM #ifdef GET_INSTRINFO_SCHED_ENUM #undef GET_INSTRINFO_SCHED_ENUM namespace llvm { namespace ARM { namespace Sched { enum { NoInstrModel = 0, IIC_iALUi_WriteALU_ReadALU = 1, IIC_iALUr_WriteALU_ReadALU_ReadALU = 2, IIC_iALUsr_WriteALUsi_ReadALU = 3, IIC_iALUsr_WriteALUSsr_ReadALUsr = 4, IIC_Br_WriteBr = 5, IIC_Br_WriteBrTbl = 6, IIC_iLoad_mBr = 7, IIC_iLoad_i = 8, IIC_iLoadiALU = 9, IIC_iMAC32_WriteMAC32_ReadMUL_ReadMUL_ReadMAC = 10, IIC_iCMOVi_WriteALU = 11, IIC_iMOVi_WriteALU = 12, IIC_iCMOVix2 = 13, IIC_iCMOVr_WriteALU = 14, IIC_iCMOVsr_WriteALU = 15, IIC_iMOVix2addpc = 16, IIC_iMOVix2ld = 17, IIC_iMOVix2 = 18, IIC_iMOVsi_WriteALU = 19, IIC_iMUL32_WriteMUL32_ReadMUL_ReadMUL = 20, IIC_iALUr_WriteALU_ReadALU = 21, IIC_iLoad_r = 22, IIC_iLoad_bh_r = 23, IIC_iStore_r = 24, IIC_iStore_bh_r = 25, IIC_iMAC64_WriteMAC64Lo_WriteMAC64Hi_ReadMUL_ReadMUL_ReadMAC_ReadMAC = 26, IIC_iMUL64_WriteMUL64Lo_WriteMUL64Hi_ReadMUL_ReadMUL = 27, IIC_iStore_ru = 28, IIC_Br = 29, IIC_VMOVImm = 30, IIC_fpUNA64 = 31, IIC_fpUNA32 = 32, IIC_iALUsi_WriteALUsi_ReadALUsr = 33, IIC_iCMOVsi_WriteALU = 34, IIC_iALUsi_WriteALUsi_ReadALU = 35, IIC_iStore_ru_WriteST = 36, IIC_iALUr_WriteALU = 37, IIC_iALUi_WriteALU = 38, IIC_iLoad_mu = 39, IIC_iPop_Br_WriteBrL = 40, IIC_iALUsr_WriteALUsr_ReadALUsr = 41, IIC_iBITi_WriteALU_ReadALU = 42, IIC_iBITr_WriteALU_ReadALU_ReadALU = 43, IIC_iBITsr_WriteALUsi_ReadALU = 44, IIC_iBITsr_WriteALUsr_ReadALUsr = 45, IIC_iUNAsi = 46, IIC_Br_WriteBrL = 47, WriteBrL = 48, WriteBr = 49, IIC_iUNAr_WriteALU = 50, IIC_iCMPi_WriteCMP_ReadALU = 51, IIC_iCMPr_WriteCMP_ReadALU_ReadALU = 52, IIC_iCMPsr_WriteCMPsi_ReadALU = 53, IIC_iCMPsr_WriteCMPsr_ReadALU = 54, IIC_fpUNA16 = 55, IIC_fpSTAT = 56, IIC_iLoad_m = 57, IIC_iLoad_bh_ru = 58, IIC_iLoad_bh_iu = 59, IIC_iLoad_bh_si = 60, IIC_iLoad_d_r = 61, IIC_iLoad_d_ru = 62, IIC_iLoad_ru = 63, IIC_iLoad_iu = 64, IIC_iLoad_si = 65, IIC_iMOVr_WriteALU = 66, IIC_iMOVsr_WriteALU = 67, IIC_iMVNi_WriteALU = 68, IIC_iMVNr_WriteALU = 69, IIC_iMVNsr_WriteALU = 70, IIC_iBITsi_WriteALUsi_ReadALU = 71, IIC_Preload_WritePreLd = 72, IIC_iDIV_WriteDIV = 73, IIC_iMAC16_WriteMAC16_ReadMUL_ReadMUL_ReadMAC = 74, WriteMAC32_ReadMUL_ReadMUL_ReadMAC = 75, WriteMAC64Lo_WriteMAC64Hi_ReadMUL_ReadMUL_ReadMAC_ReadMAC = 76, WriteMUL64Lo_WriteMUL64Hi_ReadMUL_ReadMUL = 77, WriteMUL32_ReadMUL_ReadMUL = 78, IIC_iMUL16_WriteMUL16_ReadMUL_ReadMUL = 79, IIC_iStore_m = 80, IIC_iStore_mu = 81, IIC_iStore_bh_ru = 82, IIC_iStore_bh_iu = 83, IIC_iStore_bh_si = 84, IIC_iStore_d_r = 85, IIC_iStore_d_ru = 86, IIC_iStore_iu = 87, IIC_iStore_si = 88, IIC_iEXTAr_WriteALUsr = 89, IIC_iEXTr_WriteALUsi = 90, IIC_iTSTi_WriteCMP_ReadALU = 91, IIC_iTSTr_WriteCMP_ReadALU_ReadALU = 92, IIC_iTSTsr_WriteCMPsi_ReadALU = 93, IIC_iTSTsr_WriteCMPsr_ReadALU = 94, IIC_iMUL64_WriteMAC64Lo_WriteMAC64Hi_ReadMUL_ReadMUL = 95, WriteALU_ReadALU_ReadALU = 96, IIC_VABAD = 97, IIC_VABAQ = 98, IIC_VSUBi4Q = 99, IIC_VBIND = 100, IIC_VBINQ = 101, IIC_VSUBi4D = 102, IIC_VUNAD = 103, IIC_VUNAQ = 104, IIC_VUNAiQ = 105, IIC_VUNAiD = 106, IIC_fpALU64_WriteFPALU64 = 107, IIC_fpALU16_WriteFPALU32 = 108, IIC_VBINi4D = 109, IIC_VSHLiD = 110, IIC_fpALU32_WriteFPALU32 = 111, IIC_VSUBiD = 112, IIC_VBINiQ = 113, IIC_VBINiD = 114, IIC_VCNTiD = 115, IIC_VCNTiQ = 116, IIC_VMACD = 117, IIC_VMACQ = 118, IIC_fpCMP64 = 119, IIC_fpCMP16 = 120, IIC_fpCMP32 = 121, WriteFPCVT = 122, IIC_fpCVTSH_WriteFPCVT = 123, IIC_fpCVTHS_WriteFPCVT = 124, IIC_fpCVTDS_WriteFPCVT = 125, IIC_fpCVTSD_WriteFPCVT = 126, IIC_fpDIV64_WriteFPDIV64 = 127, IIC_fpDIV16_WriteFPDIV32 = 128, IIC_fpDIV32_WriteFPDIV32 = 129, IIC_VMOVIS = 130, IIC_VMOVD = 131, IIC_VMOVQ = 132, IIC_VEXTD = 133, IIC_VEXTQ = 134, IIC_fpFMAC64_WriteFPMAC64_ReadFPMAC_ReadFPMUL_ReadFPMUL = 135, IIC_fpFMAC16_WriteFPMAC32_ReadFPMAC_ReadFPMUL_ReadFPMUL = 136, IIC_fpFMAC32_WriteFPMAC32_ReadFPMAC_ReadFPMUL_ReadFPMUL = 137, IIC_VFMACD = 138, IIC_VFMACQ = 139, IIC_VMOVSI = 140, IIC_VBINi4Q = 141, IIC_fpCVTDI = 142, IIC_VLD1dup_WriteVLD2 = 143, IIC_VLD1dupu = 144, IIC_VLD1dup = 145, IIC_VLD1dupu_WriteVLD1 = 146, IIC_VLD1ln = 147, IIC_VLD1lnu_WriteVLD1 = 148, IIC_VLD1ln_WriteVLD1 = 149, IIC_VLD1_WriteVLD1 = 150, IIC_VLD1x4_WriteVLD4 = 151, IIC_VLD1x2u_WriteVLD4 = 152, IIC_VLD1x3_WriteVLD3 = 153, IIC_VLD1x2u_WriteVLD3 = 154, IIC_VLD1u_WriteVLD1 = 155, IIC_VLD1x2_WriteVLD2 = 156, IIC_VLD1x2u_WriteVLD2 = 157, IIC_VLD2dup = 158, IIC_VLD2dupu_WriteVLD1 = 159, IIC_VLD2dup_WriteVLD2 = 160, IIC_VLD2ln_WriteVLD1 = 161, IIC_VLD2lnu_WriteVLD1 = 162, IIC_VLD2lnu = 163, IIC_VLD2_WriteVLD2 = 164, IIC_VLD2u_WriteVLD2 = 165, IIC_VLD2x2_WriteVLD4 = 166, IIC_VLD2x2u_WriteVLD4 = 167, IIC_VLD3dup_WriteVLD2 = 168, IIC_VLD3dupu_WriteVLD2 = 169, IIC_VLD3ln_WriteVLD2 = 170, IIC_VLD3lnu_WriteVLD2 = 171, IIC_VLD3_WriteVLD3 = 172, IIC_VLD3u_WriteVLD3 = 173, IIC_VLD4dup = 174, IIC_VLD4dup_WriteVLD2 = 175, IIC_VLD4dupu_WriteVLD2 = 176, IIC_VLD4ln_WriteVLD2 = 177, IIC_VLD4lnu_WriteVLD2 = 178, IIC_VLD4lnu = 179, IIC_VLD4_WriteVLD4 = 180, IIC_VLD4u_WriteVLD4 = 181, IIC_fpLoad_mu = 182, IIC_fpLoad_m = 183, IIC_fpLoad64 = 184, IIC_fpLoad16 = 185, IIC_fpLoad32 = 186, IIC_fpStore_m = 187, IIC_fpMAC64_WriteFPMAC64_ReadFPMAC_ReadFPMUL_ReadFPMUL = 188, IIC_fpMAC16 = 189, IIC_VMACi32D = 190, IIC_VMACi16D = 191, IIC_fpMAC32_WriteFPMAC32_ReadFPMAC_ReadFPMUL_ReadFPMUL = 192, IIC_VMACi32Q = 193, IIC_VMACi16Q = 194, IIC_fpMOVID_WriteFPMOV = 195, IIC_fpMOVIS_WriteFPMOV = 196, IIC_VQUNAiD = 197, IIC_VMOVN = 198, IIC_fpMOVSI_WriteFPMOV = 199, IIC_fpMOVDI_WriteFPMOV = 200, IIC_fpMUL64_WriteFPMUL64_ReadFPMUL_ReadFPMUL = 201, IIC_fpMUL16_WriteFPMUL32_ReadFPMUL_ReadFPMUL = 202, IIC_VMULi16D = 203, IIC_VMULi32D = 204, IIC_fpMUL32_WriteFPMUL32_ReadFPMUL_ReadFPMUL = 205, IIC_VFMULD = 206, IIC_VFMULQ = 207, IIC_VMULi16Q = 208, IIC_VMULi32Q = 209, IIC_VSHLiQ = 210, IIC_VPALiQ = 211, IIC_VPALiD = 212, IIC_VPBIND = 213, IIC_VQUNAiQ = 214, IIC_VSHLi4Q = 215, IIC_VSHLi4D = 216, IIC_VRECSD = 217, IIC_VRECSQ = 218, IIC_VDOTPROD = 219, IIC_VMOVISL = 220, IIC_fpCVTID_WriteFPCVT = 221, IIC_fpCVTIH_WriteFPCVT = 222, IIC_fpCVTIS_WriteFPCVT = 223, IIC_fpSQRT64_WriteFPSQRT64 = 224, IIC_fpSQRT16 = 225, IIC_fpSQRT32_WriteFPSQRT32 = 226, IIC_VST1ln_WriteVST1 = 227, IIC_VST1lnu_WriteVST1 = 228, IIC_VST1_WriteVST1 = 229, IIC_VST1x4_WriteVST4 = 230, IIC_VLD1x4u_WriteVST4 = 231, IIC_VST1x3_WriteVST3 = 232, IIC_VLD1x3u_WriteVST3 = 233, IIC_VLD1u_WriteVST1 = 234, IIC_VST1x4u_WriteVST4 = 235, IIC_VST1x3u_WriteVST3 = 236, IIC_VST1x2_WriteVST2 = 237, IIC_VLD1x2u_WriteVST2 = 238, IIC_VST2ln_WriteVST1 = 239, IIC_VST2lnu_WriteVST1 = 240, IIC_VST2lnu = 241, IIC_VST2 = 242, IIC_VLD1u_WriteVST2 = 243, IIC_VST2_WriteVST2 = 244, IIC_VST2x2_WriteVST4 = 245, IIC_VST2x2u_WriteVST4 = 246, IIC_VLD1u_WriteVST4 = 247, IIC_VST3ln_WriteVST2 = 248, IIC_VST3lnu_WriteVST2 = 249, IIC_VST3lnu = 250, IIC_VST3ln = 251, IIC_VST3_WriteVST3 = 252, IIC_VST3u_WriteVST3 = 253, IIC_VST4ln_WriteVST2 = 254, IIC_VST4lnu_WriteVST2 = 255, IIC_VST4lnu = 256, IIC_VST4_WriteVST4 = 257, IIC_VST4u_WriteVST4 = 258, IIC_fpStore_mu = 259, IIC_fpStore64 = 260, IIC_fpStore16 = 261, IIC_fpStore32 = 262, IIC_VSUBiQ = 263, IIC_VTB1 = 264, IIC_VTB2 = 265, IIC_VTB3 = 266, IIC_VTB4 = 267, IIC_VTBX1 = 268, IIC_VTBX2 = 269, IIC_VTBX3 = 270, IIC_VTBX4 = 271, IIC_fpCVTDI_WriteFPCVT = 272, IIC_fpCVTHI_WriteFPCVT = 273, IIC_fpCVTSI_WriteFPCVT = 274, IIC_fpCVTSI = 275, IIC_VPERMD = 276, IIC_VPERMQ = 277, IIC_VPERMQ3 = 278, IIC_iBITi = 279, IIC_iCMPsi_WriteCMPsi_ReadALU_ReadALU = 280, IIC_iCMPi_WriteCMP = 281, IIC_iCMPr_WriteCMP = 282, IIC_iCMPsi_WriteCMPsi = 283, IIC_iALUx = 284, WriteLd = 285, IIC_iLoad_bh_i_WriteLd = 286, IIC_iLoad_bh_iu_WriteLd = 287, IIC_iLoad_bh_si_WriteLd = 288, IIC_iLoad_d_ru_WriteLd = 289, IIC_iLoad_d_i_WriteLd = 290, IIC_iLoad_i_WriteLd = 291, IIC_iLoad_iu_WriteLd = 292, IIC_iLoad_si_WriteLd = 293, IIC_iMVNsi_WriteALU = 294, IIC_iALUsir_WriteALUsi_ReadALU = 295, IIC_iMUL16_WriteMAC16_ReadMUL_ReadMUL_ReadMAC = 296, IIC_iMAC32 = 297, WriteST = 298, IIC_iStore_bh_i_WriteST = 299, IIC_iStore_bh_iu_WriteST = 300, IIC_iStore_bh_si_WriteST = 301, IIC_iStore_d_ru_WriteST = 302, IIC_iStore_d_r_WriteST = 303, IIC_iStore_iu_WriteST = 304, IIC_iStore_i_WriteST = 305, IIC_iStore_si_WriteST = 306, IIC_iEXTAsr_WriteALU_ReadALU = 307, IIC_iEXTr_WriteALU_ReadALU = 308, IIC_iTSTi_WriteCMP = 309, IIC_iTSTr_WriteCMP = 310, IIC_iTSTsi_WriteCMPsi = 311, IIC_iBITr_WriteALU = 312, IIC_iLoad_bh_i = 313, IIC_iMUL32 = 314, IIC_iPop = 315, IIC_iStore_bh_i = 316, IIC_iStore_i = 317, IIC_iTSTr_WriteALU = 318, ANDri_ORRri_EORri_BICri = 319, ANDrr_ORRrr_EORrr_BICrr = 320, ANDrsi_ORRrsi_EORrsi_BICrsi = 321, ANDrsr_ORRrsr_EORrsr_BICrsr = 322, MOVsra_flag_MOVsrl_flag = 323, MOVsr_MOVsi = 324, MVNsr = 325, MOVCCsi_MOVCCsr = 326, MVNr = 327, MOVCCi32imm = 328, MOVi32imm = 329, MOV_ga_pcrel = 330, MOV_ga_pcrel_ldr = 331, SEL = 332, BFC_BFI_UBFX_SBFX = 333, MULv5_MUL_SMMUL_SMMULR = 334, MLAv5_MLA_MLS_SMMLA_SMMLAR_SMMLS_SMMLSR = 335, SMULLv5_SMULL_UMULLv5 = 336, UMULL = 337, SMLAL_UMLALv5_UMLAL_UMAAL_SMLALv5_SMLALBB_SMLALBT_SMLALTB_SMLALTT = 338, SMLAD_SMLADX_SMLSD_SMLSDX = 339, SMLALD_SMLSLD = 340, SMLALDX_SMLSLDX = 341, SMUAD_SMUADX_SMUSD_SMUSDX = 342, SMULBB_SMULBT_SMULTB_SMULTT_SMULWB_SMULWT = 343, SMLABB_SMLABT_SMLATB_SMLATT_SMLAWB_SMLAWT = 344, LDRi12_PICLDR = 345, LDRrs = 346, LDRBi12_PICLDRH_PICLDRB_PICLDRSH_PICLDRSB_LDRH_LDRSH_LDRSB = 347, LDRHTi_LDRHTr_LDRH_POST_LDRH_PRE_LDRSHTi_LDRSHTr_LDRSH_POST_LDRSH_PRE_LDRSBTi_LDRSBTr_LDRSB_POST_LDRSB_PRE = 348, SXTB_SXTB16_SXTH_UXTB_UXTB16_UXTH = 349, t2SXTB_t2SXTB16_t2SXTH_t2UXTB_t2UXTB16_t2UXTH = 350, t2MOVCCi32imm = 351, t2MOVi32imm = 352, t2MOV_ga_pcrel = 353, t2MOVi16_ga_pcrel = 354, t2SEL = 355, t2BFC_t2UBFX_t2SBFX = 356, t2BFI = 357, QADD_QADD16_QADD8_QSUB_QSUB16_QSUB8_QDADD_QDSUB_QASX_QSAX_UQADD8_UQADD16_UQSUB8_UQSUB16_UQASX_UQSAX = 358, SSAT_SSAT16_USAT_USAT16_t2QADD_t2QADD16_t2QADD8_t2QSUB_t2QSUB16_t2QSUB8_t2QDADD_t2QDSUB_t2SSAT_t2SSAT16_t2USAT_t2USAT16_t2QASX_t2QSAX_t2UQADD8_t2UQADD16_t2UQSUB8_t2UQSUB16_t2UQASX_t2UQSAX = 359, SADD8_SADD16_SSUB8_SSUB16_SASX_SSAX_UADD8_UADD16_USUB8_USUB16_UASX_USAX = 360, t2SADD8_t2SADD16_t2SSUB8_t2SSUB16_t2SASX_t2SSAX_t2UADD8_t2UADD16_t2USUB8_t2USUB16_t2UASX_t2USAX = 361, SHADD8_SHADD16_SHSUB8_SHSUB16_SHASX_SHSAX_UHADD8_UHADD16_UHSUB8_UHSUB16_UHASX_UHSAX = 362, SXTAB_SXTAB16_SXTAH_UXTAB_UXTAB16_UXTAH = 363, t2SHADD8_t2SHADD16_t2SHSUB8_t2SHSUB16_t2SHASX_t2SHSAX_t2UHADD8_t2UHADD16_t2UHSUB8_t2UHSUB16_t2UHASX_t2UHSAX = 364, t2SXTAB_t2SXTAB16_t2SXTAH_t2UXTAB_t2UXTAB16_t2UXTAH = 365, USAD8 = 366, USADA8 = 367, SMUSD_SMUSDX = 368, t2MUL_t2SMMUL_t2SMMULR = 369, t2SMULBB_t2SMULBT_t2SMULTB_t2SMULTT_t2SMULWB_t2SMULWT = 370, t2SMUSD_t2SMUSDX = 371, t2MLA_t2MLS_t2SMMLA_t2SMMLAR_t2SMMLS_t2SMMLSR = 372, t2SMUAD_t2SMUADX = 373, SMLSD_SMLSDX = 374, t2SMLABB_t2SMLABT_t2SMLATB_t2SMLATT_t2SMLAWB_t2SMLAWT = 375, t2SMLSD_t2SMLSDX = 376, t2SMLAD_t2SMLADX = 377, SMULL = 378, t2SMULL_t2UMULL = 379, t2SMLAL_t2SMLALBB_t2SMLALBT_t2SMLALD_t2SMLALDX_t2SMLALTB_t2SMLALTT_t2UMLAL_t2SMLSLD_t2SMLSLDX_t2UMAAL = 380, SDIV_UDIV_t2SDIV_t2UDIV = 381, LDRi12 = 382, LDRBi12 = 383, LDRBrs = 384, t2LDRpci_pic = 385, t2LDRi12_t2LDRi8_t2LDRpci = 386, t2LDRs = 387, t2LDRBi12_t2LDRBi8_t2LDRBpci_t2LDRHi12_t2LDRHi8_t2LDRHpci = 388, t2LDRBs_t2LDRHs = 389, LDREX_LDREXB_LDREXD_LDREXH_tLDRpci_pic = 390, tLDRBi_tLDRHi = 391, tLDRBr_tLDRHr = 392, tLDRi_tLDRpci_tLDRspi = 393, tLDRr = 394, LDRH_PICLDRB_PICLDRH = 395, LDRcp = 396, t2LDRSBpcrel_t2LDRSHpcrel = 397, t2LDRSBi12_t2LDRSBi8_t2LDRSBpci_t2LDRSHi12_t2LDRSHi8_t2LDRSHpci = 398, t2LDRSBs_t2LDRSHs = 399, tLDRSB_tLDRSH = 400, LDRBT_POST_IMM_LDRBT_POST_REG_LDRB_POST_REG_LDRB_PRE_REG = 401, LDRB_POST_IMM_LDRB_PRE_IMM_t2LDRB_POST = 402, LDRT_POST_IMM_LDRT_POST_REG_LDR_POST_REG_LDR_PRE_REG = 403, LDR_POST_IMM_LDR_PRE_IMM = 404, LDRH_POST_LDRH_PRE_LDRHTi_LDRHTr = 405, t2LDRB_PRE_t2LDRH_POST_t2LDRH_PRE = 406, t2LDR_POST_t2LDR_PRE = 407, t2LDRBT_t2LDRHT = 408, t2LDRT = 409, t2LDRSB_POST_t2LDRSB_PRE_t2LDRSH_POST_t2LDRSH_PRE = 410, t2LDRSBT_t2LDRSHT = 411, t2LDRDi8 = 412, LDRD = 413, LDRD_POST_LDRD_PRE = 414, t2LDRD_POST_t2LDRD_PRE = 415, LDMDA_LDMDB_LDMIA_LDMIB_t2LDMDB_t2LDMIA_sysLDMDA_sysLDMDB_sysLDMIA_sysLDMIB_tLDMIA = 416, LDMDA_UPD_LDMDB_UPD_LDMIA_UPD_LDMIB_UPD_tLDMIA_UPD_sysLDMDA_UPD_sysLDMDB_UPD_sysLDMIA_UPD_sysLDMIB_UPD_t2LDMDB_UPD_t2LDMIA_UPD = 417, LDMIA_RET_t2LDMIA_RET = 418, tPOP_RET = 419, tPOP = 420, PICSTR_STRi12_tSTRr = 421, PICSTRB_PICSTRH_STRBi12_STRH_tSTRBr_tSTRHr = 422, STRrs = 423, STRBrs = 424, STREX_STREXB_STREXD_STREXH = 425, t2STRi12_t2STRi8 = 426, t2STRs = 427, t2STRBi12_t2STRBi8_t2STRHi12_t2STRHi8 = 428, t2STRBs_t2STRHs = 429, tSTRBi_tSTRHi = 430, tSTRi_tSTRspi = 431, STRBT_POST_IMM_STRBT_POST_REG_STRB_POST_REG_STRB_PRE_REG_STRH_POST_STRH_PRE_STRHTi_STRHTr = 432, STRB_POST_IMM_STRB_PRE_IMM = 433, STRT_POST_IMM_STRT_POST_REG_STR_POST_REG_STR_PRE_REG_STRi_preidx_STRr_preidx_STRBi_preidx_STRBr_preidx_STRH_preidx = 434, STR_POST_IMM_STR_PRE_IMM = 435, STRBT_POST_STRT_POST = 436, t2STR_POST_t2STR_PRE_t2STRH_PRE = 437, t2STRB_POST_t2STRB_PRE_t2STRH_POST = 438, t2STR_preidx_t2STRB_preidx_t2STRH_preidx = 439, t2STRBT_t2STRHT = 440, t2STRT = 441, STRD = 442, t2STRDi8 = 443, t2STRD_POST_t2STRD_PRE = 444, STRD_POST_STRD_PRE = 445, STMDA_STMDB_STMIA_STMIB_sysSTMDA_sysSTMDB_sysSTMIA_sysSTMIB_t2STMDB_t2STMIA = 446, STMDA_UPD_STMDB_UPD_STMIA_UPD_STMIB_UPD_sysSTMDA_UPD_sysSTMDB_UPD_sysSTMIA_UPD_sysSTMIB_UPD_t2STMDB_UPD_t2STMIA_UPD_tSTMIA_UPD = 447, tPUSH = 448, LDRLIT_ga_abs_tLDRLIT_ga_abs = 449, LDRLIT_ga_pcrel_tLDRLIT_ga_pcrel = 450, LDRLIT_ga_pcrel_ldr = 451, t2IT = 452, ITasm = 453, VADDv16i8_VADDv2i64_VADDv4i32_VADDv8i16_VANDq_VBICq_VEORq_VORNq_VORRq_VBIFq_VBITq = 454, VADDv1i64_VADDv2i32_VADDv4i16_VADDv8i8_VANDd_VBICd_VEORd_VORNd_VORRd_VBIFd_VBITd = 455, VSUBv16i8_VSUBv2i64_VSUBv4i32_VSUBv8i16 = 456, VSUBv1i64_VSUBv2i32_VSUBv4i16_VSUBv8i8_VADDWsv2i64_VADDWsv4i32_VADDWsv8i16_VADDWuv2i64_VADDWuv4i32_VADDWuv8i16_VSUBWsv2i64_VSUBWsv4i32_VSUBWsv8i16_VSUBWuv2i64_VSUBWuv4i32_VSUBWuv8i16 = 457, VNEGf32q = 458, VNEGfd = 459, VNEGs16d_VNEGs32d_VNEGs8d_VADDLsv2i64_VADDLsv4i32_VADDLsv8i16_VADDLuv2i64_VADDLuv4i32_VADDLuv8i16_VSUBLsv2i64_VSUBLsv4i32_VSUBLsv8i16_VSUBLuv2i64_VSUBLuv4i32_VSUBLuv8i16_VPADDi16_VPADDi32_VPADDi8_VPADDLsv16i8_VPADDLsv2i32_VPADDLsv4i16_VPADDLsv4i32_VPADDLsv8i16_VPADDLsv8i8_VPADDLuv16i8_VPADDLuv2i32_VPADDLuv4i16_VPADDLuv4i32_VPADDLuv8i16_VPADDLuv8i8_VSHLLi16_VSHLLi32_VSHLLi8_VSHLLsv2i64_VSHLLsv4i32_VSHLLsv8i16_VSHLLuv2i64_VSHLLuv4i32_VSHLLuv8i16_VSHLiv16i8_VSHLiv1i64_VSHLiv2i32_VSHLiv2i64_VSHLiv4i16_VSHLiv4i32_VSHLiv8i16_VSHLiv8i8_VSHLsv1i64_VSHLsv2i32_VSHLsv4i16_VSHLsv8i8_VSHLuv1i64_VSHLuv2i32_VSHLuv4i16_VSHLuv8i8_VSHRsv16i8_VSHRsv1i64_VSHRsv2i32_VSHRsv2i64_VSHRsv4i16_VSHRsv4i32_VSHRsv8i16_VSHRsv8i8_VSHRuv16i8_VSHRuv1i64_VSHRuv2i32_VSHRuv2i64_VSHRuv4i16_VSHRuv4i32_VSHRuv8i16_VSHRuv8i8_VSLIv1i64_VSLIv2i32_VSLIv4i16_VSLIv8i8_VSRIv1i64_VSRIv2i32_VSRIv4i16_VSRIv8i8 = 460, VNEGs16q_VNEGs32q_VNEGs8q_VSHLsv16i8_VSHLsv2i64_VSHLsv4i32_VSHLsv8i16_VSHLuv16i8_VSHLuv2i64_VSHLuv4i32_VSHLuv8i16_VSLIv16i8_VSLIv2i64_VSLIv4i32_VSLIv8i16_VSRIv16i8_VSRIv2i64_VSRIv4i32_VSRIv8i16 = 461, VHADDsv16i8_VHADDsv4i32_VHADDsv8i16_VHADDuv16i8_VHADDuv4i32_VHADDuv8i16_VRHADDsv16i8_VRHADDsv4i32_VRHADDsv8i16_VRHADDuv16i8_VRHADDuv4i32_VRHADDuv8i16_VTSTv16i8_VTSTv4i32_VTSTv8i16 = 462, VHADDsv2i32_VHADDsv4i16_VHADDsv8i8_VHADDuv2i32_VHADDuv4i16_VHADDuv8i8_VRHADDsv2i32_VRHADDsv4i16_VRHADDsv8i8_VRHADDuv2i32_VRHADDuv4i16_VRHADDuv8i8_VTSTv2i32_VTSTv4i16_VTSTv8i8 = 463, VHSUBsv16i8_VHSUBsv4i32_VHSUBsv8i16_VHSUBuv16i8_VHSUBuv4i32_VHSUBuv8i16 = 464, VHSUBsv2i32_VHSUBsv4i16_VHSUBsv8i8_VHSUBuv2i32_VHSUBuv4i16_VHSUBuv8i8 = 465, VBICiv2i32_VBICiv4i16_VBICiv4i32_VBICiv8i16_VORRiv2i32_VORRiv4i16_VORRiv4i32_VORRiv8i16 = 466, VQSHLsiv16i8_VQSHLsiv1i64_VQSHLsiv2i32_VQSHLsiv2i64_VQSHLsiv4i16_VQSHLsiv4i32_VQSHLsiv8i16_VQSHLsiv8i8_VQSHLsuv16i8_VQSHLsuv1i64_VQSHLsuv2i32_VQSHLsuv2i64_VQSHLsuv4i16_VQSHLsuv4i32_VQSHLsuv8i16_VQSHLsuv8i8_VQSHLsv1i64_VQSHLsv2i32_VQSHLsv4i16_VQSHLsv8i8_VQSHLuiv16i8_VQSHLuiv1i64_VQSHLuiv2i32_VQSHLuiv2i64_VQSHLuiv4i16_VQSHLuiv4i32_VQSHLuiv8i16_VQSHLuiv8i8_VQSHLuv1i64_VQSHLuv2i32_VQSHLuv4i16_VQSHLuv8i8 = 467, VQSHLsv16i8_VQSHLsv2i64_VQSHLsv4i32_VQSHLsv8i16_VQSHLuv16i8_VQSHLuv2i64_VQSHLuv4i32_VQSHLuv8i16 = 468, VBSLd_VCLSv2i32_VCLSv4i16_VCLSv8i8_VCLZv2i32_VCLZv4i16_VCLZv8i8_VCNTd = 469, VBSLq_VCLSv16i8_VCLSv4i32_VCLSv8i16_VCLZv16i8_VCLZv4i32_VCLZv8i16_VCNTq = 470, VEXTd16_VEXTd32_VEXTd8 = 471, VEXTq16_VEXTq32_VEXTq64_VEXTq8 = 472, VREV16d8_VREV32d16_VREV32d8_VREV64d16_VREV64d32_VREV64d8 = 473, VREV16q8_VREV32q16_VREV32q8_VREV64q16_VREV64q32_VREV64q8 = 474, VABALsv2i64_VABALsv4i32_VABALsv8i16_VABALuv2i64_VABALuv4i32_VABALuv8i16_VABAsv2i32_VABAsv4i16_VABAsv8i8_VABAuv2i32_VABAuv4i16_VABAuv8i8 = 475, VABAsv16i8_VABAsv4i32_VABAsv8i16_VABAuv16i8_VABAuv4i32_VABAuv8i16 = 476, VPADALsv16i8_VPADALsv4i32_VPADALsv8i16_VPADALuv16i8_VPADALuv4i32_VPADALuv8i16 = 477, VPADALsv2i32_VPADALsv4i16_VPADALsv8i8_VPADALuv2i32_VPADALuv4i16_VPADALuv8i8_VRSRAsv16i8_VRSRAsv1i64_VRSRAsv2i32_VRSRAsv2i64_VRSRAsv4i16_VRSRAsv4i32_VRSRAsv8i16_VRSRAsv8i8_VRSRAuv16i8_VRSRAuv1i64_VRSRAuv2i32_VRSRAuv2i64_VRSRAuv4i16_VRSRAuv4i32_VRSRAuv8i16_VRSRAuv8i8_VSRAsv16i8_VSRAsv1i64_VSRAsv2i32_VSRAsv2i64_VSRAsv4i16_VSRAsv4i32_VSRAsv8i16_VSRAsv8i8_VSRAuv16i8_VSRAuv1i64_VSRAuv2i32_VSRAuv2i64_VSRAuv4i16_VSRAuv4i32_VSRAuv8i16_VSRAuv8i8 = 478, VACGEfd_VACGEhd_VACGTfd_VACGThd_VCEQfd_VCEQhd_VCGEfd_VCGEhd_VCGTfd_VCGThd = 479, VACGEfq_VACGEhq_VACGTfq_VACGThq_VCEQfq_VCEQhq_VCGEfq_VCGEhq_VCGTfq_VCGThq = 480, VCEQv16i8_VCEQv4i32_VCEQv8i16_VCGEsv16i8_VCGEsv4i32_VCGEsv8i16_VCGEuv16i8_VCGEuv4i32_VCGEuv8i16_VCGTsv16i8_VCGTsv4i32_VCGTsv8i16_VCGTuv16i8_VCGTuv4i32_VCGTuv8i16_VQSUBsv16i8_VQSUBsv2i64_VQSUBsv4i32_VQSUBsv8i16_VQSUBuv16i8_VQSUBuv2i64_VQSUBuv4i32_VQSUBuv8i16 = 481, VCEQv2i32_VCEQv4i16_VCEQv8i8_VCGEsv2i32_VCGEsv4i16_VCGEsv8i8_VCGEuv2i32_VCGEuv4i16_VCGEuv8i8_VCGTsv2i32_VCGTsv4i16_VCGTsv8i8_VCGTuv2i32_VCGTuv4i16_VCGTuv8i8_VQSUBsv1i64_VQSUBsv2i32_VQSUBsv4i16_VQSUBsv8i8_VQSUBuv1i64_VQSUBuv2i32_VQSUBuv4i16_VQSUBuv8i8 = 482, VCEQzv16i8_VCEQzv2f32_VCEQzv2i32_VCEQzv4f16_VCEQzv4f32_VCEQzv4i16_VCEQzv4i32_VCEQzv8f16_VCEQzv8i16_VCEQzv8i8_VCGEzv16i8_VCGEzv2f32_VCGEzv2i32_VCGEzv4f16_VCGEzv4f32_VCGEzv4i16_VCGEzv4i32_VCGEzv8f16_VCGEzv8i16_VCGEzv8i8_VCGTzv16i8_VCGTzv2f32_VCGTzv2i32_VCGTzv4f16_VCGTzv4f32_VCGTzv4i16_VCGTzv4i32_VCGTzv8f16_VCGTzv8i16_VCGTzv8i8_VCLEzv16i8_VCLEzv2f32_VCLEzv2i32_VCLEzv4f16_VCLEzv4f32_VCLEzv4i16_VCLEzv4i32_VCLEzv8f16_VCLEzv8i16_VCLEzv8i8_VCLTzv16i8_VCLTzv2f32_VCLTzv2i32_VCLTzv4f16_VCLTzv4f32_VCLTzv4i16_VCLTzv4i32_VCLTzv8f16_VCLTzv8i16_VCLTzv8i8 = 483, VRSHLsv16i8_VRSHLsv2i64_VRSHLsv4i32_VRSHLsv8i16_VRSHLuv16i8_VRSHLuv2i64_VRSHLuv4i32_VRSHLuv8i16_VQRSHLsv16i8_VQRSHLsv2i64_VQRSHLsv4i32_VQRSHLsv8i16_VQRSHLuv16i8_VQRSHLuv2i64_VQRSHLuv4i32_VQRSHLuv8i16 = 484, VRSHLsv1i64_VRSHLsv2i32_VRSHLsv4i16_VRSHLsv8i8_VRSHLuv1i64_VRSHLuv2i32_VRSHLuv4i16_VRSHLuv8i8_VQRSHLsv1i64_VQRSHLsv2i32_VQRSHLsv4i16_VQRSHLsv8i8_VQRSHLuv1i64_VQRSHLuv2i32_VQRSHLuv4i16_VQRSHLuv8i8_VRSHRsv16i8_VRSHRsv1i64_VRSHRsv2i32_VRSHRsv2i64_VRSHRsv4i16_VRSHRsv4i32_VRSHRsv8i16_VRSHRsv8i8_VRSHRuv16i8_VRSHRuv1i64_VRSHRuv2i32_VRSHRuv2i64_VRSHRuv4i16_VRSHRuv4i32_VRSHRuv8i16_VRSHRuv8i8 = 485, VABSfd = 486, VABSfq = 487, VABSv16i8_VABSv4i32_VABSv8i16 = 488, VABSv2i32_VABSv4i16_VABSv8i8 = 489, VQABSv16i8_VQABSv4i32_VQABSv8i16_VQNEGv16i8_VQNEGv4i32_VQNEGv8i16 = 490, VQABSv2i32_VQABSv4i16_VQABSv8i8_VQNEGv2i32_VQNEGv4i16_VQNEGv8i8 = 491, VQADDsv16i8_VQADDsv2i64_VQADDsv4i32_VQADDsv8i16_VQADDuv16i8_VQADDuv2i64_VQADDuv4i32_VQADDuv8i16 = 492, VQADDsv1i64_VQADDsv2i32_VQADDsv4i16_VQADDsv8i8_VQADDuv1i64_VQADDuv2i32_VQADDuv4i16_VQADDuv8i8 = 493, VRECPEd_VRECPEfd_VRECPEhd_VRSQRTEd_VRSQRTEfd_VRSQRTEhd = 494, VRECPEfq_VRECPEhq_VRECPEq_VRSQRTEfq_VRSQRTEhq_VRSQRTEq = 495, VADDHNv2i32_VADDHNv4i16_VADDHNv8i8_VSUBHNv2i32_VSUBHNv4i16_VSUBHNv8i8 = 496, VSHRNv2i32_VSHRNv4i16_VSHRNv8i8 = 497, VRADDHNv2i32_VRADDHNv4i16_VRADDHNv8i8_VRSUBHNv2i32_VRSUBHNv4i16_VRSUBHNv8i8 = 498, VRSHRNv2i32_VRSHRNv4i16_VRSHRNv8i8_VQSHRNsv2i32_VQSHRNsv4i16_VQSHRNsv8i8_VQSHRNuv2i32_VQSHRNuv4i16_VQSHRNuv8i8_VQSHRUNv2i32_VQSHRUNv4i16_VQSHRUNv8i8_VQRSHRNsv2i32_VQRSHRNsv4i16_VQRSHRNsv8i8_VQRSHRNuv2i32_VQRSHRNuv4i16_VQRSHRNuv8i8_VQRSHRUNv2i32_VQRSHRUNv4i16_VQRSHRUNv8i8 = 499, VTBL1 = 500, VTBX1 = 501, VTBL2 = 502, VTBX2 = 503, VTBL3_VTBL3Pseudo = 504, VTBX3_VTBX3Pseudo = 505, VTBL4_VTBL4Pseudo = 506, VTBX4_VTBX4Pseudo = 507, VSWPd_VSWPq = 508, VTRNd16_VTRNd32_VTRNd8_VUZPd16_VUZPd8_VZIPd16_VZIPd8 = 509, VTRNq16_VTRNq32_VTRNq8 = 510, VUZPq16_VUZPq32_VUZPq8_VZIPq16_VZIPq32_VZIPq8 = 511, VABSD_VNEGD = 512, VABSS_VNEGS = 513, VCMPD_VCMPZD_VCMPED_VCMPEZD = 514, VCMPS_VCMPZS_VCMPES_VCMPEZS = 515, VADDS_VSUBS = 516, VADDfd_VSUBfd_VABDfd_VABDhd_VMAXfd_VMAXhd_VMINfd_VMINhd = 517, VADDfq_VSUBfq_VABDfq_VABDhq_VMAXfq_VMAXhq_VMINfq_VMINhq = 518, VABDLsv2i64_VABDLsv4i32_VABDLsv8i16_VABDLuv2i64_VABDLuv4i32_VABDLuv8i16_VABDsv16i8_VABDsv4i32_VABDsv8i16_VABDuv16i8_VABDuv4i32_VABDuv8i16_VMAXsv16i8_VMAXsv4i32_VMAXsv8i16_VMAXuv16i8_VMAXuv4i32_VMAXuv8i16_VMINsv16i8_VMINsv4i32_VMINsv8i16_VMINuv16i8_VMINuv4i32_VMINuv8i16 = 519, VABDsv2i32_VABDsv4i16_VABDsv8i8_VABDuv2i32_VABDuv4i16_VABDuv8i8_VMAXsv2i32_VMAXsv4i16_VMAXsv8i8_VMAXuv2i32_VMAXuv4i16_VMAXuv8i8_VMINsv2i32_VMINsv4i16_VMINsv8i8_VMINuv2i32_VMINuv4i16_VMINuv8i8_VPMAXs16_VPMAXs32_VPMAXs8_VPMAXu16_VPMAXu32_VPMAXu8_VPMINs16_VPMINs32_VPMINs8_VPMINu16_VPMINu32_VPMINu8 = 520, VPADDf_VPMAXf_VPMAXh_VPMINf_VPMINh = 521, VMAXNMD_VMAXNMH_VMAXNMNDf_VMAXNMNDh_VMAXNMNQf_VMAXNMNQh_VMAXNMS_VMINNMD_VMINNMH_VMINNMNDf_VMINNMNDh_VMINNMNQf_VMINNMNQh_VMINNMS = 522, VADDD_VSUBD = 523, VRECPSfd_VRECPShd_VRSQRTSfd_VRSQRTShd = 524, VRECPSfq_VRECPShq_VRSQRTSfq_VRSQRTShq = 525, VMULS_VNMULS = 526, VMULfd = 527, VMULfq = 528, VMULpd_VMULslhd_VMULslv4i16_VMULv4i16_VMULv8i8_VQDMULHslv4i16_VQDMULHv4i16_VQRDMULHslv4i16_VQRDMULHv4i16_VMULLp8_VMULLslsv2i32_VMULLslsv4i16_VMULLsluv2i32_VMULLsluv4i16_VMULLsv4i32_VMULLsv8i16_VMULLuv4i32_VMULLuv8i16_VQDMULLslv2i32_VQDMULLslv4i16_VQDMULLv4i32 = 529, VMULpq_VMULslhq_VMULslv8i16_VMULv16i8_VMULv8i16_VQDMULHslv8i16_VQDMULHv8i16_VQRDMULHslv8i16_VQRDMULHv8i16 = 530, VMULslfd = 531, VMULslfq = 532, VMULslv2i32_VMULv2i32_VQDMULHslv2i32_VQDMULHv2i32_VQRDMULHslv2i32_VQRDMULHv2i32_VMULLsv2i64_VMULLuv2i64_VQDMULLv2i64 = 533, VMULslv4i32_VMULv4i32_VQDMULHslv4i32_VQDMULHv4i32_VQRDMULHslv4i32_VQRDMULHv4i32 = 534, VMULLp64 = 535, VMLAD_VMLSD_VNMLAD_VNMLSD = 536, VMLAH_VMLSH_VNMLAH_VNMLSH = 537, VMLALslsv2i32_VMLALsluv2i32_VMLALsv2i64_VMLALuv2i64_VMLAslv2i32_VMLAv2i32_VMLSLslsv2i32_VMLSLsluv2i32_VMLSLsv2i64_VMLSLuv2i64_VMLSslv2i32_VMLSv2i32_VQDMLALslv2i32_VQDMLALv2i64_VQDMLSLslv2i32_VQDMLSLv2i64 = 538, VMLALslsv4i16_VMLALsluv4i16_VMLALsv4i32_VMLALsv8i16_VMLALuv4i32_VMLALuv8i16_VMLAslv4i16_VMLAv4i16_VMLAv8i8_VMLSLslsv4i16_VMLSLsluv4i16_VMLSLsv4i32_VMLSLsv8i16_VMLSLuv4i32_VMLSLuv8i16_VMLSslv4i16_VMLSv4i16_VMLSv8i8_VQDMLALslv4i16_VQDMLALv4i32_VQDMLSLslv4i16_VQDMLSLv4i32 = 539, VMLAS_VMLSS_VNMLAS_VNMLSS = 540, VMLAfd_VMLAhd_VMLAslfd_VMLAslhd_VMLSfd_VMLShd_VMLSslfd_VMLSslhd = 541, VMLAfq_VMLAhq_VMLAslfq_VMLAslhq_VMLSfq_VMLShq_VMLSslfq_VMLSslhq = 542, VMLAslv4i32_VMLAv4i32_VMLSslv4i32_VMLSv4i32 = 543, VMLAslv8i16_VMLAv16i8_VMLAv8i16_VMLSslv8i16_VMLSv16i8_VMLSv8i16 = 544, VFMAD_VFMSD_VFNMAD_VFNMSD = 545, VFMAS_VFMSS_VFNMAS_VFNMSS = 546, VFNMAH_VFNMSH = 547, VFMAfd_VFMSfd = 548, VFMAfq_VFMSfq = 549, VCVTANSDf_VCVTANSDh_VCVTANSQf_VCVTANSQh_VCVTANUDf_VCVTANUDh_VCVTANUQf_VCVTANUQh_VCVTASD_VCVTASH_VCVTASS_VCVTAUD_VCVTAUH_VCVTAUS_VCVTBDH_VCVTMNSDf_VCVTMNSDh_VCVTMNSQf_VCVTMNSQh_VCVTMNUDf_VCVTMNUDh_VCVTMNUQf_VCVTMNUQh_VCVTMSD_VCVTMSH_VCVTMSS_VCVTMUD_VCVTMUH_VCVTMUS_VCVTNNSDf_VCVTNNSDh_VCVTNNSQf_VCVTNNSQh_VCVTNNUDf_VCVTNNUDh_VCVTNNUQf_VCVTNNUQh_VCVTNSD_VCVTNSH_VCVTNSS_VCVTNUD_VCVTNUH_VCVTNUS_VCVTPNSDf_VCVTPNSDh_VCVTPNSQf_VCVTPNSQh_VCVTPNUDf_VCVTPNUDh_VCVTPNUQf_VCVTPNUQh_VCVTPSD_VCVTPSH_VCVTPSS_VCVTPUD_VCVTPUH_VCVTPUS_VCVTTDH_VCVTTHD = 550, VCVTBHD = 551, VCVTBHS_VCVTTHS = 552, VCVTBSH_VCVTTSH = 553, VCVTDS = 554, VCVTSD = 555, VCVTf2h_VCVTf2sq_VCVTf2uq_VCVTf2xsq_VCVTf2xuq_VCVTh2f_VCVTh2sq_VCVTh2uq_VCVTh2xsq_VCVTh2xuq_VCVTs2fq_VCVTs2hq_VCVTu2fq_VCVTu2hq_VCVTxs2fq_VCVTxs2hq_VCVTxu2fq_VCVTxu2hq = 556, VCVTf2sd_VCVTf2ud_VCVTf2xsd_VCVTf2xud_VCVTh2sd_VCVTh2ud_VCVTh2xsd_VCVTh2xud_VCVTs2fd_VCVTs2hd_VCVTu2fd_VCVTu2hd_VCVTxs2fd_VCVTxs2hd_VCVTxu2fd_VCVTxu2hd = 557, VSITOD_VUITOD = 558, VSITOH_VUITOH = 559, VSITOS_VUITOS = 560, VTOSHD_VTOSIRD_VTOSIZD_VTOSLD_VTOUHD_VTOUIRD_VTOUIZD_VTOULD = 561, VTOSHH_VTOSIRH_VTOSIZH_VTOSLH_VTOUHH_VTOUIRH_VTOUIZH_VTOULH = 562, VTOSHS_VTOSIRS_VTOSIZS_VTOUIRS_VTOUIZS = 563, VTOSLS_VTOUHS_VTOULS = 564, VMOVv16i8_VMOVv1i64_VMOVv2f32_VMOVv2i32_VMOVv2i64_VMOVv4f32_VMOVv4i16_VMOVv4i32_VMOVv8i16_VMOVv8i8_VMVNv2i32_VMVNv4i16_VMVNv4i32_VMVNv8i16 = 565, VMOVD_VMOVDcc_FCONSTD = 566, VMOVS_VMOVScc_FCONSTS = 567, VMVNd_VMVNq = 568, VMOVNv2i32_VMOVNv4i16_VMOVNv8i8 = 569, VMOVLsv2i64_VMOVLsv4i32_VMOVLsv8i16_VMOVLuv2i64_VMOVLuv4i32_VMOVLuv8i16 = 570, VQMOVNsuv2i32_VQMOVNsuv4i16_VQMOVNsuv8i8_VQMOVNsv2i32_VQMOVNsv4i16_VQMOVNsv8i8_VQMOVNuv2i32_VQMOVNuv4i16_VQMOVNuv8i8 = 571, VDUPLN16d_VDUPLN32d_VDUPLN8d = 572, VDUPLN16q_VDUPLN32q_VDUPLN8q = 573, VDUP16d_VDUP16q_VDUP32d_VDUP32q_VDUP8d_VDUP8q = 574, VMOVRS = 575, VMOVSR = 576, VSETLNi16_VSETLNi32_VSETLNi8 = 577, VMOVRRD_VMOVRRS = 578, VMOVDRR = 579, VMOVSRR = 580, VGETLNi32_VGETLNu16_VGETLNu8 = 581, VGETLNs16_VGETLNs8 = 582, VMRS_VMRS_FPEXC_VMRS_FPINST_VMRS_FPINST2_VMRS_FPSID_VMRS_MVFR0_VMRS_MVFR1_VMRS_MVFR2 = 583, VMSR_VMSR_FPEXC_VMSR_FPINST_VMSR_FPINST2_VMSR_FPSID = 584, FMSTAT = 585, VLDRD = 586, VLDRS = 587, VSTRD = 588, VSTRS = 589, VLDMQIA = 590, VSTMQIA = 591, VLDMDIA_VLDMSIA = 592, VLDMDDB_UPD_VLDMDIA_UPD_VLDMSDB_UPD_VLDMSIA_UPD = 593, VSTMDIA_VSTMSIA = 594, VSTMDDB_UPD_VSTMDIA_UPD_VSTMSDB_UPD_VSTMSIA_UPD = 595, VLD1d16_VLD1d32_VLD1d64_VLD1d8 = 596, VLD1q16_VLD1q32_VLD1q64_VLD1q8 = 597, VLD1d16wb_fixed_VLD1d16wb_register_VLD1d32wb_fixed_VLD1d32wb_register_VLD1d64wb_fixed_VLD1d64wb_register_VLD1d8wb_fixed_VLD1d8wb_register = 598, VLD1q16wb_fixed_VLD1q16wb_register_VLD1q32wb_fixed_VLD1q32wb_register_VLD1q64wb_fixed_VLD1q64wb_register_VLD1q8wb_fixed_VLD1q8wb_register = 599, VLD1d16T_VLD1d32T_VLD1d64T_VLD1d8T_VLD1d64TPseudo_VLD1d64TPseudoWB_fixed_VLD1d64TPseudoWB_register = 600, VLD1d16Twb_fixed_VLD1d16Twb_register_VLD1d32Twb_fixed_VLD1d32Twb_register_VLD1d64Twb_fixed_VLD1d64Twb_register_VLD1d8Twb_fixed_VLD1d8Twb_register = 601, VLD1d16Q_VLD1d32Q_VLD1d64Q_VLD1d8Q_VLD1d64QPseudo_VLD1d64QPseudoWB_fixed_VLD1d64QPseudoWB_register = 602, VLD1d16Qwb_fixed_VLD1d16Qwb_register_VLD1d32Qwb_fixed_VLD1d32Qwb_register_VLD1d64Qwb_fixed_VLD1d64Qwb_register_VLD1d8Qwb_fixed_VLD1d8Qwb_register = 603, VLD2b16_VLD2b32_VLD2b8_VLD2d16_VLD2d32_VLD2d8 = 604, VLD2q16_VLD2q32_VLD2q8_VLD2q16Pseudo_VLD2q32Pseudo_VLD2q8Pseudo = 605, VLD2b16wb_fixed_VLD2b16wb_register_VLD2b32wb_fixed_VLD2b32wb_register_VLD2b8wb_fixed_VLD2b8wb_register_VLD2d16wb_fixed_VLD2d16wb_register_VLD2d32wb_fixed_VLD2d32wb_register_VLD2d8wb_fixed_VLD2d8wb_register = 606, VLD2q16wb_fixed_VLD2q16wb_register_VLD2q32wb_fixed_VLD2q32wb_register_VLD2q8wb_fixed_VLD2q8wb_register_VLD2q16PseudoWB_fixed_VLD2q16PseudoWB_register_VLD2q32PseudoWB_fixed_VLD2q32PseudoWB_register_VLD2q8PseudoWB_fixed_VLD2q8PseudoWB_register = 607, VLD3d16_VLD3d32_VLD3d8_VLD3q16_VLD3q32_VLD3q8 = 608, VLD3d16Pseudo_VLD3d32Pseudo_VLD3d8Pseudo_VLD3q16oddPseudo_VLD3q32oddPseudo_VLD3q8oddPseudo = 609, VLD3d16_UPD_VLD3d32_UPD_VLD3d8_UPD_VLD3q16_UPD_VLD3q32_UPD_VLD3q8_UPD = 610, VLD3d16Pseudo_UPD_VLD3d32Pseudo_UPD_VLD3d8Pseudo_UPD_VLD3q16Pseudo_UPD_VLD3q16oddPseudo_UPD_VLD3q32Pseudo_UPD_VLD3q32oddPseudo_UPD_VLD3q8Pseudo_UPD_VLD3q8oddPseudo_UPD = 611, VLD4d16_VLD4d32_VLD4d8_VLD4q16_VLD4q32_VLD4q8 = 612, VLD4d16Pseudo_VLD4d32Pseudo_VLD4d8Pseudo_VLD4q16oddPseudo_VLD4q32oddPseudo_VLD4q8oddPseudo = 613, VLD4d16_UPD_VLD4d32_UPD_VLD4d8_UPD_VLD4q16_UPD_VLD4q32_UPD_VLD4q8_UPD = 614, VLD4d16Pseudo_UPD_VLD4d32Pseudo_UPD_VLD4d8Pseudo_UPD_VLD4q16Pseudo_UPD_VLD4q16oddPseudo_UPD_VLD4q32Pseudo_UPD_VLD4q32oddPseudo_UPD_VLD4q8Pseudo_UPD_VLD4q8oddPseudo_UPD = 615, VLD1DUPd16_VLD1DUPd32_VLD1DUPd8 = 616, VLD1DUPq16_VLD1DUPq32_VLD1DUPq8 = 617, VLD1LNd16_VLD1LNd8 = 618, VLD1LNd32_VLD1LNq16Pseudo_VLD1LNq32Pseudo_VLD1LNq8Pseudo = 619, VLD1DUPd16wb_fixed_VLD1DUPd16wb_register_VLD1DUPd32wb_fixed_VLD1DUPd32wb_register_VLD1DUPd8wb_fixed_VLD1DUPd8wb_register_VLD1DUPq16wb_register_VLD1DUPq32wb_register_VLD1DUPq8wb_register = 620, VLD1DUPq16wb_fixed_VLD1DUPq32wb_fixed_VLD1DUPq8wb_fixed = 621, VLD1LNd16_UPD_VLD1LNd32_UPD_VLD1LNd8_UPD_VLD1LNq16Pseudo_UPD_VLD1LNq32Pseudo_UPD_VLD1LNq8Pseudo_UPD = 622, VLD2DUPd16_VLD2DUPd16x2_VLD2DUPd32_VLD2DUPd32x2_VLD2DUPd8_VLD2DUPd8x2 = 623, VLD2LNd16_VLD2LNd32_VLD2LNd8_VLD2LNq16_VLD2LNq32_VLD2LNd16Pseudo_VLD2LNd32Pseudo_VLD2LNd8Pseudo_VLD2LNq16Pseudo_VLD2LNq32Pseudo = 624, VLD2LNd16_UPD_VLD2LNd32_UPD_VLD2LNd8_UPD_VLD2LNq16_UPD_VLD2LNq32_UPD = 625, VLD2DUPd16wb_fixed_VLD2DUPd16wb_register_VLD2DUPd16x2wb_fixed_VLD2DUPd16x2wb_register_VLD2DUPd32wb_fixed_VLD2DUPd32wb_register_VLD2DUPd32x2wb_fixed_VLD2DUPd32x2wb_register_VLD2DUPd8wb_fixed_VLD2DUPd8wb_register_VLD2DUPd8x2wb_fixed_VLD2DUPd8x2wb_register = 626, VLD2LNd16Pseudo_UPD_VLD2LNd32Pseudo_UPD_VLD2LNd8Pseudo_UPD_VLD2LNq16Pseudo_UPD_VLD2LNq32Pseudo_UPD = 627, VLD3DUPd16_VLD3DUPd32_VLD3DUPd8_VLD3DUPq16_VLD3DUPq32_VLD3DUPq8_VLD3DUPd16Pseudo_VLD3DUPd32Pseudo_VLD3DUPd8Pseudo = 628, VLD3LNd16_VLD3LNd32_VLD3LNd8_VLD3LNq16_VLD3LNq32_VLD3LNd16Pseudo_VLD3LNd32Pseudo_VLD3LNd8Pseudo_VLD3LNq16Pseudo_VLD3LNq32Pseudo = 629, VLD3DUPd16_UPD_VLD3DUPd32_UPD_VLD3DUPd8_UPD_VLD3DUPq16_UPD_VLD3DUPq32_UPD_VLD3DUPq8_UPD = 630, VLD3LNd16_UPD_VLD3LNd32_UPD_VLD3LNd8_UPD_VLD3LNq16_UPD_VLD3LNq32_UPD = 631, VLD3DUPd16Pseudo_UPD_VLD3DUPd32Pseudo_UPD_VLD3DUPd8Pseudo_UPD = 632, VLD3LNd16Pseudo_UPD_VLD3LNd32Pseudo_UPD_VLD3LNd8Pseudo_UPD_VLD3LNq16Pseudo_UPD_VLD3LNq32Pseudo_UPD = 633, VLD4DUPd16_VLD4DUPd32_VLD4DUPd8_VLD4DUPq16_VLD4DUPq32_VLD4DUPq8 = 634, VLD4LNd16_VLD4LNd32_VLD4LNd8_VLD4LNq16_VLD4LNq32_VLD4LNd16Pseudo_VLD4LNd32Pseudo_VLD4LNd8Pseudo_VLD4LNq16Pseudo_VLD4LNq32Pseudo = 635, VLD4DUPd16Pseudo_VLD4DUPd32Pseudo_VLD4DUPd8Pseudo = 636, VLD4DUPd16_UPD_VLD4DUPd32_UPD_VLD4DUPd8_UPD_VLD4DUPq16_UPD_VLD4DUPq32_UPD_VLD4DUPq8_UPD = 637, VLD4LNd16_UPD_VLD4LNd32_UPD_VLD4LNd8_UPD_VLD4LNq16_UPD_VLD4LNq32_UPD = 638, VLD4DUPd16Pseudo_UPD_VLD4DUPd32Pseudo_UPD_VLD4DUPd8Pseudo_UPD = 639, VLD4LNd16Pseudo_UPD_VLD4LNd32Pseudo_UPD_VLD4LNd8Pseudo_UPD_VLD4LNq16Pseudo_UPD_VLD4LNq32Pseudo_UPD = 640, VST1d16_VST1d32_VST1d64_VST1d8 = 641, VST1q16_VST1q32_VST1q64_VST1q8 = 642, VST1d16wb_fixed_VST1d16wb_register_VST1d32wb_fixed_VST1d32wb_register_VST1d64wb_fixed_VST1d64wb_register_VST1d8wb_fixed_VST1d8wb_register = 643, VST1q16wb_fixed_VST1q16wb_register_VST1q32wb_fixed_VST1q32wb_register_VST1q64wb_fixed_VST1q64wb_register_VST1q8wb_fixed_VST1q8wb_register = 644, VST1d16T_VST1d32T_VST1d64T_VST1d8T_VST1d64TPseudo = 645, VST1d16Twb_fixed_VST1d16Twb_register_VST1d32Twb_fixed_VST1d32Twb_register_VST1d64Twb_fixed_VST1d64Twb_register_VST1d8Twb_fixed_VST1d8Twb_register = 646, VST1d64TPseudoWB_fixed_VST1d64TPseudoWB_register = 647, VST1d16Q_VST1d16QPseudo_VST1d32Q_VST1d32QPseudo_VST1d64Q_VST1d64QPseudo_VST1d8Q_VST1d8QPseudo = 648, VST1d16Qwb_fixed_VST1d16Qwb_register_VST1d32Qwb_fixed_VST1d32Qwb_register_VST1d64Qwb_fixed_VST1d64Qwb_register_VST1d8Qwb_fixed_VST1d8Qwb_register = 649, VST1d64QPseudoWB_fixed_VST1d64QPseudoWB_register = 650, VST2b16_VST2b32_VST2b8 = 651, VST2d16_VST2d32_VST2d8 = 652, VST2b16wb_fixed_VST2b16wb_register_VST2b32wb_fixed_VST2b32wb_register_VST2b8wb_fixed_VST2b8wb_register_VST2d16wb_fixed_VST2d16wb_register_VST2d32wb_fixed_VST2d32wb_register_VST2d8wb_fixed_VST2d8wb_register = 653, VST2q16_VST2q32_VST2q8_VST2q16Pseudo_VST2q32Pseudo_VST2q8Pseudo = 654, VST2q16wb_fixed_VST2q16wb_register_VST2q32wb_fixed_VST2q32wb_register_VST2q8wb_fixed_VST2q8wb_register = 655, VST2q16PseudoWB_fixed_VST2q16PseudoWB_register_VST2q32PseudoWB_fixed_VST2q32PseudoWB_register_VST2q8PseudoWB_fixed_VST2q8PseudoWB_register = 656, VST3d16_VST3d32_VST3d8_VST3q16_VST3q32_VST3q8_VST3d16Pseudo_VST3d32Pseudo_VST3d8Pseudo_VST3q16oddPseudo_VST3q32oddPseudo_VST3q8oddPseudo = 657, VST3d16_UPD_VST3d32_UPD_VST3d8_UPD_VST3q16_UPD_VST3q32_UPD_VST3q8_UPD_VST3d16Pseudo_UPD_VST3d32Pseudo_UPD_VST3d8Pseudo_UPD_VST3q16Pseudo_UPD_VST3q16oddPseudo_UPD_VST3q32Pseudo_UPD_VST3q32oddPseudo_UPD_VST3q8Pseudo_UPD_VST3q8oddPseudo_UPD = 658, VST4d16_VST4d32_VST4d8_VST4q16_VST4q32_VST4q8_VST4d16Pseudo_VST4d32Pseudo_VST4d8Pseudo_VST4q16oddPseudo_VST4q32oddPseudo_VST4q8oddPseudo = 659, VST4d16_UPD_VST4d32_UPD_VST4d8_UPD_VST4q16_UPD_VST4q32_UPD_VST4q8_UPD_VST4d16Pseudo_UPD_VST4d32Pseudo_UPD_VST4d8Pseudo_UPD_VST4q16Pseudo_UPD_VST4q16oddPseudo_UPD_VST4q32Pseudo_UPD_VST4q32oddPseudo_UPD_VST4q8Pseudo_UPD_VST4q8oddPseudo_UPD = 660, VST1LNd16_VST1LNd32_VST1LNd8_VST1LNq16Pseudo_VST1LNq32Pseudo_VST1LNq8Pseudo = 661, VST1LNd16_UPD_VST1LNd32_UPD_VST1LNd8_UPD_VST1LNq16Pseudo_UPD_VST1LNq32Pseudo_UPD_VST1LNq8Pseudo_UPD = 662, VST2LNd16_VST2LNd32_VST2LNd8_VST2LNq16_VST2LNq32_VST2LNd16Pseudo_VST2LNd32Pseudo_VST2LNd8Pseudo_VST2LNq16Pseudo_VST2LNq32Pseudo = 663, VST2LNd16_UPD_VST2LNd32_UPD_VST2LNd8_UPD_VST2LNq16_UPD_VST2LNq32_UPD = 664, VST2LNd16Pseudo_UPD_VST2LNd32Pseudo_UPD_VST2LNd8Pseudo_UPD_VST2LNq16Pseudo_UPD_VST2LNq32Pseudo_UPD = 665, VST3LNd16_VST3LNd32_VST3LNd8_VST3LNq16_VST3LNq32_VST3LNd16Pseudo_VST3LNd32Pseudo_VST3LNd8Pseudo = 666, VST3LNq16Pseudo_VST3LNq32Pseudo = 667, VST3LNd16_UPD_VST3LNd32_UPD_VST3LNd8_UPD_VST3LNq16_UPD_VST3LNq32_UPD = 668, VST3LNd16Pseudo_UPD_VST3LNd32Pseudo_UPD_VST3LNd8Pseudo_UPD_VST3LNq16Pseudo_UPD_VST3LNq32Pseudo_UPD = 669, VST4LNd16_VST4LNd32_VST4LNd8_VST4LNq16_VST4LNq32_VST4LNd16Pseudo_VST4LNd32Pseudo_VST4LNd8Pseudo_VST4LNq16Pseudo_VST4LNq32Pseudo = 670, VST4LNd16_UPD_VST4LNd32_UPD_VST4LNd8_UPD_VST4LNq16_UPD_VST4LNq32_UPD = 671, VST4LNd16Pseudo_UPD_VST4LNd32Pseudo_UPD_VST4LNd8Pseudo_UPD_VST4LNq16Pseudo_UPD_VST4LNq32Pseudo_UPD = 672, VDIVS = 673, VSQRTS = 674, VDIVD = 675, VSQRTD = 676, ABS = 677, COPY = 678, t2MOVCCi_t2MOVCCi16 = 679, t2MOVi_t2MOVi16 = 680, t2ABS = 681, t2USAD8_t2USADA8 = 682, t2SDIV_t2UDIV = 683, t2LDREX_t2LDREXB_t2LDREXD_t2LDREXH_LDA_LDAB_LDAEX_LDAEXB_LDAEXD_LDAEXH_LDAH_t2LDAEX_t2LDAEXB_t2LDAEXD_t2LDAEXH = 684, t2LDA_t2LDAB_t2LDAH = 685, LDRBT_POST = 686, MOVsr = 687, t2MOVSsr_t2MOVsr = 688, t2MOVsra_flag_t2MOVsrl_flag = 689, MOVTi16_ga_pcrel_MOVTi16_t2MOVTi16_ga_pcrel_t2MOVTi16 = 690, ADDSri_ADCri_ADDri_RSBSri_RSBri_RSCri_SBCri_t2ADDSri_t2ADCri_t2ADDri_t2ADDri12_t2RSBSri_t2RSBri_t2SBCri = 691, CLZ_t2CLZ = 692, t2ANDri_t2BICri_t2EORri_t2ORRri = 693, t2MVNCCi = 694, t2MVNi = 695, t2MVNr = 696, t2MVNs = 697, ADDSrr_ADCrr_ADDrr_RSBrr_RSCrr_SBCrr_t2ADDSrr_t2ADCrr_t2ADDrr_t2SBCrr = 698, CRC32B_CRC32CB_CRC32CH_CRC32CW_CRC32H_CRC32W_t2CRC32B_t2CRC32CB_t2CRC32CH_t2CRC32CW_t2CRC32H_t2CRC32W = 699, t2ANDrr_t2BICrr_t2EORrr = 700, ADDSrsi_ADCrsi_ADDrsi_RSBrsi_RSCrsi_SBCrsi = 701, t2ADDSrs = 702, t2ADCrs_t2ADDrs_t2SBCrs = 703, t2ANDrs_t2BICrs_t2EORrs_t2ORRrs = 704, t2RSBrs = 705, ADDSrsr = 706, ADCrsr_ADDrsr_RSBrsr_RSCrsr_SBCrsr = 707, ADR = 708, MVNi = 709, MVNsi = 710, t2MOVSsi_t2MOVsi = 711, ASRi_RORi = 712, ASRr_RORr_LSRi_LSRr_LSLi_LSLr = 713, CMPri_CMNri = 714, CMPrr_CMNzrr = 715, CMPrsi_CMNzrsi = 716, CMPrsr_CMNzrsr = 717, t2LDC2L_OFFSET_t2LDC2L_OPTION_t2LDC2L_POST_t2LDC2L_PRE_t2LDC2_OFFSET_t2LDC2_OPTION_t2LDC2_POST_t2LDC2_PRE_t2LDCL_OFFSET_t2LDCL_OPTION_t2LDCL_POST_t2LDCL_PRE_t2LDC_OFFSET_t2LDC_OPTION_t2LDC_POST_t2LDC_PRE_RRXi = 718, RBIT_REV_REV16_REVSH = 719, RRX = 720, TSTri = 721, TSTrr = 722, TSTrsi = 723, TSTrsr = 724, MRS_MRSbanked_MRSsys = 725, MSR_MSRbanked_MSRi = 726, SRSDA_SRSDA_UPD_SRSDB_SRSDB_UPD_SRSIA_SRSIA_UPD_SRSIB_SRSIB_UPD_t2SRSDB_t2SRSDB_UPD_t2SRSIA_t2SRSIA_UPD_t2STREX_t2STREXB_t2STREXD_t2STREXH_RFEDA_RFEDA_UPD_RFEDB_RFEDB_UPD_RFEIA_RFEIA_UPD_RFEIB_RFEIB_UPD_t2RFEDB_t2RFEDBW_t2RFEIA_t2RFEIAW = 727, STL_STLB_STLEX_STLEXB_STLEXD_STLEXH_STLH_t2STLEX_t2STLEXB_t2STLEXD_t2STLEXH = 728, t2STL_t2STLB_t2STLH = 729, VABDfd_VABDhd = 730, VABDfq_VABDhq = 731, VABSD = 732, VABSH = 733, VABSS = 734, VABShd = 735, VABShq = 736, VACGEfd_VACGEhd_VACGTfd_VACGThd = 737, VACGEfq_VACGEhq_VACGTfq_VACGThq = 738, VADDH_VSUBH = 739, VADDfd_VSUBfd = 740, VADDhd_VSUBhd = 741, VADDfq_VSUBfq = 742, VADDhq_VSUBhq = 743, VLDRH = 744, VSTRH = 745, VABAsv2i32_VABAsv4i16_VABAsv8i8_VABAuv2i32_VABAuv4i16_VABAuv8i8 = 746, VABDsv2i32_VABDsv4i16_VABDsv8i8_VABDuv2i32_VABDuv4i16_VABDuv8i8 = 747, VABDsv16i8_VABDsv4i32_VABDsv8i16_VABDuv16i8_VABDuv4i32_VABDuv8i16 = 748, VABDLsv4i32_VABDLsv8i16_VABDLuv4i32_VABDLuv8i16 = 749, VADDv1i64_VADDv2i32_VADDv4i16_VADDv8i8 = 750, VSUBv1i64_VSUBv2i32_VSUBv4i16_VSUBv8i8 = 751, VADDv16i8_VADDv2i64_VADDv4i32_VADDv8i16 = 752, VADDLsv2i64_VADDLsv4i32_VADDLsv8i16_VADDLuv2i64_VADDLuv4i32_VADDLuv8i16_VSUBLsv2i64_VSUBLsv4i32_VSUBLsv8i16_VSUBLuv2i64_VSUBLuv4i32_VSUBLuv8i16 = 753, VANDd_VBICd_VEORd = 754, VANDq_VBICq_VEORq = 755, VBICiv2i32_VBICiv4i16 = 756, VBICiv4i32_VBICiv8i16 = 757, VBIFd_VBITd = 758, VBSLd = 759, VBIFq_VBITq = 760, VBSLq = 761, VCEQv16i8_VCEQv4i32_VCEQv8i16_VCGEsv16i8_VCGEsv4i32_VCGEsv8i16_VCGEuv16i8_VCGEuv4i32_VCGEuv8i16_VCGTsv16i8_VCGTsv4i32_VCGTsv8i16_VCGTuv16i8_VCGTuv4i32_VCGTuv8i16 = 762, VCEQv2i32_VCEQv4i16_VCEQv8i8_VCGEsv2i32_VCGEsv4i16_VCGEsv8i8_VCGEuv2i32_VCGEuv4i16_VCGEuv8i8_VCGTsv2i32_VCGTsv4i16_VCGTsv8i8_VCGTuv2i32_VCGTuv4i16_VCGTuv8i8 = 763, VCLZv16i8_VCLZv4i32_VCLZv8i16_VCNTq = 764, VCLZv2i32_VCLZv4i16_VCLZv8i8_VCNTd = 765, VCMPEH_VCMPEZH_VCMPH_VCMPZH = 766, VDUP16d_VDUP32d_VDUP8d = 767, VSELEQD_VSELEQH_VSELEQS_VSELGED_VSELGEH_VSELGES_VSELGTD_VSELGTH_VSELGTS_VSELVSD_VSELVSH_VSELVSS = 768, VFMAhd_VFMShd = 769, VFMAhq_VFMShq = 770, VHADDsv2i32_VHADDsv4i16_VHADDsv8i8_VHADDuv2i32_VHADDuv4i16_VHADDuv8i8 = 771, VHADDsv16i8_VHADDsv4i32_VHADDsv8i16_VHADDuv16i8_VHADDuv4i32_VHADDuv8i16 = 772, VMAXsv16i8_VMAXsv4i32_VMAXsv8i16_VMAXuv16i8_VMAXuv4i32_VMAXuv8i16_VMINsv16i8_VMINsv4i32_VMINsv8i16_VMINuv16i8_VMINuv4i32_VMINuv8i16 = 773, VPMAXf_VPMAXh_VPMINf_VPMINh = 774, VNEGH = 775, VNEGhd = 776, VNEGhq = 777, VNEGs16d_VNEGs32d_VNEGs8d = 778, VNEGs16q_VNEGs32q_VNEGs8q = 779, VPADDi16_VPADDi32_VPADDi8 = 780, VPADALsv2i32_VPADALsv4i16_VPADALsv8i8_VPADALuv2i32_VPADALuv4i16_VPADALuv8i8 = 781, VPADDLsv16i8_VPADDLsv2i32_VPADDLsv4i16_VPADDLsv4i32_VPADDLsv8i16_VPADDLsv8i8_VPADDLuv16i8_VPADDLuv2i32_VPADDLuv4i16_VPADDLuv4i32_VPADDLuv8i16_VPADDLuv8i8 = 782, VQABSv2i32_VQABSv4i16_VQABSv8i8 = 783, VQABSv16i8_VQABSv4i32_VQABSv8i16 = 784, VQDMLALslv2i32_VQDMLALv2i64_VQDMLSLslv2i32_VQDMLSLv2i64 = 785, VQDMLALslv4i16_VQDMLALv4i32_VQDMLSLslv4i16_VQDMLSLv4i32 = 786, VQDMULHslv2i32_VQDMULHv2i32_VQDMULLv2i64_VQRDMULHslv2i32_VQRDMULHv2i32 = 787, VQDMULHslv4i16_VQDMULHv4i16_VQDMULLslv2i32_VQDMULLslv4i16_VQDMULLv4i32_VQRDMULHslv4i16_VQRDMULHv4i16 = 788, VQDMULHslv4i32_VQDMULHv4i32_VQRDMULHslv4i32_VQRDMULHv4i32 = 789, VQDMULHslv8i16_VQDMULHv8i16_VQRDMULHslv8i16_VQRDMULHv8i16 = 790, VQSHRNsv2i32_VQSHRNsv4i16_VQSHRNsv8i8_VQSHRNuv2i32_VQSHRNuv4i16_VQSHRNuv8i8 = 791, VRSHLsv16i8_VRSHLsv2i64_VRSHLsv4i32_VRSHLsv8i16_VRSHLuv16i8_VRSHLuv2i64_VRSHLuv4i32_VRSHLuv8i16 = 792, VRSHLsv1i64_VRSHLsv2i32_VRSHLsv4i16_VRSHLsv8i8_VRSHLuv1i64_VRSHLuv2i32_VRSHLuv4i16_VRSHLuv8i8_VRSHRsv16i8_VRSHRsv1i64_VRSHRsv2i32_VRSHRsv2i64_VRSHRsv4i16_VRSHRsv4i32_VRSHRsv8i16_VRSHRsv8i8_VRSHRuv16i8_VRSHRuv1i64_VRSHRuv2i32_VRSHRuv2i64_VRSHRuv4i16_VRSHRuv4i32_VRSHRuv8i16_VRSHRuv8i8 = 793, VRSHRNv2i32_VRSHRNv4i16_VRSHRNv8i8 = 794, VST1d16T_VST1d32T_VST1d64T_VST1d8T = 795, VST1d16Q_VST1d32Q_VST1d64Q_VST1d8Q = 796, VST1d64QPseudo = 797, VST1LNd16_VST1LNd32_VST1LNd8 = 798, VST1LNdAsm_16_VST1LNdAsm_32_VST1LNdAsm_8 = 799, VST1LNd16_UPD_VST1LNd32_UPD_VST1LNd8_UPD = 800, VST1LNdWB_fixed_Asm_16_VST1LNdWB_fixed_Asm_32_VST1LNdWB_fixed_Asm_8_VST1LNdWB_register_Asm_16_VST1LNdWB_register_Asm_32_VST1LNdWB_register_Asm_8 = 801, VST2q16_VST2q32_VST2q8 = 802, VST2LNd16_VST2LNd32_VST2LNd8 = 803, VST2LNdAsm_16_VST2LNdAsm_32_VST2LNdAsm_8 = 804, VST2LNd16Pseudo_VST2LNd32Pseudo_VST2LNd8Pseudo = 805, VST2LNq16_VST2LNq32 = 806, VST2LNqAsm_16_VST2LNqAsm_32 = 807, VST2LNd16_UPD_VST2LNd32_UPD_VST2LNd8_UPD = 808, VST2LNdWB_fixed_Asm_16_VST2LNdWB_fixed_Asm_32_VST2LNdWB_fixed_Asm_8_VST2LNdWB_register_Asm_16_VST2LNdWB_register_Asm_32_VST2LNdWB_register_Asm_8 = 809, VST2LNd16Pseudo_UPD_VST2LNd32Pseudo_UPD_VST2LNd8Pseudo_UPD = 810, VST2LNqWB_fixed_Asm_16_VST2LNqWB_fixed_Asm_32_VST2LNqWB_register_Asm_16_VST2LNqWB_register_Asm_32 = 811, VST3d16_VST3d32_VST3d8_VST3q16_VST3q32_VST3q8 = 812, VST3dAsm_16_VST3dAsm_32_VST3dAsm_8_VST3qAsm_16_VST3qAsm_32_VST3qAsm_8 = 813, VST3d16Pseudo_VST3d32Pseudo_VST3d8Pseudo = 814, VST3LNd16_VST3LNd32_VST3LNd8 = 815, VST3LNdAsm_16_VST3LNdAsm_32_VST3LNdAsm_8 = 816, VST3LNd16Pseudo_VST3LNd32Pseudo_VST3LNd8Pseudo = 817, VST3LNqAsm_16_VST3LNqAsm_32 = 818, VST3d16_UPD_VST3d32_UPD_VST3d8_UPD_VST3q16_UPD_VST3q32_UPD_VST3q8_UPD = 819, VST3dWB_fixed_Asm_16_VST3dWB_fixed_Asm_32_VST3dWB_fixed_Asm_8_VST3dWB_register_Asm_16_VST3dWB_register_Asm_32_VST3dWB_register_Asm_8_VST3qWB_fixed_Asm_16_VST3qWB_fixed_Asm_32_VST3qWB_fixed_Asm_8_VST3qWB_register_Asm_16_VST3qWB_register_Asm_32_VST3qWB_register_Asm_8 = 820, VST3LNd16_UPD_VST3LNd32_UPD_VST3LNd8_UPD = 821, VST3LNdWB_fixed_Asm_16_VST3LNdWB_fixed_Asm_32_VST3LNdWB_fixed_Asm_8_VST3LNdWB_register_Asm_16_VST3LNdWB_register_Asm_32_VST3LNdWB_register_Asm_8 = 822, VST3LNd16Pseudo_UPD_VST3LNd32Pseudo_UPD_VST3LNd8Pseudo_UPD = 823, VST3LNqWB_fixed_Asm_16_VST3LNqWB_fixed_Asm_32_VST3LNqWB_register_Asm_16_VST3LNqWB_register_Asm_32 = 824, VST4d16_VST4d32_VST4d8_VST4q16_VST4q32_VST4q8 = 825, VST4dAsm_16_VST4dAsm_32_VST4dAsm_8_VST4qAsm_16_VST4qAsm_32_VST4qAsm_8 = 826, VST4d16Pseudo_VST4d32Pseudo_VST4d8Pseudo = 827, VST4LNd16_VST4LNd32_VST4LNd8 = 828, VST4LNdAsm_16_VST4LNdAsm_32_VST4LNdAsm_8 = 829, VST4LNd16Pseudo_VST4LNd32Pseudo_VST4LNd8Pseudo = 830, VST4LNq16_VST4LNq32 = 831, VST4LNqAsm_16_VST4LNqAsm_32 = 832, VST4d16_UPD_VST4d32_UPD_VST4d8_UPD_VST4q16_UPD_VST4q32_UPD_VST4q8_UPD = 833, VST4dWB_fixed_Asm_16_VST4dWB_fixed_Asm_32_VST4dWB_fixed_Asm_8_VST4dWB_register_Asm_16_VST4dWB_register_Asm_32_VST4dWB_register_Asm_8_VST4qWB_fixed_Asm_16_VST4qWB_fixed_Asm_32_VST4qWB_fixed_Asm_8_VST4qWB_register_Asm_16_VST4qWB_register_Asm_32_VST4qWB_register_Asm_8 = 834, VST4LNd16_UPD_VST4LNd32_UPD_VST4LNd8_UPD = 835, VST4LNdWB_fixed_Asm_16_VST4LNdWB_fixed_Asm_32_VST4LNdWB_fixed_Asm_8_VST4LNdWB_register_Asm_16_VST4LNdWB_register_Asm_32_VST4LNdWB_register_Asm_8 = 836, VST4LNd16Pseudo_UPD_VST4LNd32Pseudo_UPD_VST4LNd8Pseudo_UPD = 837, VST4LNqWB_fixed_Asm_16_VST4LNqWB_fixed_Asm_32_VST4LNqWB_register_Asm_16_VST4LNqWB_register_Asm_32 = 838, BKPT_tBKPT_CDP_CDP2_t2CDP_t2CDP2_CLREX_t2CLREX_CONSTPOOL_ENTRY_COPY_STRUCT_BYVAL_I32_CPS1p_CPS2p_CPS3p_t2CPS1p_t2CPS2p_t2CPS3p_DBG_t2DBG_DMB_t2DMB_DSB_t2DSB_ERET_HINT_t2HINT_tHINT_HLT_tHLT_HVC_ISB_t2ISB_SETEND_tSETEND_SETPAN_t2SETPAN_SMC_t2SMC_SPACE_SWP_SWPB_TRAP_TRAPNaCl_UDF_t2DCPS1_t2DCPS2_t2DCPS3_t2SG_t2TT_t2TTA_t2TTAT_t2TTT_tCPS_CMP_SWAP_16_CMP_SWAP_32_CMP_SWAP_64_CMP_SWAP_8_CompilerBarrier = 839, t2HVC_tTRAP_SVC_tSVC = 840, RFEDA_RFEDA_UPD_RFEDB_RFEDB_UPD_RFEIA_RFEIA_UPD_RFEIB_RFEIB_UPD_t2RFEDB_t2RFEDBW_t2RFEIA_t2RFEIAW_SRSDA_SRSDA_UPD_SRSDB_SRSDB_UPD_SRSIA_SRSIA_UPD_SRSIB_SRSIB_UPD_t2SRSDB_t2SRSDB_UPD_t2SRSIA_t2SRSIA_UPD = 841, t2UDF_tUDF_t__brkdiv0 = 842, LDC2L_OFFSET_LDC2L_OPTION_LDC2L_POST_LDC2L_PRE_LDC2_OFFSET_LDC2_OPTION_LDC2_POST_LDC2_PRE_LDCL_OFFSET_LDCL_OPTION_LDCL_POST_LDCL_PRE_LDC_OFFSET_LDC_OPTION_LDC_POST_LDC_PRE_STC2L_OFFSET_STC2L_OPTION_STC2L_POST_STC2L_PRE_STC2_OFFSET_STC2_OPTION_STC2_POST_STC2_PRE_STCL_OFFSET_STCL_OPTION_STCL_POST_STCL_PRE_STC_OFFSET_STC_OPTION_STC_POST_STC_PRE_t2STC2L_OFFSET_t2STC2L_OPTION_t2STC2L_POST_t2STC2L_PRE_t2STC2_OFFSET_t2STC2_OPTION_t2STC2_POST_t2STC2_PRE_t2STCL_OFFSET_t2STCL_OPTION_t2STCL_POST_t2STCL_PRE_t2STC_OFFSET_t2STC_OPTION_t2STC_POST_t2STC_PRE_MEMCPY = 843, t2LDC2L_OFFSET_t2LDC2L_OPTION_t2LDC2L_POST_t2LDC2L_PRE_t2LDC2_OFFSET_t2LDC2_OPTION_t2LDC2_POST_t2LDC2_PRE_t2LDCL_OFFSET_t2LDCL_OPTION_t2LDCL_POST_t2LDCL_PRE_t2LDC_OFFSET_t2LDC_OPTION_t2LDC_POST_t2LDC_PRE = 844, LDREX_LDREXB_LDREXD_LDREXH = 845, MCR_MCR2_MCRR_MCRR2_t2MCR_t2MCR2_t2MCRR_t2MCRR2_MRC_MRC2_t2MRC_t2MRC2_MRRC_MRRC2_t2MRRC_t2MRRC2_t2MRS_AR_t2MRS_M_t2MRSbanked_t2MRSsys_AR_t2MSR_AR_t2MSR_M_t2MSRbanked = 846, FLDMXDB_UPD_FLDMXIA_FLDMXIA_UPD_FSTMXDB_UPD_FSTMXIA_FSTMXIA_UPD = 847, ADJCALLSTACKDOWN_tADJCALLSTACKDOWN_ADJCALLSTACKUP_tADJCALLSTACKUP_Int_eh_sjlj_dispatchsetup_Int_eh_sjlj_longjmp_Int_eh_sjlj_setjmp_Int_eh_sjlj_setjmp_nofp_Int_eh_sjlj_setup_dispatch_t2Int_eh_sjlj_setjmp_t2Int_eh_sjlj_setjmp_nofp_tInt_eh_sjlj_longjmp_tInt_eh_sjlj_setjmp_t2SUBS_PC_LR_JUMPTABLE_ADDRS_JUMPTABLE_INSTS_JUMPTABLE_TBB_JUMPTABLE_TBH_tInt_WIN_eh_sjlj_longjmp_VLD1LNdAsm_16_VLD1LNdAsm_32_VLD1LNdAsm_8_VLD1LNdWB_fixed_Asm_16_VLD1LNdWB_fixed_Asm_32_VLD1LNdWB_fixed_Asm_8_VLD1LNdWB_register_Asm_16_VLD1LNdWB_register_Asm_32_VLD1LNdWB_register_Asm_8_VLD2LNdAsm_16_VLD2LNdAsm_32_VLD2LNdAsm_8_VLD2LNdWB_fixed_Asm_16_VLD2LNdWB_fixed_Asm_32_VLD2LNdWB_fixed_Asm_8_VLD2LNdWB_register_Asm_16_VLD2LNdWB_register_Asm_32_VLD2LNdWB_register_Asm_8_VLD2LNqAsm_16_VLD2LNqAsm_32_VLD2LNqWB_fixed_Asm_16_VLD2LNqWB_fixed_Asm_32_VLD2LNqWB_register_Asm_16_VLD2LNqWB_register_Asm_32_VLD3DUPdAsm_16_VLD3DUPdAsm_32_VLD3DUPdAsm_8_VLD3DUPdWB_fixed_Asm_16_VLD3DUPdWB_fixed_Asm_32_VLD3DUPdWB_fixed_Asm_8_VLD3DUPdWB_register_Asm_16_VLD3DUPdWB_register_Asm_32_VLD3DUPdWB_register_Asm_8_VLD3DUPqAsm_16_VLD3DUPqAsm_32_VLD3DUPqAsm_8_VLD3DUPqWB_fixed_Asm_16_VLD3DUPqWB_fixed_Asm_32_VLD3DUPqWB_fixed_Asm_8_VLD3DUPqWB_register_Asm_16_VLD3DUPqWB_register_Asm_32_VLD3DUPqWB_register_Asm_8_VLD3LNdAsm_16_VLD3LNdAsm_32_VLD3LNdAsm_8_VLD3LNdWB_fixed_Asm_16_VLD3LNdWB_fixed_Asm_32_VLD3LNdWB_fixed_Asm_8_VLD3LNdWB_register_Asm_16_VLD3LNdWB_register_Asm_32_VLD3LNdWB_register_Asm_8_VLD3LNqAsm_16_VLD3LNqAsm_32_VLD3LNqWB_fixed_Asm_16_VLD3LNqWB_fixed_Asm_32_VLD3LNqWB_register_Asm_16_VLD3LNqWB_register_Asm_32_VLD3dAsm_16_VLD3dAsm_32_VLD3dAsm_8_VLD3dWB_fixed_Asm_16_VLD3dWB_fixed_Asm_32_VLD3dWB_fixed_Asm_8_VLD3dWB_register_Asm_16_VLD3dWB_register_Asm_32_VLD3dWB_register_Asm_8_VLD3qAsm_16_VLD3qAsm_32_VLD3qAsm_8_VLD3qWB_fixed_Asm_16_VLD3qWB_fixed_Asm_32_VLD3qWB_fixed_Asm_8_VLD3qWB_register_Asm_16_VLD3qWB_register_Asm_32_VLD3qWB_register_Asm_8_VLD4DUPdAsm_16_VLD4DUPdAsm_32_VLD4DUPdAsm_8_VLD4DUPdWB_fixed_Asm_16_VLD4DUPdWB_fixed_Asm_32_VLD4DUPdWB_fixed_Asm_8_VLD4DUPdWB_register_Asm_16_VLD4DUPdWB_register_Asm_32_VLD4DUPdWB_register_Asm_8_VLD4DUPqAsm_16_VLD4DUPqAsm_32_VLD4DUPqAsm_8_VLD4DUPqWB_fixed_Asm_16_VLD4DUPqWB_fixed_Asm_32_VLD4DUPqWB_fixed_Asm_8_VLD4DUPqWB_register_Asm_16_VLD4DUPqWB_register_Asm_32_VLD4DUPqWB_register_Asm_8_VLD4LNdAsm_16_VLD4LNdAsm_32_VLD4LNdAsm_8_VLD4LNdWB_fixed_Asm_16_VLD4LNdWB_fixed_Asm_32_VLD4LNdWB_fixed_Asm_8_VLD4LNdWB_register_Asm_16_VLD4LNdWB_register_Asm_32_VLD4LNdWB_register_Asm_8_VLD4LNqAsm_16_VLD4LNqAsm_32_VLD4LNqWB_fixed_Asm_16_VLD4LNqWB_fixed_Asm_32_VLD4LNqWB_register_Asm_16_VLD4LNqWB_register_Asm_32_VLD4dAsm_16_VLD4dAsm_32_VLD4dAsm_8_VLD4dWB_fixed_Asm_16_VLD4dWB_fixed_Asm_32_VLD4dWB_fixed_Asm_8_VLD4dWB_register_Asm_16_VLD4dWB_register_Asm_32_VLD4dWB_register_Asm_8_VLD4qAsm_16_VLD4qAsm_32_VLD4qAsm_8_VLD4qWB_fixed_Asm_16_VLD4qWB_fixed_Asm_32_VLD4qWB_fixed_Asm_8_VLD4qWB_register_Asm_16_VLD4qWB_register_Asm_32_VLD4qWB_register_Asm_8_WIN__CHKSTK_WIN__DBZCHK = 848, SUBS_PC_LR = 849, B_t2B_tB_BX_CALL_tBX_CALL_tBX_RET_tBX_RET_vararg_BX_BX_RET_BX_pred_tBX_tBXNS_Bcc_t2Bcc_tBcc_TAILJMPd_TAILJMPr_TAILJMPr4_tTAILJMPd_tTAILJMPdND_tTAILJMPr_TCRETURNdi_TCRETURNri_tCBNZ_tCBZ = 850, BXJ = 851, tBfar = 852, BL_tBL_BL_pred_tBLXi = 853, BLXi = 854, TPsoft_tTPsoft = 855, BLX_BLX_pred_tBLXNSr_tBLXr = 856, BCCi64_BCCZi64 = 857, BR_JTadd_tBR_JTr_t2TBB_t2TBH = 858, BR_JTr_t2BR_JT_t2TBB_JT_t2TBH_JT_tBRIND = 859, t2BXJ = 860, BR_JTm_i12_BR_JTm_rs = 861, tADDframe = 862, MOVi16_ga_pcrel_MOVi_MOVi16_MOVCCi16_tMOVi8 = 863, MOVr_MOVr_TC_tMOVSr_tMOVr = 864, MVNCCi_MOVCCi = 865, BMOVPCB_CALL_BMOVPCRX_CALL = 866, MOVCCr = 867, tMOVCCr_pseudo = 868, tMVN = 869, MOVCCsi = 870, t2ASRri_tASRri_t2LSRri_tLSRri_t2LSLri_tLSLri_t2RORri_t2RRX = 871, LSRi_LSLi = 872, t2MOVCCasr_t2MOVCClsl_t2MOVCClsr_t2MOVCCror = 873, t2MOVCCr = 874, t2MOVTi16_ga_pcrel_t2MOVTi16 = 875, t2MOVr = 876, tROR = 877, t2ASRrr_tASRrr_t2LSRrr_tLSRrr_t2LSLrr_tLSLrr_t2RORrr = 878, MOVPCRX_MOVPCLR = 879, tMUL = 880, SADD16_SADD8_SSUB16_SSUB8_UADD16_UADD8_USUB16_USUB8 = 881, t2SADD16_t2SADD8_t2SSUB16_t2SSUB8_t2UADD16_t2UADD8_t2USUB16_t2USUB8 = 882, SHADD16_SHADD8_SHSUB16_SHSUB8_UHADD16_UHADD8_UHSUB16_UHSUB8 = 883, t2SHADD16_t2SHADD8_t2SHSUB16_t2SHSUB8_t2UHADD16_t2UHADD8_t2UHSUB16_t2UHSUB8 = 884, QADD16_QADD8_QSUB16_QSUB8_UQADD16_UQADD8_UQSUB16_UQSUB8 = 885, t2QADD_t2QADD16_t2QADD8_t2UQADD16_t2UQADD8_t2QSUB_t2QSUB16_t2QSUB8_t2UQSUB16_t2UQSUB8 = 886, QASX_QSAX_UQASX_UQSAX = 887, t2QASX_t2QSAX_t2UQASX_t2UQSAX = 888, SSAT_SSAT16_t2SSAT_t2SSAT16_USAT_USAT16_t2USAT_t2USAT16 = 889, QADD_QSUB = 890, SBFX_UBFX = 891, t2SBFX_t2UBFX = 892, SXTB_SXTH_UXTB_UXTH = 893, t2SXTB_t2SXTH_t2UXTB_t2UXTH = 894, tSXTB_tSXTH_tUXTB_tUXTH = 895, SXTAB_SXTAH_UXTAB_UXTAH = 896, t2SXTAB_t2SXTAH_t2UXTAB_t2UXTAH = 897, LDRConstPool_t2LDRConstPool_tLDRConstPool = 898, PICLDRB_PICLDRH = 899, PICLDRSB_PICLDRSH = 900, tLDR_postidx = 901, t2LDRBpcrel_t2LDRHpcrel_t2LDRpcrel = 902, LDR_PRE_IMM = 903, LDRB_PRE_IMM = 904, t2LDRB_PRE = 905, LDR_PRE_REG = 906, LDRB_PRE_REG = 907, LDRH_PRE = 908, LDRSB_PRE_LDRSH_PRE = 909, t2LDRH_PRE = 910, t2LDRSB_PRE_t2LDRSH_PRE = 911, t2LDR_PRE = 912, LDRD_PRE = 913, t2LDRD_PRE = 914, LDRT_POST_IMM = 915, LDRBT_POST_IMM = 916, LDRHTi = 917, LDRSBTi_LDRSHTi = 918, LDRH_POST = 919, LDRSB_POST_LDRSH_POST = 920, LDR_POST_REG = 921, LDRB_POST_REG = 922, LDRT_POST = 923, PLDi12_t2PLDi12_PLDWi12_t2PLDWi12_t2PLDWi8_t2PLDWs_t2PLDi8_t2PLDpci_t2PLDs_PLIi12_PLIrs_t2PLIi12_t2PLIi8_t2PLIpci_t2PLIs = 924, PLDrs_PLDWrs = 925, VLLDM = 926, STRBi12_PICSTRB_PICSTRH_tSTRBr_tSTRHr = 927, t2STRBT = 928, STR_PRE_IMM = 929, STRB_PRE_IMM = 930, STRBi_preidx_STRBr_preidx_STRi_preidx_STRr_preidx_STRH_preidx = 931, STRH_PRE = 932, t2STRH_PRE_t2STR_PRE = 933, t2STRB_PRE = 934, t2STRD_PRE = 935, STR_PRE_REG = 936, STRB_PRE_REG = 937, STRD_PRE = 938, STRT_POST_IMM = 939, STRBT_POST_IMM = 940, t2STRB_POST = 941, STRBT_POST_REG_STRB_POST_REG = 942, VLSTM = 943, VCVTASD_VCVTASH_VCVTASS_VCVTAUD_VCVTAUH_VCVTAUS_VCVTMSD_VCVTMSH_VCVTMSS_VCVTMUD_VCVTMUH_VCVTMUS_VCVTNSD_VCVTNSH_VCVTNSS_VCVTNUD_VCVTNUH_VCVTNUS_VCVTPSD_VCVTPSH_VCVTPSS_VCVTPUD_VCVTPUH_VCVTPUS_VCVTBDH_VCVTTDH_VCVTTHD = 944, VJCVT = 945, VRINTAD_VRINTAH_VRINTAS_VRINTMD_VRINTMH_VRINTMS_VRINTND_VRINTNH_VRINTNS_VRINTPD_VRINTPH_VRINTPS_VRINTRD_VRINTRH_VRINTRS_VRINTXD_VRINTXH_VRINTXS_VRINTZD_VRINTZH_VRINTZS = 946, VSQRTH = 947, VMAXsv2i32_VMAXsv4i16_VMAXsv8i8_VMAXuv2i32_VMAXuv4i16_VMAXuv8i8_VMINsv2i32_VMINsv4i16_VMINsv8i8_VMINuv2i32_VMINuv4i16_VMINuv8i8 = 948, VUDOTD_VUDOTDI_VSDOTD_VSDOTDI_VUDOTQ_VUDOTQI_VSDOTQ_VSDOTQI = 949, FCONSTD = 950, FCONSTH = 951, FCONSTS = 952, VMOVH = 953, VINSH = 954, VSTMSIA = 955, VSTMSDB_UPD_VSTMSIA_UPD = 956, VRHADDsv16i8_VRHADDsv4i32_VRHADDsv8i16_VRHADDuv16i8_VRHADDuv4i32_VRHADDuv8i16 = 957, VRHADDsv2i32_VRHADDsv4i16_VRHADDsv8i8_VRHADDuv2i32_VRHADDuv4i16_VRHADDuv8i8 = 958, VMVNv2i32_VMVNv4i16_VMVNv4i32_VMVNv8i16 = 959, VMULpd_VMULv4i16_VMULv8i8_VMULslv4i16 = 960, VMULv2i32_VMULslv2i32 = 961, VQDMULHslv2i32_VQDMULHv2i32_VQRDMULHslv2i32_VQRDMULHv2i32 = 962, VQDMULHslv4i16_VQDMULHv4i16_VQRDMULHslv4i16_VQRDMULHv4i16 = 963, VMULpq_VMULv16i8_VMULv8i16_VMULslv8i16 = 964, VMLAslv2i32_VMLAv2i32_VMLSslv2i32_VMLSv2i32 = 965, VMLAslv4i16_VMLAv4i16_VMLAv8i8_VMLSslv4i16_VMLSv4i16_VMLSv8i8 = 966, VQRDMLAHslv2i32_VQRDMLAHv2i32_VQRDMLSHslv2i32_VQRDMLSHv2i32 = 967, VQRDMLAHslv4i16_VQRDMLAHv4i16_VQRDMLSHslv4i16_VQRDMLSHv4i16 = 968, VQRDMLAHslv4i32_VQRDMLAHv4i32_VQRDMLSHslv4i32_VQRDMLSHv4i32 = 969, VQRDMLAHslv8i16_VQRDMLAHv8i16_VQRDMLSHslv8i16_VQRDMLSHv8i16 = 970, VMULLp8_VMULLslsv2i32_VMULLslsv4i16_VMULLsluv2i32_VMULLsluv4i16_VMULLsv4i32_VMULLsv8i16_VMULLuv4i32_VMULLuv8i16 = 971, VSHLiv16i8_VSHLiv1i64_VSHLiv2i32_VSHLiv2i64_VSHLiv4i16_VSHLiv4i32_VSHLiv8i16_VSHLiv8i8_VSHLLi16_VSHLLi32_VSHLLi8_VSHLLsv2i64_VSHLLsv4i32_VSHLLsv8i16_VSHLLuv2i64_VSHLLuv4i32_VSHLLuv8i16_VSHRsv16i8_VSHRsv1i64_VSHRsv2i32_VSHRsv2i64_VSHRsv4i16_VSHRsv4i32_VSHRsv8i16_VSHRsv8i8_VSHRuv16i8_VSHRuv1i64_VSHRuv2i32_VSHRuv2i64_VSHRuv4i16_VSHRuv4i32_VSHRuv8i16_VSHRuv8i8 = 972, VQSHLsiv16i8_VQSHLsiv1i64_VQSHLsiv2i32_VQSHLsiv2i64_VQSHLsiv4i16_VQSHLsiv4i32_VQSHLsiv8i16_VQSHLsiv8i8_VQSHLsuv16i8_VQSHLsuv1i64_VQSHLsuv2i32_VQSHLsuv2i64_VQSHLsuv4i16_VQSHLsuv4i32_VQSHLsuv8i16_VQSHLsuv8i8_VQSHLuiv16i8_VQSHLuiv1i64_VQSHLuiv2i32_VQSHLuiv2i64_VQSHLuiv4i16_VQSHLuiv4i32_VQSHLuiv8i16_VQSHLuiv8i8 = 973, VRSHRsv16i8_VRSHRsv1i64_VRSHRsv2i32_VRSHRsv2i64_VRSHRsv4i16_VRSHRsv4i32_VRSHRsv8i16_VRSHRsv8i8_VRSHRuv16i8_VRSHRuv1i64_VRSHRuv2i32_VRSHRuv2i64_VRSHRuv4i16_VRSHRuv4i32_VRSHRuv8i16_VRSHRuv8i8 = 974, VSLIv1i64_VSLIv2i32_VSLIv4i16_VSLIv8i8_VSRIv1i64_VSRIv2i32_VSRIv4i16_VSRIv8i8 = 975, VSLIv16i8_VSLIv2i64_VSLIv4i32_VSLIv8i16_VSRIv16i8_VSRIv2i64_VSRIv4i32_VSRIv8i16 = 976, VPADDh = 977, VCADDv2f32_VCADDv4f16_VCMLAv2f32_VCMLAv2f32_indexed_VCMLAv4f16_VCMLAv4f16_indexed = 978, VCADDv4f32_VCADDv8f16_VCMLAv4f32_VCMLAv4f32_indexed_VCMLAv8f16_VCMLAv8f16_indexed = 979, VCVTf2sd_VCVTf2ud_VCVTf2xsd_VCVTf2xud_VCVTs2fd_VCVTu2fd_VCVTxs2fd_VCVTxu2fd = 980, VCVTf2sq_VCVTf2uq_VCVTs2fq_VCVTu2fq_VCVTf2xsq_VCVTf2xuq_VCVTxs2fq_VCVTxu2fq = 981, VMULhd = 982, VMULhq = 983, VRINTANDf_VRINTANDh_VRINTANQf_VRINTANQh_VRINTMNDf_VRINTMNDh_VRINTMNQf_VRINTMNQh_VRINTNNDf_VRINTNNDh_VRINTNNQf_VRINTNNQh_VRINTPNDf_VRINTPNDh_VRINTPNQf_VRINTPNQh_VRINTXNDf_VRINTXNDh_VRINTXNQf_VRINTXNQh_VRINTZNDf_VRINTZNDh_VRINTZNQf_VRINTZNQh = 984, VMOVD0_VMOVQ0 = 985, VTRNd16_VTRNd32_VTRNd8 = 986, VLD2d16_VLD2d32_VLD2d8 = 987, VLD2d16wb_fixed_VLD2d16wb_register_VLD2d32wb_fixed_VLD2d32wb_register_VLD2d8wb_fixed_VLD2d8wb_register = 988, VLD3LNd32_VLD3LNq32_VLD3LNd32Pseudo_VLD3LNq32Pseudo = 989, VLD3LNd32_UPD_VLD3LNq32_UPD = 990, VLD3LNd32Pseudo_UPD_VLD3LNq32Pseudo_UPD = 991, VLD4LNd32_VLD4LNq32_VLD4LNd32Pseudo_VLD4LNq32Pseudo = 992, VLD4LNd32_UPD_VLD4LNq32_UPD = 993, VLD4LNd32Pseudo_UPD_VLD4LNq32Pseudo_UPD = 994, AESD_AESE_AESIMC_AESMC = 995, SHA1SU0 = 996, SHA1H_SHA1SU1 = 997, SHA1C_SHA1M_SHA1P = 998, SHA256SU0 = 999, SHA256H_SHA256H2_SHA256SU1 = 1000, SCHED_LIST_END = 1001 }; } // end Sched namespace } // end ARM namespace } // end llvm namespace #endif // GET_INSTRINFO_SCHED_ENUM #ifdef GET_INSTRINFO_MC_DESC #undef GET_INSTRINFO_MC_DESC namespace llvm { static const MCPhysReg ImplicitList1[] = { ARM::CPSR, 0 }; static const MCPhysReg ImplicitList2[] = { ARM::SP, 0 }; static const MCPhysReg ImplicitList3[] = { ARM::LR, 0 }; static const MCPhysReg ImplicitList4[] = { ARM::R7, ARM::LR, ARM::SP, 0 }; static const MCPhysReg ImplicitList5[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::LR, ARM::CPSR, ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::Q4, ARM::Q5, ARM::Q6, ARM::Q7, ARM::Q8, ARM::Q9, ARM::Q10, ARM::Q11, ARM::Q12, ARM::Q13, ARM::Q14, ARM::Q15, 0 }; static const MCPhysReg ImplicitList6[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::LR, ARM::CPSR, 0 }; static const MCPhysReg ImplicitList7[] = { ARM::R0, ARM::R12, ARM::LR, ARM::CPSR, 0 }; static const MCPhysReg ImplicitList8[] = { ARM::R4, 0 }; static const MCPhysReg ImplicitList9[] = { ARM::R4, ARM::SP, 0 }; static const MCPhysReg ImplicitList10[] = { ARM::PC, 0 }; static const MCPhysReg ImplicitList11[] = { ARM::FPSCR_NZCV, 0 }; static const MCPhysReg ImplicitList12[] = { ARM::FPSCR, 0 }; static const MCPhysReg ImplicitList13[] = { ARM::ITSTATE, 0 }; static const MCPhysReg ImplicitList14[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::LR, ARM::CPSR, ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::Q8, ARM::Q9, ARM::Q10, ARM::Q11, ARM::Q12, ARM::Q13, ARM::Q14, ARM::Q15, 0 }; static const MCPhysReg ImplicitList15[] = { ARM::R11, ARM::LR, ARM::SP, 0 }; static const MCPhysReg ImplicitList16[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R12, ARM::CPSR, 0 }; static const MCOperandInfo OperandInfo2[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, }; static const MCOperandInfo OperandInfo3[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; static const MCOperandInfo OperandInfo4[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; static const MCOperandInfo OperandInfo5[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; static const MCOperandInfo OperandInfo6[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; static const MCOperandInfo OperandInfo7[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, }; static const MCOperandInfo OperandInfo8[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; static const MCOperandInfo OperandInfo9[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; static const MCOperandInfo OperandInfo10[] = { { 0, 0|(1<InitMCInstrInfo(ARMInsts, ARMInstrNameIndices, ARMInstrNameData, 3217); } } // end llvm namespace #endif // GET_INSTRINFO_MC_DESC #ifdef GET_INSTRINFO_HEADER #undef GET_INSTRINFO_HEADER namespace llvm { struct ARMGenInstrInfo : public TargetInstrInfo { explicit ARMGenInstrInfo(int CFSetupOpcode = -1, int CFDestroyOpcode = -1, int CatchRetOpcode = -1, int ReturnOpcode = -1); ~ARMGenInstrInfo() override = default; }; } // end llvm namespace #endif // GET_INSTRINFO_HEADER #ifdef GET_INSTRINFO_CTOR_DTOR #undef GET_INSTRINFO_CTOR_DTOR namespace llvm { extern const MCInstrDesc ARMInsts[]; extern const unsigned ARMInstrNameIndices[]; extern const char ARMInstrNameData[]; ARMGenInstrInfo::ARMGenInstrInfo(int CFSetupOpcode, int CFDestroyOpcode, int CatchRetOpcode, int ReturnOpcode) : TargetInstrInfo(CFSetupOpcode, CFDestroyOpcode, CatchRetOpcode, ReturnOpcode) { InitMCInstrInfo(ARMInsts, ARMInstrNameIndices, ARMInstrNameData, 3217); } } // end llvm namespace #endif // GET_INSTRINFO_CTOR_DTOR #ifdef GET_INSTRINFO_OPERAND_ENUM #undef GET_INSTRINFO_OPERAND_ENUM namespace llvm { namespace ARM { namespace OpName { enum { OPERAND_LAST }; } // end namespace OpName } // end namespace ARM } // end namespace llvm #endif //GET_INSTRINFO_OPERAND_ENUM #ifdef GET_INSTRINFO_NAMED_OPS #undef GET_INSTRINFO_NAMED_OPS namespace llvm { namespace ARM { LLVM_READONLY int16_t getNamedOperandIdx(uint16_t Opcode, uint16_t NamedIdx) { return -1; } } // end namespace ARM } // end namespace llvm #endif //GET_INSTRINFO_NAMED_OPS #ifdef GET_INSTRINFO_OPERAND_TYPES_ENUM #undef GET_INSTRINFO_OPERAND_TYPES_ENUM namespace llvm { namespace ARM { namespace OpTypes { enum OperandType { VecListFourDByteIndexed = 0, VecListFourDHWordIndexed = 1, VecListFourDWordIndexed = 2, VecListFourQHWordIndexed = 3, VecListFourQWordIndexed = 4, VecListOneDByteIndexed = 5, VecListOneDHWordIndexed = 6, VecListOneDWordIndexed = 7, VecListThreeDByteIndexed = 8, VecListThreeDHWordIndexed = 9, VecListThreeDWordIndexed = 10, VecListThreeQHWordIndexed = 11, VecListThreeQWordIndexed = 12, VecListTwoDByteIndexed = 13, VecListTwoDHWordIndexed = 14, VecListTwoDWordIndexed = 15, VecListTwoQHWordIndexed = 16, VecListTwoQWordIndexed = 17, VectorIndex16 = 18, VectorIndex32 = 19, VectorIndex64 = 20, VectorIndex8 = 21, addr_offset_none = 22, addrmode3 = 23, addrmode3_pre = 24, addrmode5 = 25, addrmode5_pre = 26, addrmode5fp16 = 27, addrmode6 = 28, addrmode6align16 = 29, addrmode6align32 = 30, addrmode6align64 = 31, addrmode6align64or128 = 32, addrmode6align64or128or256 = 33, addrmode6alignNone = 34, addrmode6dup = 35, addrmode6dupalign16 = 36, addrmode6dupalign32 = 37, addrmode6dupalign64 = 38, addrmode6dupalign64or128 = 39, addrmode6dupalignNone = 40, addrmode6oneL32 = 41, addrmode_imm12 = 42, addrmode_imm12_pre = 43, addrmode_tbb = 44, addrmode_tbh = 45, addrmodepc = 46, adrlabel = 47, am2offset_imm = 48, am2offset_reg = 49, am3offset = 50, am6offset = 51, arm_bl_target = 61, arm_blx_target = 62, arm_br_target = 63, banked_reg = 64, bf_inv_mask_imm = 65, brtarget = 66, c_imm = 67, cc_out = 68, cmovpred = 69, complexrotateop = 70, complexrotateopodd = 71, const_pool_asm_imm = 72, coproc_option_imm = 73, cpinst_operand = 74, dpr_reglist = 75, f32imm = 76, f64imm = 77, fbits16 = 78, fbits32 = 79, i16imm = 80, i1imm = 81, i32imm = 82, i64imm = 83, i8imm = 84, iflags_op = 85, imm0_1 = 86, imm0_15 = 87, imm0_239 = 88, imm0_255 = 89, imm0_3 = 90, imm0_31 = 91, imm0_32 = 92, imm0_4095 = 93, imm0_4095_neg = 94, imm0_63 = 95, imm0_65535 = 96, imm0_65535_expr = 97, imm0_65535_neg = 98, imm0_7 = 99, imm16 = 100, imm1_15 = 101, imm1_16 = 102, imm1_31 = 103, imm1_32 = 104, imm1_7 = 105, imm24b = 106, imm256_65535_expr = 107, imm32 = 108, imm8 = 109, imm8_255 = 110, imm_sr = 111, imod_op = 112, instsyncb_opt = 113, it_mask = 114, it_pred = 115, ldst_so_reg = 116, ldstm_mode = 117, memb_opt = 118, mod_imm = 119, mod_imm1_7_neg = 120, mod_imm8_255_neg = 121, mod_imm_neg = 122, mod_imm_not = 123, msr_mask = 124, nImmSplatI16 = 125, nImmSplatI32 = 126, nImmSplatI64 = 127, nImmSplatI8 = 128, nImmSplatNotI16 = 129, nImmSplatNotI32 = 130, nImmVMOVF32 = 131, nImmVMOVI32 = 132, nImmVMOVI32Neg = 133, nModImm = 134, neon_vcvt_imm32 = 135, nohash_imm = 136, p_imm = 137, pclabel = 138, pkh_asr_amt = 139, pkh_lsl_amt = 140, postidx_imm8 = 141, postidx_imm8s4 = 142, postidx_reg = 143, pred = 144, ptype0 = 145, ptype1 = 146, ptype2 = 147, ptype3 = 148, ptype4 = 149, ptype5 = 150, reglist = 151, rot_imm = 152, s_cc_out = 153, setend_op = 154, shift_imm = 155, shift_so_reg_imm = 156, shift_so_reg_reg = 157, shr_imm16 = 158, shr_imm32 = 159, shr_imm64 = 160, shr_imm8 = 161, so_reg_imm = 162, so_reg_reg = 163, spr_reglist = 164, t2_shift_imm = 165, t2_so_imm = 166, t2_so_imm_neg = 167, t2_so_imm_not = 168, t2_so_imm_notSext = 169, t2_so_reg = 170, t2addrmode_imm0_1020s4 = 171, t2addrmode_imm12 = 172, t2addrmode_imm8 = 173, t2addrmode_imm8_pre = 174, t2addrmode_imm8s4 = 175, t2addrmode_imm8s4_pre = 176, t2addrmode_negimm8 = 177, t2addrmode_posimm8 = 178, t2addrmode_so_reg = 179, t2adrlabel = 180, t2am_imm8_offset = 181, t2am_imm8s4_offset = 182, t2ldr_pcrel_imm12 = 183, t2ldrlabel = 184, t_addrmode_is1 = 185, t_addrmode_is2 = 186, t_addrmode_is4 = 187, t_addrmode_pc = 188, t_addrmode_rr = 189, t_addrmode_rrs1 = 190, t_addrmode_rrs2 = 191, t_addrmode_rrs4 = 192, t_addrmode_sp = 193, t_adrlabel = 194, t_brtarget = 195, t_imm0_1020s4 = 196, t_imm0_508s4 = 197, t_imm0_508s4_neg = 198, thumb_bcc_target = 199, thumb_bl_target = 200, thumb_blx_target = 201, thumb_br_target = 202, thumb_cb_target = 203, tsb_opt = 204, type0 = 205, type1 = 206, type2 = 207, type3 = 208, type4 = 209, type5 = 210, vfp_f16imm = 211, vfp_f32imm = 212, vfp_f64imm = 213, OPERAND_TYPE_LIST_END }; } // end namespace OpTypes } // end namespace ARM } // end namespace llvm #endif // GET_INSTRINFO_OPERAND_TYPES_ENUM