Home
last modified time | relevance | path

Searched defs:CONFIG_SYS_DDR_TIMING_5 (Results 1 – 9 of 9) sorted by relevance

/external/u-boot/board/freescale/corenet_ds/
Dp4080ds_ddr.c67 #define CONFIG_SYS_DDR_TIMING_5 0x02401400 macro
/external/u-boot/include/configs/
DBSC9132QDS.h179 #define CONFIG_SYS_DDR_TIMING_5 CONFIG_SYS_DDR_TIMING_5_800 macro
185 #define CONFIG_SYS_DDR_TIMING_5 CONFIG_SYS_DDR_TIMING_5_1333 macro
191 #define CONFIG_SYS_DDR_TIMING_5 CONFIG_SYS_DDR_TIMING_5_800 macro
DBSC9131RDB.h100 #define CONFIG_SYS_DDR_TIMING_5 0x02401400 macro
Dp1_twr.h101 #define CONFIG_SYS_DDR_TIMING_5 0x03402400 macro
DUCP1020.h177 #define CONFIG_SYS_DDR_TIMING_5 0x03402400 macro
DMPC8569MDS.h104 #define CONFIG_SYS_DDR_TIMING_5 0x03402400 macro
DP1022DS.h164 #define CONFIG_SYS_DDR_TIMING_5 0x02401400 macro
DP1010RDB.h239 #define CONFIG_SYS_DDR_TIMING_5 0x03402400 macro
Dp1_p2_rdb_pc.h315 #define CONFIG_SYS_DDR_TIMING_5 0x03402400 macro