Searched defs:DstLo (Results 1 – 11 of 11) sorted by relevance
| /external/llvm/lib/Target/Mips/ |
| D | MipsSEInstrInfo.cpp | 574 unsigned DstLo = getRegisterInfo().getSubReg(DstReg, Mips::sub_lo); in expandPseudoMTLoHi() local
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| D | MipsSEFrameLowering.cpp | 248 unsigned DstLo = RegInfo.getSubReg(Dst, Mips::sub_lo); in expandCopyACC() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | MipsSEInstrInfo.cpp | 732 unsigned DstLo = getRegisterInfo().getSubReg(DstReg, Mips::sub_lo); in expandPseudoMTLoHi() local
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| D | MipsSEFrameLowering.cpp | 269 unsigned DstLo = RegInfo.getSubReg(Dst, Mips::sub_lo); in expandCopyACC() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUInstructionSelector.cpp | 127 unsigned DstLo = MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass); in selectG_ADD() local
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| D | SIInstrInfo.cpp | 1195 unsigned DstLo = RI.getSubReg(Dst, AMDGPU::sub0); in expandPostRAPseudo() local
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| D | SIISelLowering.cpp | 3388 unsigned DstLo = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in EmitInstrWithCustomInserter() local
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.cpp | 858 unsigned DstLo = RI.getSubReg(Dst, AMDGPU::sub0); in expandPostRAPseudo() local
887 unsigned DstLo = RI.getSubReg(Dst, AMDGPU::sub0); in expandPostRAPseudo() local
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonFrameLowering.cpp | 1605 unsigned DstLo = HRI.getSubReg(DstR, Hexagon::subreg_loreg); in expandLoadVec2() local
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| D | HexagonInstrInfo.cpp | 850 unsigned DstLo = HRI.getSubReg(DestReg, Hexagon::subreg_loreg); in copyPhysReg() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| D | HexagonFrameLowering.cpp | 1768 unsigned DstLo = HRI.getSubReg(DstR, Hexagon::vsub_lo); in expandLoadVec2() local
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