1 //===- ARCISelLowering.h - ARC DAG Lowering Interface -----------*- C++ -*-===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file defines the interfaces that ARC uses to lower LLVM code into a
11 // selection DAG.
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #ifndef LLVM_LIB_TARGET_ARC_ARCISELLOWERING_H
16 #define LLVM_LIB_TARGET_ARC_ARCISELLOWERING_H
17 
18 #include "ARC.h"
19 #include "llvm/CodeGen/SelectionDAG.h"
20 #include "llvm/CodeGen/TargetLowering.h"
21 
22 namespace llvm {
23 
24 // Forward delcarations
25 class ARCSubtarget;
26 class ARCTargetMachine;
27 
28 namespace ARCISD {
29 
30 enum NodeType : unsigned {
31   // Start the numbering where the builtin ops and target ops leave off.
32   FIRST_NUMBER = ISD::BUILTIN_OP_END,
33 
34   // Branch and link (call)
35   BL,
36 
37   // Jump and link (indirect call)
38   JL,
39 
40   // CMP
41   CMP,
42 
43   // CMOV
44   CMOV,
45 
46   // BRcc
47   BRcc,
48 
49   // Global Address Wrapper
50   GAWRAPPER,
51 
52   // return, (j_s [blink])
53   RET
54 };
55 
56 } // end namespace ARCISD
57 
58 //===--------------------------------------------------------------------===//
59 // TargetLowering Implementation
60 //===--------------------------------------------------------------------===//
61 class ARCTargetLowering : public TargetLowering {
62 public:
63   explicit ARCTargetLowering(const TargetMachine &TM,
64                              const ARCSubtarget &Subtarget);
65 
66   /// Provide custom lowering hooks for some operations.
67   SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
68 
69   /// This method returns the name of a target specific DAG node.
70   const char *getTargetNodeName(unsigned Opcode) const override;
71 
72   /// Return true if the addressing mode represented by AM is legal for this
73   /// target, for a load/store of the specified type.
74   bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty,
75                              unsigned AS,
76                              Instruction *I = nullptr) const override;
77 
78 private:
79   const ARCSubtarget &Subtarget;
80 
81   // Lower Operand helpers
82   SDValue LowerCallArguments(SDValue Chain, CallingConv::ID CallConv,
83                              bool isVarArg,
84                              const SmallVectorImpl<ISD::InputArg> &Ins,
85                              SDLoc dl, SelectionDAG &DAG,
86                              SmallVectorImpl<SDValue> &InVals) const;
87   // Lower Operand specifics
88   SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const;
89   SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const;
90   SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
91   SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const;
92   SDValue LowerSIGN_EXTEND_INREG(SDValue Op, SelectionDAG &DAG) const;
93   SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
94   SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
95 
96   SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv,
97                                bool isVarArg,
98                                const SmallVectorImpl<ISD::InputArg> &Ins,
99                                const SDLoc &dl, SelectionDAG &DAG,
100                                SmallVectorImpl<SDValue> &InVals) const override;
101 
102   SDValue LowerCall(TargetLowering::CallLoweringInfo &CLI,
103                     SmallVectorImpl<SDValue> &InVals) const override;
104 
105   SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg,
106                       const SmallVectorImpl<ISD::OutputArg> &Outs,
107                       const SmallVectorImpl<SDValue> &OutVals, const SDLoc &dl,
108                       SelectionDAG &DAG) const override;
109 
110   bool CanLowerReturn(CallingConv::ID CallConv, MachineFunction &MF,
111                       bool isVarArg,
112                       const SmallVectorImpl<ISD::OutputArg> &ArgsFlags,
113                       LLVMContext &Context) const override;
114 
115   bool mayBeEmittedAsTailCall(const CallInst *CI) const override;
116 };
117 
118 } // end namespace llvm
119 
120 #endif // LLVM_LIB_TARGET_ARC_ARCISELLOWERING_H
121