Searched defs:RS1 (Results 1 – 4 of 4) sorted by relevance
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Sparc/ |
| D | SparcAsmPrinter.cpp | 128 MCOperand &RS1, MCOperand &Src2, MCOperand &RD, in EmitBinary()
140 MCOperand &RS1, MCOperand &Imm, MCOperand &RD, in EmitOR()
146 MCOperand &RS1, MCOperand &RS2, MCOperand &RD, in EmitADD()
152 MCOperand &RS1, MCOperand &Imm, MCOperand &RD, in EmitSHL()
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcAsmPrinter.cpp | 130 MCOperand &RS1, MCOperand &Src2, MCOperand &RD, in EmitBinary()
142 MCOperand &RS1, MCOperand &Imm, MCOperand &RD, in EmitOR()
148 MCOperand &RS1, MCOperand &RS2, MCOperand &RD, in EmitADD()
154 MCOperand &RS1, MCOperand &Imm, MCOperand &RD, in EmitSHL()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonSplitDouble.cpp | 882 unsigned RS1 = getRegState(Op1); in splitAslOr() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| D | HexagonSplitDouble.cpp | 923 unsigned RS1 = getRegState(Op1); in splitAslOr() local
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