1 /*
2  * Copyright (C) 2012 The Android Open Source Project
3  *
4  * Licensed under the Apache License, Version 2.0 (the "License");
5  * you may not use this file except in compliance with the License.
6  * You may obtain a copy of the License at
7  *
8  *      http://www.apache.org/licenses/LICENSE-2.0
9  *
10  * Unless required by applicable law or agreed to in writing, software
11  * distributed under the License is distributed on an "AS IS" BASIS,
12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13  * See the License for the specific language governing permissions and
14  * limitations under the License.
15  */
16 
17 #ifndef ART_RUNTIME_ARCH_MIPS_REGISTERS_MIPS_H_
18 #define ART_RUNTIME_ARCH_MIPS_REGISTERS_MIPS_H_
19 
20 #include <iosfwd>
21 
22 #include "base/macros.h"
23 
24 namespace art {
25 namespace mips {
26 
27 enum Register {
28   ZERO =  0,
29   AT   =  1,  // Assembler temporary.
30   V0   =  2,  // Values.
31   V1   =  3,
32   A0   =  4,  // Arguments.
33   A1   =  5,
34   A2   =  6,
35   A3   =  7,
36   T0   =  8,  // Two extra arguments / temporaries.
37   T1   =  9,
38   T2   = 10,  // Temporaries.
39   T3   = 11,
40   T4   = 12,
41   T5   = 13,
42   T6   = 14,
43   T7   = 15,
44   S0   = 16,  // Saved values.
45   S1   = 17,
46   S2   = 18,
47   S3   = 19,
48   S4   = 20,
49   S5   = 21,
50   S6   = 22,
51   S7   = 23,
52   T8   = 24,  // More temporaries.
53   T9   = 25,
54   K0   = 26,  // Reserved for trap handler.
55   K1   = 27,
56   GP   = 28,  // Global pointer.
57   SP   = 29,  // Stack pointer.
58   FP   = 30,  // Saved value/frame pointer.
59   RA   = 31,  // Return address.
60   TR   = S1,  // ART Thread Register
61   TMP  = T8,  // scratch register (in addition to AT)
62   kNumberOfCoreRegisters = 32,
63   kNoRegister = -1  // Signals an illegal register.
64 };
65 std::ostream& operator<<(std::ostream& os, const Register& rhs);
66 
67 // Values for single-precision floating point registers.
68 enum FRegister {
69   F0  =  0,
70   F1  =  1,
71   F2  =  2,
72   F3  =  3,
73   F4  =  4,
74   F5  =  5,
75   F6  =  6,
76   F7  =  7,
77   F8  =  8,
78   F9  =  9,
79   F10 = 10,
80   F11 = 11,
81   F12 = 12,
82   F13 = 13,
83   F14 = 14,
84   F15 = 15,
85   F16 = 16,
86   F17 = 17,
87   F18 = 18,
88   F19 = 19,
89   F20 = 20,
90   F21 = 21,
91   F22 = 22,
92   F23 = 23,
93   F24 = 24,
94   F25 = 25,
95   F26 = 26,
96   F27 = 27,
97   F28 = 28,
98   F29 = 29,
99   F30 = 30,
100   F31 = 31,
101   FTMP = F6,   // scratch register
102   FTMP2 = F7,  // scratch register (in addition to FTMP, reserved for MSA instructions)
103   kNumberOfFRegisters = 32,
104   kNoFRegister = -1,
105 };
106 std::ostream& operator<<(std::ostream& os, const FRegister& rhs);
107 
108 // Values for vector registers.
109 enum VectorRegister {
110   W0  =  0,
111   W1  =  1,
112   W2  =  2,
113   W3  =  3,
114   W4  =  4,
115   W5  =  5,
116   W6  =  6,
117   W7  =  7,
118   W8  =  8,
119   W9  =  9,
120   W10 = 10,
121   W11 = 11,
122   W12 = 12,
123   W13 = 13,
124   W14 = 14,
125   W15 = 15,
126   W16 = 16,
127   W17 = 17,
128   W18 = 18,
129   W19 = 19,
130   W20 = 20,
131   W21 = 21,
132   W22 = 22,
133   W23 = 23,
134   W24 = 24,
135   W25 = 25,
136   W26 = 26,
137   W27 = 27,
138   W28 = 28,
139   W29 = 29,
140   W30 = 30,
141   W31 = 31,
142   kNumberOfVectorRegisters = 32,
143   kNoVectorRegister = -1,
144 };
145 std::ostream& operator<<(std::ostream& os, const VectorRegister& rhs);
146 
147 }  // namespace mips
148 }  // namespace art
149 
150 #endif  // ART_RUNTIME_ARCH_MIPS_REGISTERS_MIPS_H_
151