1 /*
2  * Copyright (c) 2016, Alliance for Open Media. All rights reserved
3  *
4  * This source code is subject to the terms of the BSD 2 Clause License and
5  * the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License
6  * was not distributed with this source code in the LICENSE file, you can
7  * obtain it at www.aomedia.org/license/software. If the Alliance for Open
8  * Media Patent License 1.0 was not distributed with this source code in the
9  * PATENTS file, you can obtain it at www.aomedia.org/license/patent.
10  */
11 
12 #include <assert.h>
13 #include <emmintrin.h>
14 #include <stdio.h>
15 
16 #include "aom_dsp/x86/synonyms.h"
17 #include "aom_dsp/x86/sum_squares_sse2.h"
18 #include "config/aom_dsp_rtcd.h"
19 
xx_loadh_64(__m128i a,const void * b)20 static INLINE __m128i xx_loadh_64(__m128i a, const void *b) {
21   const __m128d ad = _mm_castsi128_pd(a);
22   return _mm_castpd_si128(_mm_loadh_pd(ad, (double *)b));
23 }
24 
xx_cvtsi128_si64(__m128i a)25 static INLINE uint64_t xx_cvtsi128_si64(__m128i a) {
26 #if ARCH_X86_64
27   return (uint64_t)_mm_cvtsi128_si64(a);
28 #else
29   {
30     uint64_t tmp;
31     _mm_storel_epi64((__m128i *)&tmp, a);
32     return tmp;
33   }
34 #endif
35 }
36 
sum_squares_i16_4x4_sse2(const int16_t * src,int stride)37 static INLINE __m128i sum_squares_i16_4x4_sse2(const int16_t *src, int stride) {
38   const __m128i v_val_0_w = xx_loadl_64(src + 0 * stride);
39   const __m128i v_val_2_w = xx_loadl_64(src + 2 * stride);
40   const __m128i v_val_01_w = xx_loadh_64(v_val_0_w, src + 1 * stride);
41   const __m128i v_val_23_w = xx_loadh_64(v_val_2_w, src + 3 * stride);
42   const __m128i v_sq_01_d = _mm_madd_epi16(v_val_01_w, v_val_01_w);
43   const __m128i v_sq_23_d = _mm_madd_epi16(v_val_23_w, v_val_23_w);
44 
45   return _mm_add_epi32(v_sq_01_d, v_sq_23_d);
46 }
47 
aom_sum_squares_2d_i16_4x4_sse2(const int16_t * src,int stride)48 uint64_t aom_sum_squares_2d_i16_4x4_sse2(const int16_t *src, int stride) {
49   const __m128i v_sum_0123_d = sum_squares_i16_4x4_sse2(src, stride);
50   __m128i v_sum_d =
51       _mm_add_epi32(v_sum_0123_d, _mm_srli_epi64(v_sum_0123_d, 32));
52   v_sum_d = _mm_add_epi32(v_sum_d, _mm_srli_si128(v_sum_d, 8));
53   return (uint64_t)_mm_cvtsi128_si32(v_sum_d);
54 }
55 
aom_sum_squares_2d_i16_4xn_sse2(const int16_t * src,int stride,int height)56 uint64_t aom_sum_squares_2d_i16_4xn_sse2(const int16_t *src, int stride,
57                                          int height) {
58   int r = 0;
59   __m128i v_acc_q = _mm_setzero_si128();
60   do {
61     const __m128i v_acc_d = sum_squares_i16_4x4_sse2(src, stride);
62     v_acc_q = _mm_add_epi32(v_acc_q, v_acc_d);
63     src += stride << 2;
64     r += 4;
65   } while (r < height);
66   const __m128i v_zext_mask_q = xx_set1_64_from_32i(0xffffffff);
67   __m128i v_acc_64 = _mm_add_epi64(_mm_srli_epi64(v_acc_q, 32),
68                                    _mm_and_si128(v_acc_q, v_zext_mask_q));
69   v_acc_64 = _mm_add_epi64(v_acc_64, _mm_srli_si128(v_acc_64, 8));
70   return xx_cvtsi128_si64(v_acc_64);
71 }
72 
73 #ifdef __GNUC__
74 // This prevents GCC/Clang from inlining this function into
75 // aom_sum_squares_2d_i16_sse2, which in turn saves some stack
76 // maintenance instructions in the common case of 4x4.
77 __attribute__((noinline))
78 #endif
79 uint64_t
aom_sum_squares_2d_i16_nxn_sse2(const int16_t * src,int stride,int width,int height)80 aom_sum_squares_2d_i16_nxn_sse2(const int16_t *src, int stride, int width,
81                                 int height) {
82   int r = 0;
83 
84   const __m128i v_zext_mask_q = xx_set1_64_from_32i(0xffffffff);
85   __m128i v_acc_q = _mm_setzero_si128();
86 
87   do {
88     __m128i v_acc_d = _mm_setzero_si128();
89     int c = 0;
90     do {
91       const int16_t *b = src + c;
92 
93       const __m128i v_val_0_w = xx_load_128(b + 0 * stride);
94       const __m128i v_val_1_w = xx_load_128(b + 1 * stride);
95       const __m128i v_val_2_w = xx_load_128(b + 2 * stride);
96       const __m128i v_val_3_w = xx_load_128(b + 3 * stride);
97 
98       const __m128i v_sq_0_d = _mm_madd_epi16(v_val_0_w, v_val_0_w);
99       const __m128i v_sq_1_d = _mm_madd_epi16(v_val_1_w, v_val_1_w);
100       const __m128i v_sq_2_d = _mm_madd_epi16(v_val_2_w, v_val_2_w);
101       const __m128i v_sq_3_d = _mm_madd_epi16(v_val_3_w, v_val_3_w);
102 
103       const __m128i v_sum_01_d = _mm_add_epi32(v_sq_0_d, v_sq_1_d);
104       const __m128i v_sum_23_d = _mm_add_epi32(v_sq_2_d, v_sq_3_d);
105 
106       const __m128i v_sum_0123_d = _mm_add_epi32(v_sum_01_d, v_sum_23_d);
107 
108       v_acc_d = _mm_add_epi32(v_acc_d, v_sum_0123_d);
109       c += 8;
110     } while (c < width);
111 
112     v_acc_q = _mm_add_epi64(v_acc_q, _mm_and_si128(v_acc_d, v_zext_mask_q));
113     v_acc_q = _mm_add_epi64(v_acc_q, _mm_srli_epi64(v_acc_d, 32));
114 
115     src += 4 * stride;
116     r += 4;
117   } while (r < height);
118 
119   v_acc_q = _mm_add_epi64(v_acc_q, _mm_srli_si128(v_acc_q, 8));
120   return xx_cvtsi128_si64(v_acc_q);
121 }
122 
aom_sum_squares_2d_i16_sse2(const int16_t * src,int stride,int width,int height)123 uint64_t aom_sum_squares_2d_i16_sse2(const int16_t *src, int stride, int width,
124                                      int height) {
125   // 4 elements per row only requires half an XMM register, so this
126   // must be a special case, but also note that over 75% of all calls
127   // are with size == 4, so it is also the common case.
128   if (LIKELY(width == 4 && height == 4)) {
129     return aom_sum_squares_2d_i16_4x4_sse2(src, stride);
130   } else if (LIKELY(width == 4 && (height & 3) == 0)) {
131     return aom_sum_squares_2d_i16_4xn_sse2(src, stride, height);
132   } else if (LIKELY((width & 7) == 0 && (height & 3) == 0)) {
133     // Generic case
134     return aom_sum_squares_2d_i16_nxn_sse2(src, stride, width, height);
135   } else {
136     return aom_sum_squares_2d_i16_c(src, stride, width, height);
137   }
138 }
139 
140 //////////////////////////////////////////////////////////////////////////////
141 // 1D version
142 //////////////////////////////////////////////////////////////////////////////
143 
aom_sum_squares_i16_64n_sse2(const int16_t * src,uint32_t n)144 static uint64_t aom_sum_squares_i16_64n_sse2(const int16_t *src, uint32_t n) {
145   const __m128i v_zext_mask_q = xx_set1_64_from_32i(0xffffffff);
146   __m128i v_acc0_q = _mm_setzero_si128();
147   __m128i v_acc1_q = _mm_setzero_si128();
148 
149   const int16_t *const end = src + n;
150 
151   assert(n % 64 == 0);
152 
153   while (src < end) {
154     const __m128i v_val_0_w = xx_load_128(src);
155     const __m128i v_val_1_w = xx_load_128(src + 8);
156     const __m128i v_val_2_w = xx_load_128(src + 16);
157     const __m128i v_val_3_w = xx_load_128(src + 24);
158     const __m128i v_val_4_w = xx_load_128(src + 32);
159     const __m128i v_val_5_w = xx_load_128(src + 40);
160     const __m128i v_val_6_w = xx_load_128(src + 48);
161     const __m128i v_val_7_w = xx_load_128(src + 56);
162 
163     const __m128i v_sq_0_d = _mm_madd_epi16(v_val_0_w, v_val_0_w);
164     const __m128i v_sq_1_d = _mm_madd_epi16(v_val_1_w, v_val_1_w);
165     const __m128i v_sq_2_d = _mm_madd_epi16(v_val_2_w, v_val_2_w);
166     const __m128i v_sq_3_d = _mm_madd_epi16(v_val_3_w, v_val_3_w);
167     const __m128i v_sq_4_d = _mm_madd_epi16(v_val_4_w, v_val_4_w);
168     const __m128i v_sq_5_d = _mm_madd_epi16(v_val_5_w, v_val_5_w);
169     const __m128i v_sq_6_d = _mm_madd_epi16(v_val_6_w, v_val_6_w);
170     const __m128i v_sq_7_d = _mm_madd_epi16(v_val_7_w, v_val_7_w);
171 
172     const __m128i v_sum_01_d = _mm_add_epi32(v_sq_0_d, v_sq_1_d);
173     const __m128i v_sum_23_d = _mm_add_epi32(v_sq_2_d, v_sq_3_d);
174     const __m128i v_sum_45_d = _mm_add_epi32(v_sq_4_d, v_sq_5_d);
175     const __m128i v_sum_67_d = _mm_add_epi32(v_sq_6_d, v_sq_7_d);
176 
177     const __m128i v_sum_0123_d = _mm_add_epi32(v_sum_01_d, v_sum_23_d);
178     const __m128i v_sum_4567_d = _mm_add_epi32(v_sum_45_d, v_sum_67_d);
179 
180     const __m128i v_sum_d = _mm_add_epi32(v_sum_0123_d, v_sum_4567_d);
181 
182     v_acc0_q = _mm_add_epi64(v_acc0_q, _mm_and_si128(v_sum_d, v_zext_mask_q));
183     v_acc1_q = _mm_add_epi64(v_acc1_q, _mm_srli_epi64(v_sum_d, 32));
184 
185     src += 64;
186   }
187 
188   v_acc0_q = _mm_add_epi64(v_acc0_q, v_acc1_q);
189   v_acc0_q = _mm_add_epi64(v_acc0_q, _mm_srli_si128(v_acc0_q, 8));
190   return xx_cvtsi128_si64(v_acc0_q);
191 }
192 
aom_sum_squares_i16_sse2(const int16_t * src,uint32_t n)193 uint64_t aom_sum_squares_i16_sse2(const int16_t *src, uint32_t n) {
194   if (n % 64 == 0) {
195     return aom_sum_squares_i16_64n_sse2(src, n);
196   } else if (n > 64) {
197     int k = n & ~(64 - 1);
198     return aom_sum_squares_i16_64n_sse2(src, k) +
199            aom_sum_squares_i16_c(src + k, n - k);
200   } else {
201     return aom_sum_squares_i16_c(src, n);
202   }
203 }
204