1 /*
2  * Copyright 2014 The Chromium OS Authors. All rights reserved.
3  * Use of this source code is governed by a BSD-style license that can be
4  * found in the LICENSE file.
5  */
6 
7 #ifdef DRV_ROCKCHIP
8 
9 #include <errno.h>
10 #include <rockchip_drm.h>
11 #include <stdbool.h>
12 #include <stdio.h>
13 #include <string.h>
14 #include <sys/mman.h>
15 #include <xf86drm.h>
16 
17 #include "drv_priv.h"
18 #include "helpers.h"
19 #include "util.h"
20 
21 struct rockchip_private_map_data {
22 	void *cached_addr;
23 	void *gem_addr;
24 };
25 
26 static const uint32_t render_target_formats[] = { DRM_FORMAT_ABGR8888, DRM_FORMAT_ARGB8888,
27 						  DRM_FORMAT_BGR888,   DRM_FORMAT_RGB565,
28 						  DRM_FORMAT_XBGR8888, DRM_FORMAT_XRGB8888 };
29 
30 static const uint32_t texture_source_formats[] = { DRM_FORMAT_R8, DRM_FORMAT_NV12,
31 						   DRM_FORMAT_YVU420, DRM_FORMAT_YVU420_ANDROID };
32 
afbc_bo_from_format(struct bo * bo,uint32_t width,uint32_t height,uint32_t format)33 static int afbc_bo_from_format(struct bo *bo, uint32_t width, uint32_t height, uint32_t format)
34 {
35 	/* We've restricted ourselves to four bytes per pixel. */
36 	const uint32_t pixel_size = 4;
37 
38 	const uint32_t clump_width = 4;
39 	const uint32_t clump_height = 4;
40 
41 #define AFBC_NARROW 1
42 #if AFBC_NARROW == 1
43 	const uint32_t block_width = 4 * clump_width;
44 	const uint32_t block_height = 4 * clump_height;
45 #else
46 	const uint32_t block_width = 8 * clump_width;
47 	const uint32_t block_height = 2 * clump_height;
48 #endif
49 
50 	const uint32_t header_block_size = 16;
51 	const uint32_t body_block_size = block_width * block_height * pixel_size;
52 	const uint32_t width_in_blocks = DIV_ROUND_UP(width, block_width);
53 	const uint32_t height_in_blocks = DIV_ROUND_UP(height, block_height);
54 	const uint32_t total_blocks = width_in_blocks * height_in_blocks;
55 
56 	const uint32_t header_plane_size = total_blocks * header_block_size;
57 	const uint32_t body_plane_size = total_blocks * body_block_size;
58 
59 	/* GPU requires 64 bytes, but EGL import code expects 1024 byte
60 	 * alignement for the body plane. */
61 	const uint32_t body_plane_alignment = 1024;
62 
63 	const uint32_t body_plane_offset = ALIGN(header_plane_size, body_plane_alignment);
64 	const uint32_t total_size = body_plane_offset + body_plane_size;
65 
66 	bo->strides[0] = width_in_blocks * block_width * pixel_size;
67 	bo->sizes[0] = total_size;
68 	bo->offsets[0] = 0;
69 
70 	bo->total_size = total_size;
71 
72 	bo->format_modifiers[0] = DRM_FORMAT_MOD_CHROMEOS_ROCKCHIP_AFBC;
73 
74 	return 0;
75 }
76 
rockchip_add_kms_item(struct driver * drv,const struct kms_item * item)77 static int rockchip_add_kms_item(struct driver *drv, const struct kms_item *item)
78 {
79 	uint32_t i, j;
80 	uint64_t use_flags;
81 	struct combination *combo;
82 	struct format_metadata metadata;
83 
84 	for (i = 0; i < drv_array_size(drv->combos); i++) {
85 		combo = (struct combination *)drv_array_at_idx(drv->combos, i);
86 		if (combo->format == item->format) {
87 			if (item->modifier == DRM_FORMAT_MOD_CHROMEOS_ROCKCHIP_AFBC) {
88 				use_flags = BO_USE_RENDERING | BO_USE_SCANOUT | BO_USE_TEXTURE;
89 				metadata.modifier = item->modifier;
90 				metadata.tiling = 0;
91 				metadata.priority = 2;
92 
93 				for (j = 0; j < ARRAY_SIZE(texture_source_formats); j++) {
94 					if (item->format == texture_source_formats[j])
95 						use_flags &= ~BO_USE_RENDERING;
96 				}
97 
98 				drv_add_combinations(drv, &item->format, 1, &metadata, use_flags);
99 			} else {
100 				combo->use_flags |= item->use_flags;
101 			}
102 		}
103 	}
104 
105 	return 0;
106 }
107 
rockchip_init(struct driver * drv)108 static int rockchip_init(struct driver *drv)
109 {
110 	int ret;
111 	uint32_t i;
112 	struct drv_array *kms_items;
113 	struct format_metadata metadata;
114 
115 	metadata.tiling = 0;
116 	metadata.priority = 1;
117 	metadata.modifier = DRM_FORMAT_MOD_LINEAR;
118 
119 	drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
120 			     &metadata, BO_USE_RENDER_MASK);
121 
122 	drv_add_combinations(drv, texture_source_formats, ARRAY_SIZE(texture_source_formats),
123 			     &metadata, BO_USE_TEXTURE_MASK);
124 
125 	drv_modify_combination(drv, DRM_FORMAT_XRGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
126 	drv_modify_combination(drv, DRM_FORMAT_ARGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
127 
128 	/* Camera ISP supports only NV12 output. */
129 	drv_modify_combination(drv, DRM_FORMAT_NV12, &metadata,
130 			       BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE);
131 	/*
132 	 * R8 format is used for Android's HAL_PIXEL_FORMAT_BLOB and is used for JPEG snapshots
133 	 * from camera.
134 	 */
135 	drv_modify_combination(drv, DRM_FORMAT_R8, &metadata,
136 			       BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE);
137 
138 	kms_items = drv_query_kms(drv);
139 	if (!kms_items)
140 		return 0;
141 
142 	for (i = 0; i < drv_array_size(kms_items); i++) {
143 		ret = rockchip_add_kms_item(drv, (struct kms_item *)drv_array_at_idx(kms_items, i));
144 		if (ret) {
145 			drv_array_destroy(kms_items);
146 			return ret;
147 		}
148 	}
149 
150 	drv_array_destroy(kms_items);
151 	return 0;
152 }
153 
has_modifier(const uint64_t * list,uint32_t count,uint64_t modifier)154 static bool has_modifier(const uint64_t *list, uint32_t count, uint64_t modifier)
155 {
156 	uint32_t i;
157 	for (i = 0; i < count; i++)
158 		if (list[i] == modifier)
159 			return true;
160 
161 	return false;
162 }
163 
rockchip_bo_create_with_modifiers(struct bo * bo,uint32_t width,uint32_t height,uint32_t format,const uint64_t * modifiers,uint32_t count)164 static int rockchip_bo_create_with_modifiers(struct bo *bo, uint32_t width, uint32_t height,
165 					     uint32_t format, const uint64_t *modifiers,
166 					     uint32_t count)
167 {
168 	int ret;
169 	size_t plane;
170 	struct drm_rockchip_gem_create gem_create;
171 
172 	if (format == DRM_FORMAT_NV12) {
173 		uint32_t w_mbs = DIV_ROUND_UP(ALIGN(width, 16), 16);
174 		uint32_t h_mbs = DIV_ROUND_UP(ALIGN(height, 16), 16);
175 
176 		uint32_t aligned_width = w_mbs * 16;
177 		uint32_t aligned_height = DIV_ROUND_UP(h_mbs * 16 * 3, 2);
178 
179 		drv_bo_from_format(bo, aligned_width, height, format);
180 		bo->total_size = bo->strides[0] * aligned_height + w_mbs * h_mbs * 128;
181 	} else if (width <= 2560 &&
182 		   has_modifier(modifiers, count, DRM_FORMAT_MOD_CHROMEOS_ROCKCHIP_AFBC)) {
183 		/* If the caller has decided they can use AFBC, always
184 		 * pick that */
185 		afbc_bo_from_format(bo, width, height, format);
186 	} else {
187 		if (!has_modifier(modifiers, count, DRM_FORMAT_MOD_LINEAR)) {
188 			errno = EINVAL;
189 			drv_log("no usable modifier found\n");
190 			return -1;
191 		}
192 
193 		uint32_t stride;
194 		/*
195 		 * Since the ARM L1 cache line size is 64 bytes, align to that
196 		 * as a performance optimization. For YV12, the Mali cmem allocator
197 		 * requires that chroma planes are aligned to 64-bytes, so align the
198 		 * luma plane to 128 bytes.
199 		 */
200 		stride = drv_stride_from_format(format, width, 0);
201 		if (format == DRM_FORMAT_YVU420 || format == DRM_FORMAT_YVU420_ANDROID)
202 			stride = ALIGN(stride, 128);
203 		else
204 			stride = ALIGN(stride, 64);
205 
206 		drv_bo_from_format(bo, stride, height, format);
207 	}
208 
209 	memset(&gem_create, 0, sizeof(gem_create));
210 	gem_create.size = bo->total_size;
211 
212 	ret = drmIoctl(bo->drv->fd, DRM_IOCTL_ROCKCHIP_GEM_CREATE, &gem_create);
213 
214 	if (ret) {
215 		drv_log("DRM_IOCTL_ROCKCHIP_GEM_CREATE failed (size=%llu)\n",
216 			(unsigned long long)gem_create.size);
217 		return ret;
218 	}
219 
220 	for (plane = 0; plane < bo->num_planes; plane++)
221 		bo->handles[plane].u32 = gem_create.handle;
222 
223 	return 0;
224 }
225 
rockchip_bo_create(struct bo * bo,uint32_t width,uint32_t height,uint32_t format,uint64_t use_flags)226 static int rockchip_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
227 			      uint64_t use_flags)
228 {
229 	uint64_t modifiers[] = { DRM_FORMAT_MOD_LINEAR };
230 	return rockchip_bo_create_with_modifiers(bo, width, height, format, modifiers,
231 						 ARRAY_SIZE(modifiers));
232 }
233 
rockchip_bo_map(struct bo * bo,struct vma * vma,size_t plane,uint32_t map_flags)234 static void *rockchip_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint32_t map_flags)
235 {
236 	int ret;
237 	struct drm_rockchip_gem_map_off gem_map;
238 	struct rockchip_private_map_data *priv;
239 
240 	/* We can only map buffers created with SW access flags, which should
241 	 * have no modifiers (ie, not AFBC). */
242 	if (bo->format_modifiers[0] == DRM_FORMAT_MOD_CHROMEOS_ROCKCHIP_AFBC)
243 		return MAP_FAILED;
244 
245 	memset(&gem_map, 0, sizeof(gem_map));
246 	gem_map.handle = bo->handles[0].u32;
247 
248 	ret = drmIoctl(bo->drv->fd, DRM_IOCTL_ROCKCHIP_GEM_MAP_OFFSET, &gem_map);
249 	if (ret) {
250 		drv_log("DRM_IOCTL_ROCKCHIP_GEM_MAP_OFFSET failed\n");
251 		return MAP_FAILED;
252 	}
253 
254 	void *addr = mmap(0, bo->total_size, drv_get_prot(map_flags), MAP_SHARED, bo->drv->fd,
255 			  gem_map.offset);
256 
257 	vma->length = bo->total_size;
258 
259 	if (bo->use_flags & BO_USE_RENDERSCRIPT) {
260 		priv = calloc(1, sizeof(*priv));
261 		priv->cached_addr = calloc(1, bo->total_size);
262 		priv->gem_addr = addr;
263 		vma->priv = priv;
264 		addr = priv->cached_addr;
265 	}
266 
267 	return addr;
268 }
269 
rockchip_bo_unmap(struct bo * bo,struct vma * vma)270 static int rockchip_bo_unmap(struct bo *bo, struct vma *vma)
271 {
272 	if (vma->priv) {
273 		struct rockchip_private_map_data *priv = vma->priv;
274 		vma->addr = priv->gem_addr;
275 		free(priv->cached_addr);
276 		free(priv);
277 		vma->priv = NULL;
278 	}
279 
280 	return munmap(vma->addr, vma->length);
281 }
282 
rockchip_bo_invalidate(struct bo * bo,struct mapping * mapping)283 static int rockchip_bo_invalidate(struct bo *bo, struct mapping *mapping)
284 {
285 	if (mapping->vma->priv) {
286 		struct rockchip_private_map_data *priv = mapping->vma->priv;
287 		memcpy(priv->cached_addr, priv->gem_addr, bo->total_size);
288 	}
289 
290 	return 0;
291 }
292 
rockchip_bo_flush(struct bo * bo,struct mapping * mapping)293 static int rockchip_bo_flush(struct bo *bo, struct mapping *mapping)
294 {
295 	struct rockchip_private_map_data *priv = mapping->vma->priv;
296 	if (priv && (mapping->vma->map_flags & BO_MAP_WRITE))
297 		memcpy(priv->gem_addr, priv->cached_addr, bo->total_size);
298 
299 	return 0;
300 }
301 
rockchip_resolve_format(uint32_t format,uint64_t use_flags)302 static uint32_t rockchip_resolve_format(uint32_t format, uint64_t use_flags)
303 {
304 	switch (format) {
305 	case DRM_FORMAT_FLEX_IMPLEMENTATION_DEFINED:
306 		/* Camera subsystem requires NV12. */
307 		if (use_flags & (BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE))
308 			return DRM_FORMAT_NV12;
309 		/*HACK: See b/28671744 */
310 		return DRM_FORMAT_XBGR8888;
311 	case DRM_FORMAT_FLEX_YCbCr_420_888:
312 		return DRM_FORMAT_NV12;
313 	default:
314 		return format;
315 	}
316 }
317 
318 const struct backend backend_rockchip = {
319 	.name = "rockchip",
320 	.init = rockchip_init,
321 	.bo_create = rockchip_bo_create,
322 	.bo_create_with_modifiers = rockchip_bo_create_with_modifiers,
323 	.bo_destroy = drv_gem_bo_destroy,
324 	.bo_import = drv_prime_bo_import,
325 	.bo_map = rockchip_bo_map,
326 	.bo_unmap = rockchip_bo_unmap,
327 	.bo_invalidate = rockchip_bo_invalidate,
328 	.bo_flush = rockchip_bo_flush,
329 	.resolve_format = rockchip_resolve_format,
330 };
331 
332 #endif
333