| /external/python/cpython2/Modules/cjkcodecs/ |
| D | _codecs_cn.c | 315 ENCODER_INIT(hz) in ENCODER_INIT() argument
321 ENCODER_RESET(hz) in ENCODER_RESET() argument
331 ENCODER(hz) in ENCODER() argument
374 DECODER_INIT(hz) in DECODER_INIT() argument
380 DECODER_RESET(hz) in DECODER_RESET() argument
386 DECODER(hz) in DECODER() argument
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| /external/python/cpython3/Modules/cjkcodecs/ |
| D | _codecs_cn.c | 330 ENCODER_INIT(hz) in ENCODER_INIT() argument
336 ENCODER_RESET(hz) in ENCODER_RESET() argument
346 ENCODER(hz) in ENCODER() argument
392 DECODER_INIT(hz) in DECODER_INIT() argument
398 DECODER_RESET(hz) in DECODER_RESET() argument
404 DECODER(hz) in DECODER() argument
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| /external/u-boot/drivers/spi/ |
| D | cadence_qspi.c | 22 static int cadence_spi_write_speed(struct udevice *bus, uint hz) in cadence_spi_write_speed()
39 static int spi_calibration(struct udevice *bus, uint hz) in spi_calibration()
118 static int cadence_spi_set_speed(struct udevice *bus, uint hz) in cadence_spi_set_speed()
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| D | mvebu_a3700_spi.c | 175 static int mvebu_spi_set_speed(struct udevice *bus, uint hz) in mvebu_spi_set_speed()
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| /external/deqp/framework/opengl/simplereference/ |
| D | sglrContextUtil.cpp | 47 float hz = (p0.z() + p1.z()) * 0.5f; in drawQuadWithVaoBuffers() local
117 float hz = (p0.z() + p1.z()) * 0.5f; in drawQuadWithClientPointers() local
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| /external/u-boot/lib/ |
| D | strmhz.c | 8 char *strmhz (char *buf, unsigned long hz) in strmhz()
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| /external/u-boot/drivers/clk/rockchip/ |
| D | clk_rk3128.c | 29 #define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\ argument
367 static ulong rk3128_peri_set_pclk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_peri_set_pclk()
402 static ulong rk3128_saradc_set_clk(struct rk3128_cru *cru, uint hz) in rk3128_saradc_set_clk()
416 static ulong rk3128_vop_set_clk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_vop_set_clk()
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| D | clk_rv1108.c | 29 #define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\ argument
143 static ulong rv1108_saradc_set_clk(struct rv1108_cru *cru, uint hz) in rv1108_saradc_set_clk()
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| D | clk_rk3188.c | 73 #define PLL_DIVISORS(hz, _nr, _no) {\ argument
120 unsigned int hz, bool has_bwadj) in rkclk_configure_ddr()
166 unsigned int hz, bool has_bwadj) in rkclk_configure_cpu()
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| D | clk_rk3368.c | 43 #define PLL_DIVISORS(hz, _nr, _no) { \ argument
400 static ulong rk3368_spi_set_clk(struct rk3368_cru *cru, ulong clk_id, uint hz) in rk3368_spi_set_clk()
438 static ulong rk3368_saradc_set_clk(struct rk3368_cru *cru, uint hz) in rk3368_saradc_set_clk()
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| D | clk_rk3399.c | 44 #define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\ argument
492 static ulong rk3399_i2c_set_clk(struct rk3399_cru *cru, ulong clk_id, uint hz) in rk3399_i2c_set_clk()
591 static ulong rk3399_spi_set_clk(struct rk3399_cru *cru, ulong clk_id, uint hz) in rk3399_spi_set_clk()
618 static ulong rk3399_vop_set_clk(struct rk3399_cru *cru, ulong clk_id, u32 hz) in rk3399_vop_set_clk()
816 static ulong rk3399_saradc_set_clk(struct rk3399_cru *cru, uint hz) in rk3399_saradc_set_clk()
1201 uint hz) in rk3399_i2c_set_pmuclk()
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| D | clk_rk3328.c | 32 #define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\ argument
358 static ulong rk3328_i2c_set_clk(struct rk3328_cru *cru, ulong clk_id, uint hz) in rk3328_i2c_set_clk()
515 static ulong rk3328_pwm_set_clk(struct rk3328_cru *cru, uint hz) in rk3328_pwm_set_clk()
538 static ulong rk3328_saradc_set_clk(struct rk3328_cru *cru, uint hz) in rk3328_saradc_set_clk()
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| D | clk_rk3288.c | 132 #define PLL_DIVISORS(hz, _nr, _no) {\ argument
175 unsigned int hz) in rkclk_configure_ddr()
684 static ulong rockchip_saradc_set_clk(struct rk3288_cru *cru, uint hz) in rockchip_saradc_set_clk()
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| D | clk_rk3036.c | 31 #define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\ argument
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| /external/u-boot/arch/arm/mach-sunxi/ |
| D | clock_sun4i.c | 118 void clock_set_pll1(unsigned int hz) in clock_set_pll1()
227 void clock_set_de_mod_clock(u32 *clk_cfg, unsigned int hz) in clock_set_de_mod_clock()
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| D | clock_sun6i.c | 331 void clock_set_de_mod_clock(u32 *clk_cfg, unsigned int hz) in clock_set_de_mod_clock()
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| /external/fdlibm/ |
| D | k_cos.c | 71 double a,hz,z,r,qx; local
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| D | e_fmod.c | 35 int n,hx,hy,hz,ix,iy,sx,i; local
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| /external/u-boot/lib/bzip2/ |
| D | bzlib_blocksort.c | 120 #define fpush(lz,hz) { stackLo[sp] = lz; \ argument
124 #define fpop(lz,hz) { sp--; \ argument
636 #define mpush(lz,hz,dz) { stackLo[sp] = lz; \ argument
641 #define mpop(lz,hz,dz) { sp--; \ argument
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| /external/bzip2/ |
| D | blocksort.c | 80 #define fpush(lz,hz) { stackLo[sp] = lz; \ argument
84 #define fpop(lz,hz) { sp--; \ argument
596 #define mpush(lz,hz,dz) { stackLo[sp] = lz; \ argument
601 #define mpop(lz,hz,dz) { sp--; \ argument
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| /external/autotest/client/profilers/powertop/src/ |
| D | cpufreqstats.c | 65 static char *HzToHuman(unsigned long hz) in HzToHuman()
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| /external/ltp/testcases/kernel/syscalls/adjtimex/ |
| D | adjtimex02.c | 110 static int hz; /* HZ from sysconf */ variable
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| /external/u-boot/board/Arcturus/ucp1020/ |
| D | ucp1020.c | 41 void spi_set_speed(struct spi_slave *slave, uint hz) in spi_set_speed()
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| /external/toybox/toys/posix/ |
| D | file.c | 325 int hz = le ? peek_le(s+24,4) : peek_be(s+24,4); in do_regular_file() local
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| /external/iproute2/bridge/ |
| D | fdb.c | 242 int hz = get_user_hz(); in print_fdb() local
|