| /external/tensorflow/tensorflow/compiler/xla/service/ |
| D | multi_output_fusion.cc | 113 HloInstruction* MultiOutputFusion::Fuse(HloInstruction* instr1, in Fuse()
150 void MultiOutputFusion::Update(HloInstruction* instr1, HloInstruction* instr2) { in Update()
216 bool MultiOutputFusion::LegalToFuse(HloInstruction* instr1, in LegalToFuse()
265 HloInstruction* instr1, HloInstruction* instr2, in UpdateReachability()
297 HloInstruction* instr1 = candidate.instr1; in Perform() local
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| D | multi_output_fusion.h | 141 HloInstruction* instr1; member
162 bool is_connected(HloInstruction* instr1, HloInstruction* instr2) { in is_connected()
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| D | hlo_verifier.cc | 1082 Status CheckSameChannel(const HloInstruction* instr1, in CheckSameChannel()
1097 Status CheckSameIsHostTransfer(const HloInstruction* instr1, in CheckSameIsHostTransfer()
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| D | hlo_instruction_test.cc | 1696 auto instr1 = HloInstruction::CreateCustomCall(ShapeUtil::MakeShape(F32, {}), in TEST_F() local
1708 auto instr1 = HloInstruction::CreateCustomCall(ShapeUtil::MakeShape(F32, {}), in TEST_F() local
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| /external/tensorflow/tensorflow/compiler/xla/service/gpu/ |
| D | multi_output_fusion.cc | 42 bool GpuMultiOutputFusion::ShapesCompatibleForFusion(HloInstruction* instr1, in ShapesCompatibleForFusion()
59 int64 GpuMultiOutputFusion::GetProfit(HloInstruction* instr1, in GetProfit()
80 bool GpuMultiOutputFusion::LegalToFuse(HloInstruction* instr1, in LegalToFuse()
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| D | gpu_fusible.cc | 89 bool ShapesCompatibleForMultiOutputFusion(const HloInstruction& instr1, in ShapesCompatibleForMultiOutputFusion()
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| /external/v8/src/ppc/ |
| D | assembler-ppc-inl.h | 279 Instr instr1 = instr_at(pc); in target_address_at() local
397 Instr instr1 = instr_at(pc); in PatchConstantPoolAccessInstruction() local
462 Instr instr1 = instr_at(pc); in set_target_address_at() local
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| D | assembler-ppc.cc | 338 bool Assembler::Is64BitLoadIntoR12(Instr instr1, Instr instr2, Instr instr3, in Is64BitLoadIntoR12()
352 bool Assembler::Is32BitLoadIntoR12(Instr instr1, Instr instr2) { in Is32BitLoadIntoR12()
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| /external/v8/src/mips/ |
| D | assembler-mips-inl.h | 144 Instr instr1 = Assembler::instr_at(pc + 0 * kInstrSize); in set_target_internal_reference_encoded_at() local
225 Instr instr1 = Assembler::instr_at(pc_ + 0 * kInstrSize); in target_internal_reference() local
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| D | assembler-mips.cc | 891 Instr instr1 = instr_at(pos + 0 * kInstrSize); in target_at() local
1019 Instr instr1 = instr_at(pos + 0 * kInstrSize); in target_at_put() local
3754 Instr instr1 = instr_at(pc + 0 * kInstrSize); in MSA_BIT_LIST() local
3966 Instr instr1 = instr_at(pc); in target_address_at() local
4012 Instr instr1 = instr_at(pc); in set_target_value_at() local
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| /external/mesa3d/src/compiler/nir/ |
| D | nir_instr_set.c | 254 nir_instrs_equal(const nir_instr *instr1, const nir_instr *instr2) in nir_instrs_equal()
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| /external/v8/src/s390/ |
| D | assembler-s390.cc | 398 bool Assembler::Is64BitLoadIntoIP(SixByteInstr instr1, SixByteInstr instr2) { in Is64BitLoadIntoIP()
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| /external/tensorflow/tensorflow/compiler/tf2xla/ |
| D | xla_compiler_test.cc | 707 auto instr1 = c1.instructions(j); in TEST_F() local
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| /external/v8/src/compiler/arm/ |
| D | code-generator-arm.cc | 419 #define ASSEMBLE_ATOMIC64_ARITH_BINOP(instr1, instr2) \ argument
2790 #define ATOMIC_ARITH_BINOP_CASE(op, instr1, instr2) \ in AssembleArchInstruction() argument
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| /external/v8/src/compiler/ia32/ |
| D | code-generator-ia32.cc | 430 #define ASSEMBLE_I64ATOMIC_BINOP(instr1, instr2) \ argument
3807 #define ATOMIC_BINOP_CASE(op, instr1, instr2) \ in AssembleArchInstruction() argument
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| /external/v8/src/mips64/ |
| D | assembler-mips64.cc | 4314 Instr instr1 = instr_at(pc + 1 * kInstrSize); in target_address_at() local
4364 Instr instr1 = instr_at(pc + kInstrSize); in set_target_value_at() local
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