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Searched defs:ld3 (Results 1 – 5 of 5) sorted by relevance

/external/vixl/test/aarch64/
Dtest-trace-aarch64.cc1019 __ ld3(v20.V16B(), v21.V16B(), v22.V16B(), MemOperand(x0)); in GenerateTestSequenceNEON() local
1020 __ ld3(v28.V16B(), v29.V16B(), v30.V16B(), MemOperand(x1, x2, PostIndex)); in GenerateTestSequenceNEON() local
1021 __ ld3(v20.V16B(), v21.V16B(), v22.V16B(), MemOperand(x1, 48, PostIndex)); in GenerateTestSequenceNEON() local
1022 __ ld3(v21.V2D(), v22.V2D(), v23.V2D(), MemOperand(x0)); in GenerateTestSequenceNEON() local
1023 __ ld3(v18.V2D(), v19.V2D(), v20.V2D(), MemOperand(x1, x2, PostIndex)); in GenerateTestSequenceNEON() local
1024 __ ld3(v27.V2D(), v28.V2D(), v29.V2D(), MemOperand(x1, 48, PostIndex)); in GenerateTestSequenceNEON() local
1025 __ ld3(v7.V2S(), v8.V2S(), v9.V2S(), MemOperand(x0)); in GenerateTestSequenceNEON() local
1026 __ ld3(v20.V2S(), v21.V2S(), v22.V2S(), MemOperand(x1, x2, PostIndex)); in GenerateTestSequenceNEON() local
1027 __ ld3(v26.V2S(), v27.V2S(), v28.V2S(), MemOperand(x1, 24, PostIndex)); in GenerateTestSequenceNEON() local
1028 __ ld3(v27.V4H(), v28.V4H(), v29.V4H(), MemOperand(x0)); in GenerateTestSequenceNEON() local
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/external/v8/src/arm64/
Dassembler-arm64.cc2785 void Assembler::ld3(const VRegister& vt, const VRegister& vt2, in ld3() function in v8::internal::Assembler
2794 void Assembler::ld3(const VRegister& vt, const VRegister& vt2, in ld3() function in v8::internal::Assembler
Dsimulator-logic-arm64.cc401 void Simulator::ld3(VectorFormat vform, LogicVRegister dst1, in ld3() function in v8::internal::Simulator
419 void Simulator::ld3(VectorFormat vform, LogicVRegister dst1, in ld3() function in v8::internal::Simulator
/external/vixl/src/aarch64/
Dassembler-aarch64.cc1972 void Assembler::ld3(const VRegister& vt, in ld3() function in vixl::aarch64::Assembler
1984 void Assembler::ld3(const VRegister& vt, in ld3() function in vixl::aarch64::Assembler
Dlogic-aarch64.cc239 void Simulator::ld3(VectorFormat vform, in ld3() function in vixl::aarch64::Simulator
261 void Simulator::ld3(VectorFormat vform, in ld3() function in vixl::aarch64::Simulator