/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/SVE/ |
D | mla.s | 10 mla z0.b, p7/m, z1.b, z31.b label 16 mla z0.h, p7/m, z1.h, z31.h label 22 mla z0.s, p7/m, z1.s, z31.s label 28 mla z0.d, p7/m, z1.d, z31.d label 44 mla z0.d, p7/m, z1.d, z31.d label 56 mla z0.d, p7/m, z1.d, z31.d label
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D | mla-diagnostics.s | 7 mla z0.h, p8/m, z1.h, z2.h label 16 mla z0.s, p7/m, z1.h, z2.h label
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D | movprfx-diagnostics.s | 37 mla z3.d, p0/m, z1.d, z2.d label 88 mla z0.d, p0/m, z0.d, z2.d label 128 mla z0.d, p1/m, z1.d, z2.d label 168 mla z0.d, p0/m, z1.d, z2.d label
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
D | mul-v4.s | 18 mla r0, r1, r2, r3 label
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/external/llvm/test/MC/ARM/ |
D | mul-v4.s | 18 mla r0, r1, r2, r3 label
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/external/vixl/test/aarch64/ |
D | test-trace-aarch64.cc | 1233 __ mla(v29.V16B(), v7.V16B(), v26.V16B()); in GenerateTestSequenceNEON() local 1234 __ mla(v6.V2S(), v4.V2S(), v14.V2S()); in GenerateTestSequenceNEON() local 1235 __ mla(v9.V2S(), v11.V2S(), v0.S(), 2); in GenerateTestSequenceNEON() local 1236 __ mla(v5.V4H(), v17.V4H(), v25.V4H()); in GenerateTestSequenceNEON() local 1237 __ mla(v24.V4H(), v7.V4H(), v11.H(), 3); in GenerateTestSequenceNEON() local 1238 __ mla(v12.V4S(), v3.V4S(), v4.V4S()); in GenerateTestSequenceNEON() local 1239 __ mla(v10.V4S(), v7.V4S(), v7.S(), 3); in GenerateTestSequenceNEON() local 1240 __ mla(v3.V8B(), v16.V8B(), v9.V8B()); in GenerateTestSequenceNEON() local 1241 __ mla(v19.V8H(), v22.V8H(), v18.V8H()); in GenerateTestSequenceNEON() local 1242 __ mla(v6.V8H(), v2.V8H(), v0.H(), 0); in GenerateTestSequenceNEON() local
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/external/v8/src/compiler/arm/ |
D | code-generator-arm.cc | 1071 __ mla(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1), in AssembleArchInstruction() local 1247 __ mla(i.OutputRegister(1), i.InputRegister(0), i.InputRegister(3), in AssembleArchInstruction() local 1249 __ mla(i.OutputRegister(1), i.InputRegister(2), i.InputRegister(1), in AssembleArchInstruction() local
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/external/v8/src/arm64/ |
D | simulator-logic-arm64.cc | 684 LogicVRegister Simulator::mla(VectorFormat vform, LogicVRegister dst, in mla() function in v8::internal::Simulator 720 LogicVRegister Simulator::mla(VectorFormat vform, LogicVRegister dst, in mla() function in v8::internal::Simulator
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/external/vixl/src/aarch64/ |
D | logic-aarch64.cc | 590 LogicVRegister Simulator::mla(VectorFormat vform, in mla() function in vixl::aarch64::Simulator 635 LogicVRegister Simulator::mla(VectorFormat vform, in mla() function in vixl::aarch64::Simulator
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/external/swiftshader/third_party/subzero/src/ |
D | IceAssemblerARM32.cpp | 2063 void AssemblerARM32::mla(const Operand *OpRd, const Operand *OpRn, in mla() function in Ice::ARM32::AssemblerARM32
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/external/v8/src/arm/ |
D | assembler-arm.cc | 1686 void Assembler::mla(Register dst, Register src1, Register src2, Register srcA, in mla() function in v8::internal::Assembler
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/external/vixl/src/aarch32/ |
D | assembler-aarch32.h | 2619 void mla(Register rd, Register rn, Register rm, Register ra) { in mla() function
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D | assembler-aarch32.cc | 6976 void Assembler::mla( in mla() function in vixl::aarch32::Assembler
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D | disasm-aarch32.cc | 1898 void Disassembler::mla( in mla() function in vixl::aarch32::Disassembler
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