Searched defs:muls (Results 1 – 8 of 8) sorted by relevance
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
| D | mul-v4.s | 10 muls r0, r1, r2 label
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| /external/llvm/test/MC/ARM/ |
| D | mul-v4.s | 10 muls r0, r1, r2 label
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| /external/mesa3d/src/gallium/drivers/nouveau/codegen/ |
| D | nv50_ir_peephole.cpp | 1354 int muls; in opnd() local
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| /external/swiftshader/third_party/subzero/src/DartARM32/ |
| D | assembler_arm.cc | 381 void Assembler::muls(Register rd, Register rn, Register rm, Condition cond) { in muls() function in dart::Assembler
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| /external/tensorflow/tensorflow/core/grappler/optimizers/ |
| D | constant_folding_test.cc | 761 std::vector<Output> muls; in TEST_F() local
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| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 2686 void muls(Register rd, Register rn, Register rm) { muls(al, rd, rn, rm); } in muls() function
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| D | assembler-aarch32.cc | 7479 void Assembler::muls(Condition cond, Register rd, Register rn, Register rm) { in muls() function in vixl::aarch32::Assembler
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| D | disasm-aarch32.cc | 1970 void Disassembler::muls(Condition cond, Register rd, Register rn, Register rm) { in muls() function in vixl::aarch32::Disassembler
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