1 //===---------------------- RetireStage.cpp ---------------------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 /// \file 10 /// 11 /// This file defines the retire stage of an instruction pipeline. 12 /// The RetireStage represents the process logic that interacts with the 13 /// simulated RetireControlUnit hardware. 14 /// 15 //===----------------------------------------------------------------------===// 16 17 #include "RetireStage.h" 18 #include "HWEventListener.h" 19 #include "llvm/Support/Debug.h" 20 21 using namespace llvm; 22 23 #define DEBUG_TYPE "llvm-mca" 24 25 namespace mca { 26 cycleStart()27void RetireStage::cycleStart() { 28 if (RCU.isEmpty()) 29 return; 30 31 const unsigned MaxRetirePerCycle = RCU.getMaxRetirePerCycle(); 32 unsigned NumRetired = 0; 33 while (!RCU.isEmpty()) { 34 if (MaxRetirePerCycle != 0 && NumRetired == MaxRetirePerCycle) 35 break; 36 const RetireControlUnit::RUToken &Current = RCU.peekCurrentToken(); 37 if (!Current.Executed) 38 break; 39 RCU.consumeCurrentToken(); 40 notifyInstructionRetired(Current.IR); 41 NumRetired++; 42 } 43 } 44 notifyInstructionRetired(const InstRef & IR)45void RetireStage::notifyInstructionRetired(const InstRef &IR) { 46 LLVM_DEBUG(dbgs() << "[E] Instruction Retired: #" << IR << '\n'); 47 SmallVector<unsigned, 4> FreedRegs(PRF.getNumRegisterFiles()); 48 const Instruction &Inst = *IR.getInstruction(); 49 const InstrDesc &Desc = Inst.getDesc(); 50 51 bool ShouldFreeRegs = !(Desc.isZeroLatency() && Inst.isDependencyBreaking()); 52 for (const std::unique_ptr<WriteState> &WS : Inst.getDefs()) 53 PRF.removeRegisterWrite(*WS.get(), FreedRegs, ShouldFreeRegs); 54 notifyEvent<HWInstructionEvent>(HWInstructionRetiredEvent(IR, FreedRegs)); 55 } 56 57 } // namespace mca 58