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Searched defs:reg_map (Results 1 – 12 of 12) sorted by relevance

/external/mesa3d/src/gallium/drivers/vc5/
Dv3dx_simulator.c105 static const uint32_t reg_map[] = { in v3dX() local
/external/u-boot/drivers/ddr/marvell/a38x/
Dddr3_training_bist.c227 u16 *reg_map = ddr3_tip_get_mask_results_pup_reg_map(); in mv_ddr_tip_bist() local
/external/pcre/dist2/src/sljit/
DsljitNativeX86_common.c73 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 3] = { variable
98 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 4] = { variable
107 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 4] = { variable
DsljitNativeSPARC_common.c100 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 6] = { variable
DsljitNativeARM_64.c46 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 8] = { variable
DsljitNativePPC_common.c107 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 7] = { variable
DsljitNativeMIPS_common.c66 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 5] = { variable
DsljitNativeARM_T2_32.c48 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 5] = { variable
DsljitNativeARM_32.c63 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 5] = { variable
DsljitNativeTILEGX_64.c52 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 6] = { variable
/external/u-boot/arch/arm/mach-exynos/
Dclock.c1049 const int reg_map[] = {0, CPLL, DPLL, MPLL, SPLL, IPLL, EPLL, in exynos5800_get_lcd_clk() local
/external/u-boot/include/
Dddr_spd.h384 u8 reg_map; member
410 uint8_t reg_map; member