/external/u-boot/drivers/pinctrl/mvebu/ |
D | pinctrl-mvebu.c | 98 int reg_offset; in mvebu_pinctrl_set_state() local 155 int reg_offset; in mvebu_pinctrl_set_state_all() local
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/external/u-boot/arch/arm/include/asm/arch-am33xx/ |
D | mux.h | 33 short reg_offset; member
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/external/u-boot/drivers/power/pmic/ |
D | pmic_tps65910.c | 43 unsigned int reg_offset; in tps65910_voltage_update() local
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/external/u-boot/drivers/reset/ |
D | reset-meson.c | 40 uint reg_offset = LEVEL_OFFSET + (bank << 2); in meson_reset_level() local
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D | reset-rockchip.c | 106 int rockchip_reset_bind(struct udevice *pdev, u32 reg_offset, u32 reg_number) in rockchip_reset_bind()
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/external/u-boot/arch/powerpc/include/asm/ |
D | fsl_liodn.h | 14 unsigned long reg_offset[2]; member 44 unsigned long reg_offset; member 56 unsigned long reg_offset; member
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/external/mesa3d/src/amd/vulkan/winsys/amdgpu/ |
D | radv_amdgpu_winsys.c | 130 unsigned reg_offset, in radv_amdgpu_winsys_read_registers()
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/external/u-boot/drivers/pinctrl/broadcom/ |
D | pinctrl-bcm283x.c | 35 int reg_offset; in bcm2835_gpio_set_func_id() local
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/external/u-boot/arch/arm/include/asm/arch-ls102xa/ |
D | ls102xa_stream_id.h | 62 unsigned long reg_offset; member
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/external/mesa3d/src/gallium/winsys/amdgpu/drm/ |
D | amdgpu_winsys.c | 187 unsigned reg_offset, in amdgpu_read_registers()
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/external/u-boot/drivers/gpio/ |
D | gpio-uniphier.c | 86 unsigned int bank, reg_offset; in uniphier_gpio_offset_read() local
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D | zynq_gpio.c | 222 unsigned int reg_offset, bank_num, bank_pin_num; in zynq_gpio_set_value() local
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/external/mesa3d/src/intel/compiler/ |
D | brw_vec4_visitor.cpp | 1428 src_reg *reladdr, int reg_offset) in get_scratch_offset() 1477 int reg_offset = base_offset + orig_src.offset / REG_SIZE; in emit_scratch_read() local 1506 int reg_offset = base_offset + inst->dst.offset / REG_SIZE; in emit_scratch_write() local 1722 int reg_offset = base_offset + src.offset / 16; in emit_pull_constant_load() local
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D | brw_ir_fs.h | 180 reg_offset(const fs_reg &r) in reg_offset() function
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D | brw_ir_vec4.h | 231 reg_offset(const backend_reg &r) in reg_offset() function
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/external/u-boot/board/siemens/pxm2/ |
D | board.c | 94 unsigned int reg_offset; in voltage_update() local
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/external/mesa3d/src/gallium/drivers/r600/ |
D | eg_debug.c | 134 unsigned reg_offset) in ac_parse_set_reg_packet()
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/external/u-boot/include/ |
D | ns16550.h | 59 int reg_offset; member
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/external/mesa3d/src/gallium/winsys/radeon/drm/ |
D | radeon_drm_winsys.c | 667 unsigned reg_offset, in radeon_read_registers()
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/external/u-boot/drivers/net/ |
D | mvgbe.c | 325 u32 reg_offset; in port_uc_addr() local
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D | sh_eth.h | 606 const u16 *reg_offset = sh_eth_offset_gigabit; in sh_eth_reg_addr() local
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/external/elfutils/libdw/ |
D | cfi.h | 125 reg_offset, /* DW_CFA_offset_extended et al */ enumerator
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/external/mesa3d/src/amd/common/ |
D | ac_debug.c | 199 static void ac_parse_set_reg_packet(FILE *f, unsigned count, unsigned reg_offset, in ac_parse_set_reg_packet()
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/external/u-boot/drivers/ddr/marvell/a38x/ |
D | ddr3_training_ip_engine.c | 701 u32 reg_offset, pup_cnt, start_pup, end_pup, start_reg, end_reg; in ddr3_tip_read_training_result() local
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/external/mesa3d/src/amd/vulkan/ |
D | radv_cmd_buffer.c | 1357 unsigned reg_offset = 0, reg_count = 0; in radv_set_depth_clear_regs() local 1395 unsigned reg_offset = 0, reg_count = 0; in radv_load_depth_clear_regs() local
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