Home
last modified time | relevance | path

Searched defs:sqshl (Results 1 – 7 of 7) sorted by relevance

/external/llvm/test/MC/AArch64/
Darm64-advsimd.s1367 sqshl d0, d0, #4 define
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/
Darm64-advsimd.s1367 sqshl d0, d0, #4 define
/external/vixl/test/aarch64/
Dtest-trace-aarch64.cc1633 __ sqshl(b6, b21, b8); in GenerateTestSequenceNEON() local
1634 __ sqshl(b11, b26, 2); in GenerateTestSequenceNEON() local
1635 __ sqshl(d29, d0, d4); in GenerateTestSequenceNEON() local
1636 __ sqshl(d21, d7, 35); in GenerateTestSequenceNEON() local
1637 __ sqshl(h20, h25, h17); in GenerateTestSequenceNEON() local
1638 __ sqshl(h20, h0, 8); in GenerateTestSequenceNEON() local
1639 __ sqshl(s29, s13, s4); in GenerateTestSequenceNEON() local
1640 __ sqshl(s10, s11, 20); in GenerateTestSequenceNEON() local
1641 __ sqshl(v8.V16B(), v18.V16B(), v28.V16B()); in GenerateTestSequenceNEON() local
1642 __ sqshl(v29.V16B(), v29.V16B(), 2); in GenerateTestSequenceNEON() local
[all …]
/external/v8/src/arm64/
Dassembler-arm64.cc2033 void Assembler::sqshl(const VRegister& vd, const VRegister& vn, int shift) { in sqshl() function in v8::internal::Assembler
Dsimulator-logic-arm64.cc1410 LogicVRegister Simulator::sqshl(VectorFormat vform, LogicVRegister dst, in sqshl() function in v8::internal::Simulator
/external/vixl/src/aarch64/
Dassembler-aarch64.cc4724 void Assembler::sqshl(const VRegister& vd, const VRegister& vn, int shift) { in sqshl() function in vixl::aarch64::Assembler
Dlogic-aarch64.cc1542 LogicVRegister Simulator::sqshl(VectorFormat vform, in sqshl() function in vixl::aarch64::Simulator