Searched defs:ssra (Results 1 – 7 of 7) sorted by relevance
| /external/llvm/test/MC/AArch64/ |
| D | arm64-advsimd.s | 1565 ssra d0, d0, #64 define
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
| D | arm64-advsimd.s | 1565 ssra d0, d0, #64 define
|
| /external/vixl/test/aarch64/ |
| D | test-trace-aarch64.cc | 1773 __ ssra(d12, d28, 44); in GenerateTestSequenceNEON() local
1774 __ ssra(v29.V16B(), v31.V16B(), 4); in GenerateTestSequenceNEON() local
1775 __ ssra(v3.V2D(), v0.V2D(), 24); in GenerateTestSequenceNEON() local
1776 __ ssra(v14.V2S(), v28.V2S(), 6); in GenerateTestSequenceNEON() local
1777 __ ssra(v18.V4H(), v8.V4H(), 7); in GenerateTestSequenceNEON() local
1778 __ ssra(v31.V4S(), v14.V4S(), 24); in GenerateTestSequenceNEON() local
1779 __ ssra(v28.V8B(), v26.V8B(), 5); in GenerateTestSequenceNEON() local
1780 __ ssra(v9.V8H(), v9.V8H(), 14); in GenerateTestSequenceNEON() local
|
| /external/v8/src/arm64/ |
| D | assembler-arm64.cc | 2106 void Assembler::ssra(const VRegister& vd, const VRegister& vn, int shift) { in ssra() function in v8::internal::Assembler
|
| D | simulator-logic-arm64.cc | 1473 LogicVRegister Simulator::ssra(VectorFormat vform, LogicVRegister dst, in ssra() function in v8::internal::Simulator
|
| /external/vixl/src/aarch64/ |
| D | assembler-aarch64.cc | 4829 void Assembler::ssra(const VRegister& vd, const VRegister& vn, int shift) { in ssra() function in vixl::aarch64::Assembler
|
| D | logic-aarch64.cc | 1623 LogicVRegister Simulator::ssra(VectorFormat vform, in ssra() function in vixl::aarch64::Simulator
|