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/external/deqp-deps/glslang/Test/baseResults/
Dspv.vulkan100.subgroupPartitioned.comp.out2 ERROR: 0:19: 'subgroup op' : requires SPIR-V 1.3
3 ERROR: 0:21: 'subgroup op' : requires SPIR-V 1.3
4 ERROR: 0:22: 'subgroup op' : requires SPIR-V 1.3
5 ERROR: 0:23: 'subgroup op' : requires SPIR-V 1.3
6 ERROR: 0:24: 'subgroup op' : requires SPIR-V 1.3
7 ERROR: 0:26: 'subgroup op' : requires SPIR-V 1.3
8 ERROR: 0:27: 'subgroup op' : requires SPIR-V 1.3
9 ERROR: 0:28: 'subgroup op' : requires SPIR-V 1.3
10 ERROR: 0:29: 'subgroup op' : requires SPIR-V 1.3
11 ERROR: 0:31: 'subgroup op' : requires SPIR-V 1.3
[all …]
Dspv.vulkan100.subgroupArithmetic.comp.out2 ERROR: 0:19: 'subgroup op' : requires SPIR-V 1.3
3 ERROR: 0:20: 'subgroup op' : requires SPIR-V 1.3
4 ERROR: 0:21: 'subgroup op' : requires SPIR-V 1.3
5 ERROR: 0:22: 'subgroup op' : requires SPIR-V 1.3
6 ERROR: 0:24: 'subgroup op' : requires SPIR-V 1.3
7 ERROR: 0:25: 'subgroup op' : requires SPIR-V 1.3
8 ERROR: 0:26: 'subgroup op' : requires SPIR-V 1.3
9 ERROR: 0:27: 'subgroup op' : requires SPIR-V 1.3
10 ERROR: 0:29: 'subgroup op' : requires SPIR-V 1.3
11 ERROR: 0:30: 'subgroup op' : requires SPIR-V 1.3
[all …]
/external/libxml2/result/
Datt41 <?xml version="1.0" encoding="UTF-8"?>
2 <!-- edited with XML Spy v4.4 U (http://www.xmlspy.com) by Slava (GIVC) -->
8 <val o="0" v="53"/>
9 <val o="e08" v="53"/>
10 <val o="1c32" v="53"/>
11 <val o="2a3c" v="53"/>
12 <val o="3835" v="53"/>
13 <val o="4645" v="53"/>
14 <val o="5455" v="53"/>
15 <val o="6265" v="53"/>
[all …]
/external/libxml2/test/
Datt41 <?xml version="1.0" encoding="UTF-8"?>
2 <!-- edited with XML Spy v4.4 U (http://www.xmlspy.com) by Slava (GIVC) -->
8 <val o="0" v="53"/>
9 <val o="e08" v="53"/>
10 <val o="1c32" v="53"/>
11 <val o="2a3c" v="53"/>
12 <val o="3835" v="53"/>
13 <val o="4645" v="53"/>
14 <val o="5455" v="53"/>
15 <val o="6265" v="53"/>
[all …]
/external/libxml2/result/noent/
Datt41 <?xml version="1.0" encoding="UTF-8"?>
2 <!-- edited with XML Spy v4.4 U (http://www.xmlspy.com) by Slava (GIVC) -->
8 <val o="0" v="53"/>
9 <val o="e08" v="53"/>
10 <val o="1c32" v="53"/>
11 <val o="2a3c" v="53"/>
12 <val o="3835" v="53"/>
13 <val o="4645" v="53"/>
14 <val o="5455" v="53"/>
15 <val o="6265" v="53"/>
[all …]
/external/tcpdump/tests/
DTESTLIST1 # The options -n and -t are useless in TESTLIST. They are already set
6 # We cannot rely on, for example, "print-x.out" and
7 # "print-X.out" being different files - we might be running
8 # this on a case-insensitive file system, e.g. a Windows
9 # file system or a case-insensitive HFS+ file system on
12 # Therefore, for "X" and "XX", we have "print-capX.out"
13 # and "print-capXX.out".
15 print-x print-flags.pcap print-x.out -x
16 print-xx print-flags.pcap print-xx.out -xx
17 print-X print-flags.pcap print-capX.out -X
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dllvm.fma.f16.ll1 …lc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | Fi…
2-amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=fiji -mattr=-flat-for-global -verify-mach…
7 ; GCN-LABEL: {{^}}fma_f16
8 ; GCN: buffer_load_ushort v[[A_F16:[0-9]+]]
9 ; GCN: buffer_load_ushort v[[B_F16:[0-9]+]]
10 ; GCN: buffer_load_ushort v[[C_F16:[0-9]+]]
11 ; SI: v_cvt_f32_f16_e32 v[[A_F32:[0-9]+]], v[[A_F16]]
12 ; SI: v_cvt_f32_f16_e32 v[[B_F32:[0-9]+]], v[[B_F16]]
13 ; SI: v_cvt_f32_f16_e32 v[[C_F32:[0-9]+]], v[[C_F16]]
14 ; SI: v_fma_f32 v[[R_F32:[0-9]+]], v[[A_F32:[0-9]]], v[[B_F32:[0-9]]], v[[C_F32:[0-9]]]
[all …]
Dsdwa-peephole.ll1-amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=fiji -amdgpu-sdwa-peephole=0 -mattr=-fp64
2-amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=fiji -amdgpu-sdwa-peephole -mattr=-fp64-f…
3-amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=gfx900 -amdgpu-sdwa-peephole -mattr=-fp64
5 ; GCN-LABEL: {{^}}add_shr_i32:
6 ; NOSDWA: v_lshrrev_b32_e32 v[[DST:[0-9]+]], 16, v{{[0-9]+}}
7 ; NOSDWA: v_add_u32_e32 v{{[0-9]+}}, vcc, v{{[0-9]+}}, v[[DST]]
8 ; NOSDWA-NOT: v_add_{{(_co)?}}_u32_sdwa
10 ; VI: v_add_u32_sdwa v{{[0-9]+}}, vcc, v{{[0-9]+}}, v{{[0-9]+}} dst_sel:DWORD dst_unused:UNUSED_PAD…
11 ; GFX9: v_add_u32_sdwa v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} dst_sel:DWORD dst_unused:UNUSED_PAD sr…
21 ; GCN-LABEL: {{^}}sub_shr_i32:
[all …]
Dv_mac_f16.ll1-amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=tahiti -mattr=-fp64-fp16-denormals -veri…
2-amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=fiji -mattr=-fp64-fp16-denormals,-flat-f…
4 ; GCN-LABEL: {{^}}mac_f16:
5 ; GCN: {{buffer|flat}}_load_ushort v[[A_F16:[0-9]+]]
6 ; GCN: {{buffer|flat}}_load_ushort v[[B_F16:[0-9]+]]
7 ; GCN: {{buffer|flat}}_load_ushort v[[C_F16:[0-9]+]]
8 ; SI: v_cvt_f32_f16_e32 v[[A_F32:[0-9]+]], v[[A_F16]]
9 ; SI: v_cvt_f32_f16_e32 v[[B_F32:[0-9]+]], v[[B_F16]]
10 ; SI: v_cvt_f32_f16_e32 v[[C_F32:[0-9]+]], v[[C_F16]]
11 ; SI: v_mac_f32_e32 v[[C_F32]], v[[A_F32]], v[[B_F32]]
[all …]
Dllvm.fmuladd.f16.ll1-amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=tahiti -mattr=-fp64-fp16-denormals -verif…
2-amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=fiji -mattr=-fp64-fp16-denormals,-flat-fo…
3-amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=tahiti -mattr=+fp64-fp16-denormals -verif…
4-amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=fiji -mattr=+fp64-fp16-denormals,-flat-fo…
9 ; GCN-LABEL: {{^}}fmuladd_f16
10 ; GCN: buffer_load_ushort v[[A_F16:[0-9]+]]
11 ; GCN: buffer_load_ushort v[[B_F16:[0-9]+]]
12 ; GCN: buffer_load_ushort v[[C_F16:[0-9]+]]
13 ; SI: v_cvt_f32_f16_e32 v[[A_F32:[0-9]+]], v[[A_F16]]
14 ; SI: v_cvt_f32_f16_e32 v[[B_F32:[0-9]+]], v[[B_F16]]
[all …]
Dfmul.f16.ll1 ; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=tahiti -verify-machineinstrs < …
2-amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=fiji -mattr=-flat-for-global -verify-mac…
3-amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=gfx900 -mattr=-flat-for-global -verify-ma…
5 ; GCN-LABEL: {{^}}fmul_f16
6 ; GCN: buffer_load_ushort v[[A_F16:[0-9]+]]
7 ; GCN: buffer_load_ushort v[[B_F16:[0-9]+]]
8 ; SI: v_cvt_f32_f16_e32 v[[A_F32:[0-9]+]], v[[A_F16]]
9 ; SI: v_cvt_f32_f16_e32 v[[B_F32:[0-9]+]], v[[B_F16]]
10 ; SI: v_mul_f32_e32 v[[R_F32:[0-9]+]], v[[A_F32]], v[[B_F32]]
11 ; SI: v_cvt_f16_f32_e32 v[[R_F16:[0-9]+]], v[[R_F32]]
[all …]
Dfsub.f16.ll1 …llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | F…
2-amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=fiji -mattr=-flat-for-global -verify-mach…
3-amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=gfx900 -mattr=-flat-for-global -verify-ma…
5 ; GCN-LABEL: {{^}}fsub_f16:
6 ; GCN: buffer_load_ushort v[[A_F16:[0-9]+]]
7 ; GCN: buffer_load_ushort v[[B_F16:[0-9]+]]
8 ; SI: v_cvt_f32_f16_e32 v[[A_F32:[0-9]+]], v[[A_F16]]
9 ; SI: v_cvt_f32_f16_e32 v[[B_F32:[0-9]+]], v[[B_F16]]
10 ; SI: v_sub_f32_e32 v[[R_F32:[0-9]+]], v[[A_F32]], v[[B_F32]]
11 ; SI: v_cvt_f16_f32_e32 v[[R_F16:[0-9]+]], v[[R_F32]]
[all …]
/external/v8/src/ppc/
Dconstants-ppc.h2 // Use of this source code is governed by a BSD-style license that can be
35 const int kNoRegister = -1;
37 // Used in embedded constant pool builder - max reach in bits for
47 // sign-extend the least significant 16-bits of value <imm>
50 // sign-extend the least significant 22-bits of value <imm>
53 // sign-extend the least significant 26-bits of value <imm>
56 // -----------------------------------------------------------------------------
64 // https://www-01.ibm.com/chips/techlib/techlib.nsf/techdocs/852569B20050FF778525699600741775/$file…
70 kNoCondition = -1,
77 unordered = 6, // Floating-point unordered
[all …]
/external/v8/src/asmjs/
Dasm-names.h2 // Use of this source code is governed by a BSD-style license that can be
8 // V(stdlib.Math.<name>, constant-value)
9 #define STDLIB_MATH_VALUE_LIST(V) \ argument
10 V(E, 2.718281828459045) \
11 V(LN10, 2.302585092994046) \
12 V(LN2, 0.6931471805599453) \
13 V(LOG2E, 1.4426950408889634) \
14 V(LOG10E, 0.4342944819032518) \
15 V(PI, 3.141592653589793) \
16 V(SQRT1_2, 0.7071067811865476) \
[all …]
/external/v8/src/
Dexternal-reference.h2 // Use of this source code is governed by a BSD-style license that can be
22 //------------------------------------------------------------------------------
25 #define EXTERNAL_REFERENCE_LIST_WITH_ISOLATE(V) \ argument
26 V(isolate_address, "isolate") \
27 V(builtins_address, "builtins") \
28 V(handle_scope_implementer_address, \
30 V(pending_microtask_count_address, \
32 V(interpreter_dispatch_counters, "Interpreter::dispatch_counters") \
33 V(interpreter_dispatch_table_address, "Interpreter::dispatch_table_address") \
34 V(date_cache_stamp, "date_cache_stamp") \
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AMDGPU/
Dflat.s1 // RUN: llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s --check-prefix=CIVI --c…
2 // RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s --check-prefix=CIVI -…
10 // RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s 2>&1 | FileCheck %s --check-prefix=N…
11 // RUN: not llvm-mc -arch=amdgcn -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOSI
12 // RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s 2>&1 | FileCheck %s --check-prefix=…
14 //===----------------------------------------------------------------------===//
16 //===----------------------------------------------------------------------===//
18 flat_load_dword v1, v[3:4]
20 // CI: flat_load_dword v1, v[3:4] ; encoding: [0x00,0x00,0x30,0xdc,0x03,0x00,0x00,0x01]
21 // VI: flat_load_dword v1, v[3:4] ; encoding: [0x00,0x00,0x50,0xdc,0x03,0x00,0x00,0x01]
[all …]
/external/ltp/runtest/
Dnet.nfs5 nfs3_01 nfs01 -v 3 -t udp
6 nfs3t_01 nfs01 -v 3 -t tcp
7 nfs4_01 nfs01 -v 4 -t tcp
8 nfs41_01 nfs01 -v 4.1 -t tcp
9 nfs42_01 nfs01 -v 4.2 -t tcp
10 nfs3_ipv6_01 nfs01 -6 -v 3 -t udp
11 nfs3t_ipv6_01 nfs01 -6 -v 3 -t tcp
12 nfs4_ipv6_01 nfs01 -6 -v 4 -t tcp
13 nfs41_ipv6_01 nfs01 -6 -v 4.1 -t tcp
14 nfs42_ipv6_01 nfs01 -6 -v 4.2 -t tcp
[all …]
/external/swiftshader/third_party/subzero/tests_lit/reader_tests/
Dinsertextract.ll3 ; RUN: %p2i -i %s --insts | FileCheck %s
4 ; RUN: %l2i -i %s --insts | %ifl FileCheck %s
5 ; RUN: %lc2i -i %s --insts | %iflc FileCheck %s
6 ; RUN: %p2i -i %s --args -notranslate -timing | \
7 ; RUN: FileCheck --check-prefix=NOIR %s
9 define internal void @ExtractV4xi1(<4 x i1> %v) {
11 %e0 = extractelement <4 x i1> %v, i32 0
12 %e1 = extractelement <4 x i1> %v, i32 1
13 %e2 = extractelement <4 x i1> %v, i32 2
14 %e3 = extractelement <4 x i1> %v, i32 3
[all …]
/external/clang/include/clang/Basic/
DBuiltinsHexagon.def1 //===-- BuiltinsHexagon.def - Hexagon Builtin function database --*- C++ -*-==//
8 //===----------------------------------------------------------------------===//
10 // This file defines the Hexagon-specific builtin function database. Users of
13 //===----------------------------------------------------------------------===//
886 BUILTIN(__builtin_HEXAGON_S6_rol_i_r,"iii","v:60:")
887 BUILTIN(__builtin_HEXAGON_S6_rol_i_p,"LLiLLii","v:60:")
888 BUILTIN(__builtin_HEXAGON_S6_rol_i_r_acc,"iiii","v:60:")
889 BUILTIN(__builtin_HEXAGON_S6_rol_i_p_acc,"LLiLLiLLii","v:60:")
890 BUILTIN(__builtin_HEXAGON_S6_rol_i_r_nac,"iiii","v:60:")
891 BUILTIN(__builtin_HEXAGON_S6_rol_i_p_nac,"LLiLLiLLii","v:60:")
[all …]
/external/llvm/test/MC/AMDGPU/
Dflat.s1 // RUN: llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s --check-prefix=CIVI --c…
2 // RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s --check-prefix=CIVI -…
10 // RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s 2>&1 | FileCheck %s --check-prefix=N…
11 // RUN: not llvm-mc -arch=amdgcn -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOSI
12 // RUN: not llvm-mc -arch=amdgcn -mcpu=SI -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOSI
14 //===----------------------------------------------------------------------===//
16 //===----------------------------------------------------------------------===//
18 flat_load_dword v1, v[3:4]
20 // CI: flat_load_dword v1, v[3:4] ; encoding: [0x00,0x00,0x30,0xdc,0x03,0x00,0x00,0x01]
21 // VI: flat_load_dword v1, v[3:4] ; encoding: [0x00,0x00,0x50,0xdc,0x03,0x00,0x00,0x01]
[all …]
/external/v8/src/s390/
Dconstants-s390.h2 // Use of this source code is governed by a BSD-style license that can be
41 const int kNoRegister = -1;
48 // sign-extend the least significant 16-bits of value <imm>
51 // sign-extend the least significant 26-bits of value <imm>
54 // -----------------------------------------------------------------------------
67 kNoCondition = -1,
85 unordered = CC_OF, // Floating-point unordered
86 ordered = CC_NOF, // floating-point ordered
144 // -----------------------------------------------------------------------------
156 #define S390_RSY_A_OPCODE_LIST(V) \ argument
[all …]
/external/mesa3d/src/mesa/main/
Dapi_arrayelt.c2 * Mesa 3-D graphics library
4 * Copyright (C) 1999-2006 Brian Paul All Rights Reserved.
28 * and emitting a list of pointers to functions which set the per-vertex
82 return (AEcontext *) ctx->aelt_context; in AE_CONTEXT()
101 return AE_CONTEXT(ctx)->dirty_state; in _ae_is_state_dirty()
133 -1,
134 -1,
136 -1,
138 -1,
143 -1,
[all …]
/external/clang/test/Sema/
Dcast.c1 // RUN: %clang_cc1 -fsyntax-only -triple x86_64-unknown-unknown %s -verify
3 typedef struct { unsigned long bits[(((1) + (64) - 1) / (64))]; } cpumask_t;
11 b = (double)a; // expected-error {{pointer cannot be cast to type}} in bar()
12 a = (char*)b; // expected-error {{cannot be cast to a pointer type}} in bar()
31 void testBool(Bool v) { in testBool() argument
32 (void) (Bool) v; in testBool()
33 (void) (Int) v; in testBool()
34 (void) (Long) v; in testBool()
35 (void) (Float) v; in testBool()
36 (void) (Double) v; in testBool()
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/unittests/ADT/
DTinyPtrVectorTest.cpp1 //===- llvm/unittest/ADT/TinyPtrVectorTest.cpp ----------------------------===//
8 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
33 VectorT V; member in __anon525a065b0111::TinyPtrVectorTest
50 void appendValues(VectorT &V, ArrayRef<PtrT> Values) { in appendValues() argument
52 V.push_back(Values[i]); in appendValues()
56 V.clear(); in setVectors()
57 appendValues(V, Values1); in setVectors()
62 void expectValues(const VectorT &V, ArrayRef<PtrT> Values) { in expectValues() argument
63 EXPECT_EQ(Values.empty(), V.empty()); in expectValues()
[all …]
/external/llvm/unittests/ADT/
DTinyPtrVectorTest.cpp1 //===- llvm/unittest/ADT/TinyPtrVectorTest.cpp ----------------------------===//
8 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
39 VectorT V; member in __anon186813230111::TinyPtrVectorTest
56 void appendValues(VectorT &V, ArrayRef<PtrT> Values) { in appendValues() argument
58 V.push_back(Values[i]); in appendValues()
62 V.clear(); in setVectors()
63 appendValues(V, Values1); in setVectors()
68 void expectValues(const VectorT &V, ArrayRef<PtrT> Values) { in expectValues() argument
69 EXPECT_EQ(Values.empty(), V.empty()); in expectValues()
[all …]

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