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/external/clang/test/Misc/
Dast-dump-color.cpp32 …onUnitDecl[[RESET:.\[0m]][[Yellow:.\[0;33m]] 0x{{[0-9a-fA-F]*}}[[RESET]] <[[Yellow]]<invalid sloc>…
33 …RESET]][[GREEN]]TypedefDecl[[RESET]][[Yellow]] 0x{{[0-9a-fA-F]*}}[[RESET]] <[[Yellow]]<invalid slo…
34 …RESET]][[GREEN]]TypedefDecl[[RESET]][[Yellow]] 0x{{[0-9a-fA-F]*}}[[RESET]] <[[Yellow]]<invalid slo…
35 …RESET]][[GREEN]]TypedefDecl[[RESET]][[Yellow]] 0x{{[0-9a-fA-F]*}}[[RESET]] <[[Yellow]]<invalid slo…
36 …RESET]][[GREEN]]VarDecl[[RESET]][[Yellow]] 0x{{[0-9a-fA-F]*}}[[RESET]] <[[Yellow]]{{.*}}ast-dump-c…
37 …K: {{^}}[[Blue]]| |-[[RESET]][[BLUE:.\[0;1;34m]]UnusedAttr[[RESET]][[Yellow]] 0x{{[0-9a-fA-F]*}}[[…
38 …Blue]]| `-[[RESET]][[Blue]]FullComment[[RESET]][[Yellow]] 0x{{[0-9a-fA-F]*}}[[RESET]] <[[Yellow]]l…
39 …]| `-[[RESET]][[Blue]]ParagraphComment[[RESET]][[Yellow]] 0x{{[0-9a-fA-F]*}}[[RESET]] <[[Yellow]…
40 …K: {{^}}[[Blue]]| |-[[RESET]][[Blue]]TextComment[[RESET]][[Yellow]] 0x{{[0-9a-fA-F]*}}[[RESET]…
41 …]| |-[[RESET]][[Blue]]HTMLStartTagComment[[RESET]][[Yellow]] 0x{{[0-9a-fA-F]*}}[[RESET]] <[[Ye…
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Ddiag-template-diffing-color.cpp9 …ion from 'foo<[[CYAN:.\[0;1;36m]]double[[RESET:.\[0m]]>' to 'foo<[[CYAN]]int[[RESET]]>' for 1st ar…
12 // TREE: {{\[}}[[CYAN:.\[0;1;36m]]double[[RESET:.\[0m]] != [[CYAN]]int[[RESET]]]>[[RESET]]
16 …e 'foo<[[CYAN]]double[[RESET]][[BOLD:.\[1m]]>' cannot bind to a value of unrelated type 'foo<[[CYA…
19 // TREE: {{\[}}[[CYAN]]double[[RESET]][[BOLD:.\[1m]] != [[CYAN]]int[[RESET]][[BOLD]]]>[[RESET]]
27 …iable: no known conversion from 'vector<const vector<[[CYAN]]const{{ ?}}[[RESET]]{{ ?}}int>>' to '…
31 // TREE: {{\[}}[[CYAN]]const{{ ?}}[[RESET]]{{ ?}}!= [[CYAN]](no qualifiers)[[RESET]]] int>>
37 …unction not viable: no known conversion from 'vector<[[CYAN]]const{{ ?}}[[RESET]]{{ ?}}vector<...>…
40 // TREE: {{\[}}[[CYAN]]const{{ ?}}[[RESET]]{{ ?}}!= [[CYAN]](no qualifiers){{ ?}}[[RESET]]]{{ ?…
46 …own conversion from 'vector<vector<...>>' to 'vector<[[CYAN]]const{{ ?}}[[RESET]]{{ ?}}vector<...>…
49 // TREE: {{\[}}[[CYAN]](no qualifiers){{ ?}}[[RESET]]{{ ?}}!= [[CYAN]]const[[RESET]]] vector<..…
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/external/u-boot/include/
Dreset.h12 * A reset is a hardware signal indicating that a HW module (or IP block, or
13 * sometimes an entire off-CPU chip) reset all of its internal state to some
14 * known-good initial state. Drivers will often reset HW modules when they
16 * or in response to some error condition. Reset signals are often controlled
17 * externally to the HW module being reset, by an entity this API calls a reset
19 * reset controllers set or clear reset signals.
21 * A driver that implements UCLASS_RESET is a reset controller or provider. A
22 * controller will often implement multiple separate reset signals, since the
23 * hardware it manages often has this capability. reset-uclass.h describes the
24 * interface which reset controllers must implement.
[all …]
Dreset-uclass.h9 /* See reset.h for background documentation. */
11 #include <reset.h>
17 * struct reset_ops - The functions that a reset controller driver must
22 * of_xlate - Translate a client's device-tree (OF) reset specifier.
24 * The reset core calls this function as the first step in implementing
27 * If this function pointer is set to NULL, the reset core will use a
28 * default implementation, which assumes #reset-cells = <1>, and that
29 * the DT cell contains a simple integer reset signal ID.
31 * At present, the reset API solely supports device-tree. If this
35 * @reset_ctl: The reset control struct to hold the translation result.
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Dsysreset.h11 SYSRESET_WARM, /* Reset CPU, keep GPIOs active */
12 SYSRESET_COLD, /* Reset CPU and GPIOs */
13 SYSRESET_POWER, /* Reset PMIC (remove and restore power) */
22 * Note that this function may return before the reset takes effect.
24 * @type: Reset type to request
25 * @return -EINPROGRESS if the reset has been started and
27 * by this device, 0 if the reset has already happened
38 * @type: Reset type to request
44 * sysreset_walk() - cause a system reset
47 * perform a reset. If the provided sysreset type is not available, the next one
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/external/u-boot/doc/device-tree-bindings/reset/
Dreset.txt1 = Reset Signal Device Tree Bindings =
3 This binding is intended to represent the hardware reset signals present
4 internally in most IC (SoC, FPGA, ...) designs. Reset signals for whole
8 Hardware blocks typically receive a reset signal. This signal is generated by
9 a reset provider (e.g. power management or clock module) and received by a
10 reset consumer (the module being reset, or a module managing when a sub-
11 ordinate module is reset). This binding exists to represent the provider and
14 A reset signal is represented by the phandle of the provider, plus a reset
15 specifier - a list of DT cells that represents the reset signal within the
16 provider. The length (number of cells) and semantics of the reset specifier
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/external/u-boot/drivers/reset/
DKconfig1 menu "Reset Controller Support"
4 bool "Enable reset controllers using Driver Model"
7 Enable support for the reset controller driver class. Many hardware
8 modules are equipped with a reset signal, typically driven by some
9 reset controller hardware module within the chip. In U-Boot, reset
10 controller drivers allow control over these reset signals. In some
12 although driving such reset isgnals using GPIOs may be more
16 bool "Enable the sandbox reset test driver"
19 Enable support for a test reset controller implementation, which
20 simply accepts requests to reset various HW modules without actually
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Dreset-uniphier.c9 #include <reset-uclass.h>
42 /* System reset data */
98 /* Media I/O reset data */
137 /* Peripheral reset data */
261 /* System reset */
263 .compatible = "socionext,uniphier-ld4-reset",
267 .compatible = "socionext,uniphier-pro4-reset",
271 .compatible = "socionext,uniphier-sld8-reset",
275 .compatible = "socionext,uniphier-pro5-reset",
279 .compatible = "socionext,uniphier-pxs2-reset",
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DMakefile5 obj-$(CONFIG_DM_RESET) += reset-uclass.o
6 obj-$(CONFIG_SANDBOX_MBOX) += sandbox-reset.o
7 obj-$(CONFIG_SANDBOX_MBOX) += sandbox-reset-test.o
8 obj-$(CONFIG_STI_RESET) += sti-reset.o
9 obj-$(CONFIG_STM32_RESET) += stm32-reset.o
10 obj-$(CONFIG_TEGRA_CAR_RESET) += tegra-car-reset.o
11 obj-$(CONFIG_TEGRA186_RESET) += tegra186-reset.o
12 obj-$(CONFIG_RESET_BCM6345) += reset-bcm6345.o
13 obj-$(CONFIG_RESET_UNIPHIER) += reset-uniphier.o
14 obj-$(CONFIG_AST2500_RESET) += ast2500-reset.o
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/external/u-boot/doc/device-tree-bindings/gpu/
Dnvidia,tegra20-host1x.txt14 - resets: Must contain an entry for each entry in reset-names.
15 See ../reset/reset.txt for details.
16 - reset-names: Must include the following entries:
30 - resets: Must contain an entry for each entry in reset-names.
31 See ../reset/reset.txt for details.
32 - reset-names: Must include the following entries:
43 - resets: Must contain an entry for each entry in reset-names.
44 See ../reset/reset.txt for details.
45 - reset-names: Must include the following entries:
56 - resets: Must contain an entry for each entry in reset-names.
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/external/icu/icu4j/main/tests/core/src/com/ibm/icu/dev/test/lang/
DTestUScriptRun.java234 scriptRun.reset(0, 100); in TestReset()
235 errln("scriptRun.reset(0, 100) did not produce an IllegalArgumentException!"); in TestReset()
237 logln("PASS: scriptRun.reset failed as expected"); in TestReset()
241 scriptRun.reset(100, 0); in TestReset()
242 errln("scriptRun.reset(100, 0) did not produce an IllegalArgumentException!"); in TestReset()
244 logln("PASS: scriptRun.reset failed as expected"); in TestReset()
248 scriptRun.reset(0, -100); in TestReset()
249 errln("scriptRun.reset(0, -100) did not produce an IllegalArgumentException!"); in TestReset()
251 logln("PASS: scriptRun.reset failed as expected"); in TestReset()
255 scriptRun.reset(-100, 0); in TestReset()
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/external/icu/android_icu4j/src/main/tests/android/icu/dev/test/lang/
DTestUScriptRun.java237 scriptRun.reset(0, 100); in TestReset()
238 errln("scriptRun.reset(0, 100) did not produce an IllegalArgumentException!"); in TestReset()
240 logln("PASS: scriptRun.reset failed as expected"); in TestReset()
244 scriptRun.reset(100, 0); in TestReset()
245 errln("scriptRun.reset(100, 0) did not produce an IllegalArgumentException!"); in TestReset()
247 logln("PASS: scriptRun.reset failed as expected"); in TestReset()
251 scriptRun.reset(0, -100); in TestReset()
252 errln("scriptRun.reset(0, -100) did not produce an IllegalArgumentException!"); in TestReset()
254 logln("PASS: scriptRun.reset failed as expected"); in TestReset()
258 scriptRun.reset(-100, 0); in TestReset()
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/external/u-boot/arch/arm/mach-socfpga/
Dreset_manager_s10.c11 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
20 /* Assert or de-assert SoCFPGA reset manager reset. */
21 void socfpga_per_reset(u32 reset, int set) in socfpga_per_reset() argument
25 if (RSTMGR_BANK(reset) == 0) in socfpga_per_reset()
27 else if (RSTMGR_BANK(reset) == 1) in socfpga_per_reset()
29 else if (RSTMGR_BANK(reset) == 2) in socfpga_per_reset()
31 else if (RSTMGR_BANK(reset) == 3) in socfpga_per_reset()
33 else /* Invalid reset register, do nothing */ in socfpga_per_reset()
37 setbits_le32(reg, 1 << RSTMGR_RESET(reset)); in socfpga_per_reset()
39 clrbits_le32(reg, 1 << RSTMGR_RESET(reset)); in socfpga_per_reset()
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/external/python/google-api-python-client/docs/dyn/
DgamesManagement_v1management.events.html78 <code><a href="#reset">reset(eventId)</a></code></p>
79 …ccounts for your application. All quests for this player that use the event will also be reset.</p>
82 …hitelisted tester accounts for your application. All quests for this player will also be reset.</p>
85 …ccounts for your developer console. All quests that use any of these events will also be reset.</p>
88 …your developer console. Only draft events can be reset. All quests that use the event will also be…
91 … developer console. Only draft events may be reset. All quests that use any of the events will als…
94 <code class="details" id="reset">reset(eventId)</code>
95 …er accounts for your application. All quests for this player that use the event will also be reset.
104 …to whitelisted tester accounts for your application. All quests for this player will also be reset.
112 …er accounts for your developer console. All quests that use any of these events will also be reset.
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/external/libcxx/test/libcxx/language.support/support.dynamic/
Dlibcpp_deallocate.sh.cpp57 alloc_stats() { reset(); } in alloc_stats()
66 void reset() { in reset() function
150 stats.reset(); in test_libcpp_dealloc()
157 stats.reset(); in test_libcpp_dealloc()
163 stats.reset(); in test_libcpp_dealloc()
169 stats.reset(); in test_libcpp_dealloc()
175 stats.reset(); in test_libcpp_dealloc()
180 stats.reset(); in test_libcpp_dealloc()
185 stats.reset(); in test_libcpp_dealloc()
195 stats.reset(); in test_allocator_and_new_match()
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/external/skqp/tests/
DUtilsTest.cpp58 tmp.reset(0); // test out reset(0) when already at 0 in test_autostarray()
59 tmp.reset(4); // this should force a new allocation in test_autostarray()
61 tmp[0].reset(SkRef(&obj0)); in test_autostarray()
62 tmp[1].reset(SkRef(&obj1)); in test_autostarray()
66 // test out reset with data in the array (and a new allocation) in test_autostarray()
67 tmp.reset(0); in test_autostarray()
72 tmp.reset(2); // this should use the preexisting allocation in test_autostarray()
74 tmp[0].reset(SkRef(&obj0)); in test_autostarray()
75 tmp[1].reset(SkRef(&obj1)); in test_autostarray()
87 tmp[0].reset(SkRef(&obj0)); in test_autostarray()
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/external/skia/tests/
DUtilsTest.cpp58 tmp.reset(0); // test out reset(0) when already at 0 in test_autostarray()
59 tmp.reset(4); // this should force a new allocation in test_autostarray()
61 tmp[0].reset(SkRef(&obj0)); in test_autostarray()
62 tmp[1].reset(SkRef(&obj1)); in test_autostarray()
66 // test out reset with data in the array (and a new allocation) in test_autostarray()
67 tmp.reset(0); in test_autostarray()
72 tmp.reset(2); // this should use the preexisting allocation in test_autostarray()
74 tmp[0].reset(SkRef(&obj0)); in test_autostarray()
75 tmp[1].reset(SkRef(&obj1)); in test_autostarray()
87 tmp[0].reset(SkRef(&obj0)); in test_autostarray()
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/external/autotest/server/site_tests/firmware_Cr50OpenWhileAPOff/
Dfirmware_Cr50OpenWhileAPOff.py52 # Asserting warm_reset will hold the AP in reset if the system uses
54 # hold the EC in reset to guarantee the device won't turn on during
60 logging.info('Using %r for reset', self.reset_signal)
64 self.cr50.send_command('ccd reset')
80 # We can't hold the ec in reset and enter deep sleep. Set the
82 logging.info("deep sleep doesn't work with EC in reset. skipping "
102 """Turn on the device and reset cr50
104 Do a deep sleep reset to fix the cr50 console. Then turn the device on.
111 # The console may be hung. Run through reset manually, so we dont need
132 If we are testing ccd open fully, it will also assert device reset so
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/external/u-boot/board/toradex/colibri_imx6/
Dpf0100_otp.inc72 {pmic_i2c, 0xF1, 0x00}, // Reset Bank 1 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
73 {pmic_i2c, 0xF2, 0x00}, // Reset Bank 2 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
74 {pmic_i2c, 0xF3, 0x00}, // Reset Bank 3 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
75 {pmic_i2c, 0xF4, 0x00}, // Reset Bank 4 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
76 {pmic_i2c, 0xF5, 0x00}, // Reset Bank 5 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
77 {pmic_i2c, 0xF6, 0x00}, // Reset Bank 6 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
78 {pmic_i2c, 0xF7, 0x00}, // Reset Bank 7 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
79 {pmic_i2c, 0xF8, 0x00}, // Reset Bank 8 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
80 {pmic_i2c, 0xF9, 0x00}, // Reset Bank 9 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
81 {pmic_i2c, 0xFA, 0x00}, // Reset Bank 10 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
[all …]
/external/u-boot/board/toradex/apalis_imx6/
Dpf0100_otp.inc74 {pmic_i2c, 0xF1, 0x00}, // Reset Bank 1 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
75 {pmic_i2c, 0xF2, 0x00}, // Reset Bank 2 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
76 {pmic_i2c, 0xF3, 0x00}, // Reset Bank 3 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
77 {pmic_i2c, 0xF4, 0x00}, // Reset Bank 4 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
78 {pmic_i2c, 0xF5, 0x00}, // Reset Bank 5 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
79 {pmic_i2c, 0xF6, 0x00}, // Reset Bank 6 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
80 {pmic_i2c, 0xF7, 0x00}, // Reset Bank 7 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
81 {pmic_i2c, 0xF8, 0x00}, // Reset Bank 8 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
82 {pmic_i2c, 0xF9, 0x00}, // Reset Bank 9 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
83 {pmic_i2c, 0xFA, 0x00}, // Reset Bank 10 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
[all …]
/external/u-boot/drivers/sysreset/
DKconfig2 # System reset devices
5 menu "System reset device drivers"
8 bool "Enable support for system reset drivers"
11 Enable system reset drivers which can be used to reset the CPU or
12 board. Each driver can provide a reset method which will be called
13 to effect a reset. The uclass will try all available drivers when
19 bool "Enable support for PSCI System Reset"
32 Reboot support for generic SYSCON mapped register reset.
38 Reboot support for generic watchdog reset.
/external/webrtc/webrtc/modules/video_coding/
Ddecoding_state_unittest.cc24 dec_state.Reset(); in TEST()
46 dec_state.Reset(); in TEST()
52 frame.Reset(); in TEST()
59 frame.Reset(); in TEST()
67 frame.Reset(); in TEST()
71 frame.Reset(); in TEST()
83 dec_state.Reset(); in TEST()
84 frame.Reset(); in TEST()
94 frame.Reset(); in TEST()
105 frame.Reset(); in TEST()
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/external/bcc/tools/
Dreset-trace_example.txt1 Demonstrations of reset-trace, for Linux bcc/BPF.
8 used to clean up the tracing state, and reset and disable active tracing.
16 a note is printed. All tracing files can be reset with -F for force, but this
21 # ./reset-trace.sh
29 # ./reset-trace.sh -v
124 you read this. But right now it's a good example of needing reset-trace.
132 state. Using reset-trace:
134 # ./reset-trace.sh -v
139 Needed to reset /sys/kernel/debug/tracing/uprobe_events
176 # ./reset-trace.sh
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/external/u-boot/arch/arm/include/asm/arch-aspeed/
Dwdt.h26 /* Values for Reset Mode */
32 /* Reset Mask register */
75 * gets Reset Mode value from it.
78 * @return Reset Mode value
84 * gets Reset Mask value from it. Reset Mask is only supported on ast2500
87 * @return Reset Mask value
92 * Given Reset Mask and Reset Mode values, converts them to flags,
95 * On ast2500 Reset Mask is 25 bits wide and Reset Mode is 2 bits wide, so they
98 * @reset_mode: Reset Mode
99 * @reset_mask: Reset Mask
/external/deqp/framework/opengl/
DgluStateReset.cpp21 * \brief OpenGL State Reset.
52 TCU_FAIL("Couldn't reset error state"); in resetErrors()
62 // Reset error state in resetStateES()
93 GLU_EXPECT_NO_ERROR(gl.getError(), "Vertex attrib array state reset failed"); in resetStateES()
106 GLU_EXPECT_NO_ERROR(gl.getError(), "Transformation state reset failed"); in resetStateES()
121 GLU_EXPECT_NO_ERROR(gl.getError(), "Rasterization state reset failed"); in resetStateES()
141 GLU_EXPECT_NO_ERROR(gl.getError(), "Multisampling state reset failed"); in resetStateES()
145 // \todo [2013-04-08 pyry] Reset all levels? in resetStateES()
157 // Reset 2D texture. in resetStateES()
185 // Reset cube map texture. in resetStateES()
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