1 //===-- ARMBaseInfo.cpp - ARM Base encoding information------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file provides basic encoding and assembly information for ARM.
11 //
12 //===----------------------------------------------------------------------===//
13 #include "ARMBaseInfo.h"
14 #include "llvm/ADT/ArrayRef.h"
15 #include "llvm/ADT/SmallVector.h"
16 
17 using namespace llvm;
18 namespace llvm {
19 namespace ARMSysReg {
20 
21 // lookup system register using 12-bit SYSm value.
22 // Note: the search is uniqued using M1 mask
lookupMClassSysRegBy12bitSYSmValue(unsigned SYSm)23 const MClassSysReg *lookupMClassSysRegBy12bitSYSmValue(unsigned SYSm) {
24   return lookupMClassSysRegByM1Encoding12(SYSm);
25 }
26 
27 // returns APSR with _<bits> qualifier.
28 // Note: ARMv7-M deprecates using MSR APSR without a _<bits> qualifier
lookupMClassSysRegAPSRNonDeprecated(unsigned SYSm)29 const MClassSysReg *lookupMClassSysRegAPSRNonDeprecated(unsigned SYSm) {
30   return lookupMClassSysRegByM2M3Encoding8((1<<9)|(SYSm & 0xFF));
31 }
32 
33 // lookup system registers using 8-bit SYSm value
lookupMClassSysRegBy8bitSYSmValue(unsigned SYSm)34 const MClassSysReg *lookupMClassSysRegBy8bitSYSmValue(unsigned SYSm) {
35   return ARMSysReg::lookupMClassSysRegByM2M3Encoding8((1<<8)|(SYSm & 0xFF));
36 }
37 
38 #define GET_MCLASSSYSREG_IMPL
39 #include "ARMGenSystemRegister.inc"
40 
41 } // end namespace ARMSysReg
42 
43 namespace ARMBankedReg {
44 #define GET_BANKEDREG_IMPL
45 #include "ARMGenSystemRegister.inc"
46 } // end namespce ARMSysReg
47 } // end namespace llvm
48