1 /*
2 * Copyright (C) 2004-2010 NXP Software
3 * Copyright (C) 2010 The Android Open Source Project
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at
8 *
9 * http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 */
17
18 /*-------------------------------------------------------------------------*/
19 #include "BIQUAD.h"
20 #include "BP_1I_D16F32Cll_TRC_WRA_01_Private.h"
21
22
23 /*-------------------------------------------------------------------------*/
24 /* FUNCTION: */
25 /* BP_1I_D16F32Cll_TRC_WRA_01_Init */
26 /* */
27 /* DESCRIPTION: */
28 /* These functions initializes a Band pass filter (BIQUAD) */
29 /* biquadratic Filter Sections. */
30 /* */
31 /* PARAMETERS: */
32 /* pInstance - output, returns the pointer to the State Variable */
33 /* This state pointer must be passed to any subsequent */
34 /* call to "Biquad" functions. */
35 /* pTaps - input, pointer to the taps memory */
36 /* pCoef - input, pointer to the coefficient structure */
37 /* N - M coefficient factor of QM.N */
38 /* */
39 /* The coefficients are modified in the init() function such that lower */
40 /* half word is right shifted by one and most significant bit of the lower */
41 /* word is made to be zero. */
42 /* */
43 /* Reason: For MIPS effciency,we are using DSP 32*16 multiplication */
44 /* instruction. But we have 32*32 multiplication. This can be realized by two 32*16 */
45 /* multiplication. But 16th bit in the 32 bit word is not a sign bit. So this is done */
46 /* by putting 16th bit to zero and lossing one bit precision by division of lower */
47 /* half word by 2. */
48 /* RETURNS: */
49 /* void return code */
50 /*-------------------------------------------------------------------------*/
51 #ifdef BUILD_FLOAT
BP_1I_D16F32Cll_TRC_WRA_01_Init(Biquad_FLOAT_Instance_t * pInstance,Biquad_1I_Order2_FLOAT_Taps_t * pTaps,BP_FLOAT_Coefs_t * pCoef)52 void BP_1I_D16F32Cll_TRC_WRA_01_Init ( Biquad_FLOAT_Instance_t *pInstance,
53 Biquad_1I_Order2_FLOAT_Taps_t *pTaps,
54 BP_FLOAT_Coefs_t *pCoef)
55 {
56 PFilter_State_FLOAT pBiquadState = (PFilter_State_FLOAT) pInstance;
57 pBiquadState->pDelays =(LVM_FLOAT *) pTaps;
58
59
60 pBiquadState->coefs[0] = pCoef->A0;
61 pBiquadState->coefs[1] = pCoef->B2;
62 pBiquadState->coefs[2] = pCoef->B1;
63 }
64 #else
BP_1I_D16F32Cll_TRC_WRA_01_Init(Biquad_Instance_t * pInstance,Biquad_1I_Order2_Taps_t * pTaps,BP_C32_Coefs_t * pCoef)65 void BP_1I_D16F32Cll_TRC_WRA_01_Init ( Biquad_Instance_t *pInstance,
66 Biquad_1I_Order2_Taps_t *pTaps,
67 BP_C32_Coefs_t *pCoef)
68 {
69 PFilter_State pBiquadState = (PFilter_State) pInstance;
70 pBiquadState->pDelays =(LVM_INT32 *) pTaps;
71
72 pBiquadState->coefs[0] = pCoef->A0;
73 pBiquadState->coefs[1] = pCoef->B2;
74 pBiquadState->coefs[2] = pCoef->B1;
75 }
76 #endif
77 /*-------------------------------------------------------------------------*/
78 /* End Of File: BP_1I_D16F32Cll_TRC_WRA_01_Init.c */
79
80