1//===- subzero/src/IceClFlags.def - Cl Flags for translation ----*- C++ -*-===// 2// 3// The Subzero Code Generator 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9/// 10/// \file 11/// \brief Declares the command line flags used by Subzero. 12/// 13//===----------------------------------------------------------------------===// 14 15#ifndef SUBZERO_SRC_ICECLFLAGS_DEF 16#define SUBZERO_SRC_ICECLFLAGS_DEF 17 18namespace Ice { 19// cl_detail defines tags (i.e., structs) for specifying the type of a flag 20// (either single-, or multi-value), and whether or not the flag is available in 21// non-LLVM_CL build. 22namespace cl_detail { 23 24// Single-value flag, available in a non-LLVM_CL build. 25struct release_opt_flag {}; 26// Single-value flag, not available in a non-LLVM_CL build. 27struct dev_opt_flag {}; 28// Multi-value flag, not available in a non-LLVM_CL build. 29struct dev_list_flag {}; 30 31} // end of namespace detail 32 33#define COMMAND_LINE_FLAGS \ 34 /* Name, Type, ClType, <<flag declaration ctor arguments>> */ \ 35 X(IRFilename, std::string, release_opt_flag, cl::Positional, \ 36 cl::desc("IR File"), cl::init("-")) \ 37 \ 38 X(NumTranslationThreads, uint32_t, release_opt_flag, "threads", \ 39 cl::desc("Number of translation threads (0 for purely sequential)"), \ 40 cl::init(2)) \ 41 \ 42 X(OptLevel, Ice::OptLevel, release_opt_flag, cl::desc("Optimization level"), \ 43 cl::init(Ice::Opt_m1), cl::value_desc("level"), \ 44 cl::values(clEnumValN(Ice::Opt_m1, "Om1", "-1"), \ 45 clEnumValN(Ice::Opt_m1, "O-1", "-1"), \ 46 clEnumValN(Ice::Opt_0, "O0", "0"), \ 47 clEnumValN(Ice::Opt_1, "O1", "1"), \ 48 clEnumValN(Ice::Opt_2, "O2", "2") CLENUMVALEND)) \ 49 \ 50 X(OutputFilename, std::string, release_opt_flag, "o", \ 51 cl::desc("Override output filename"), cl::init("-"), \ 52 cl::value_desc("filename")) \ 53 \ 54 X(TargetArch, Ice::TargetArch, release_opt_flag, "target", \ 55 cl::desc("Target architecture:"), cl::init(Ice::Target_X8632), \ 56 cl::values( \ 57 clEnumValN(Ice::Target_X8632, "x8632", "x86-32"), \ 58 clEnumValN(Ice::Target_X8632, "x86-32", "x86-32 (same as x8632)"), \ 59 clEnumValN(Ice::Target_X8632, "x86_32", "x86-32 (same as x8632)"), \ 60 clEnumValN(Ice::Target_X8664, "x8664", "x86-64"), \ 61 clEnumValN(Ice::Target_X8664, "x86-64", "x86-64 (same as x8664)"), \ 62 clEnumValN(Ice::Target_X8664, "x86_64", "x86-64 (same as x8664)"), \ 63 clEnumValN(Ice::Target_ARM32, "arm", "arm32"), \ 64 clEnumValN(Ice::Target_ARM32, "arm32", "arm32 (same as arm)"), \ 65 clEnumValN(Ice::Target_ARM64, "arm64", "arm64"), \ 66 clEnumValN(Ice::Target_MIPS32, "mips", "mips32"), \ 67 clEnumValN(Ice::Target_MIPS32, "mips32", "mips32 (same as mips)") \ 68 CLENUMVALEND)) \ 69 \ 70 /* The following are development flags, and ideally should not appear in a \ 71 * release build. */ \ 72 \ 73 X(AllowErrorRecovery, bool, dev_opt_flag, \ 74 "allow-pnacl-reader-error-recovery", \ 75 cl::desc("Allow error recovery when reading PNaCl bitcode."), \ 76 cl::init(false)) \ 77 \ 78 X(AllowExternDefinedSymbols, bool, dev_opt_flag, \ 79 "allow-externally-defined-symbols", \ 80 cl::desc( \ 81 "Allow global symbols to be externally defined (other than _start " \ 82 "and __pnacl_pso_root)."), \ 83 cl::init(false)) \ 84 \ 85 X(AllowIacaMarks, bool, dev_opt_flag, "allow-iaca-marks", \ 86 cl::desc("Allow IACA (Intel Architecture Code Analyzer) marks to be " \ 87 "inserted. These binaries are not executable."), \ 88 cl::init(false)) \ 89 \ 90 X(AllowUninitializedGlobals, bool, dev_opt_flag, \ 91 "allow-uninitialized-globals", \ 92 cl::desc("Allow global variables to be uninitialized")) \ 93 \ 94 X(AlwaysExitSuccess, bool, dev_opt_flag, "exit-success", \ 95 cl::desc("Exit with success status, even if errors found"), \ 96 cl::init(false)) \ 97 \ 98 X(AggressiveLea, bool, dev_opt_flag, "aggressive-lea", \ 99 cl::desc("Convert additions to lea when it reduces code size"), \ 100 cl::init(false)) \ 101 \ 102 X(BitcodeAsText, bool, dev_opt_flag, "bitcode-as-text", \ 103 cl::desc("Accept textual form of PNaCl bitcode " \ 104 "records (i.e. not .ll assembly)"), \ 105 cl::init(false)) \ 106 \ 107 X(BuildOnRead, bool, dev_opt_flag, "build-on-read", \ 108 cl::desc("Build ICE instructions when reading bitcode"), cl::init(true)) \ 109 \ 110 X(DataSections, bool, dev_opt_flag, "fdata-sections", \ 111 cl::desc("Emit (global) data into separate sections")) \ 112 \ 113 X(DecorateAsm, bool, dev_opt_flag, "asm-verbose", \ 114 cl::desc("Decorate textual asm output with register liveness info")) \ 115 \ 116 X(DefaultFunctionPrefix, std::string, dev_opt_flag, \ 117 "default-function-prefix", \ 118 cl::desc("Define default function prefix for naming unnamed functions"), \ 119 cl::init("Function")) \ 120 \ 121 X(DefaultGlobalPrefix, std::string, dev_opt_flag, "default-global-prefix", \ 122 cl::desc("Define default global prefix for naming unnamed globals"), \ 123 cl::init("Global")) \ 124 \ 125 X(DisableHybridAssembly, bool, dev_opt_flag, "no-hybrid-asm", \ 126 cl::desc("Disable hybrid assembly when -filetype=iasm"), cl::init(false)) \ 127 \ 128 X(DisableInternal, bool, dev_opt_flag, "externalize", \ 129 cl::desc("Externalize all symbols")) \ 130 \ 131 X(DisableTranslation, bool, dev_opt_flag, "notranslate", \ 132 cl::desc("Disable Subzero translation")) \ 133 \ 134 X(DumpStats, bool, dev_opt_flag, "szstats", \ 135 cl::desc("Print statistics after translating each function")) \ 136 \ 137 X(DumpStrings, bool, dev_opt_flag, \ 138 "dump-strings", \ 139 cl::desc("Dump string pools during compilation"), \ 140 cl::init(false)) \ 141 \ 142 X(EnableBlockProfile, bool, dev_opt_flag, "enable-block-profile", \ 143 cl::desc("Instrument basic blocks, and output profiling " \ 144 "information to stdout at the end of program execution."), \ 145 cl::init(false)) \ 146 \ 147 X(LocalCSE, Ice::LCSEOptions, dev_opt_flag, "lcse", \ 148 cl::desc("Local common subexpression elimination"), \ 149 cl::init(Ice::LCSE_EnabledSSA), \ 150 cl::values( \ 151 clEnumValN(Ice::LCSE_Disabled, "0", "disabled"), \ 152 clEnumValN(Ice::LCSE_EnabledSSA, "enabled", "assume-ssa"), \ 153 clEnumValN(Ice::LCSE_EnabledNoSSA, "no-ssa", "no-assume-ssa") \ 154 CLENUMVALEND)) \ 155 \ 156 X(EmitRevision, bool, dev_opt_flag, "emit-revision", \ 157 cl::desc("Emit Subzero revision string into the output"), cl::init(true)) \ 158 \ 159 X(EnablePhiEdgeSplit, bool, dev_opt_flag, "phi-edge-split", \ 160 cl::desc("Enable edge splitting for Phi lowering"), cl::init(true)) \ 161 \ 162 X(EnableShortCircuit, bool, dev_opt_flag, "enable-sc", \ 163 cl::desc("Split Nodes for short circuit evaluation"), cl::init(false)) \ 164 \ 165 X(ExcludedRegisters, std::string, dev_list_flag, "reg-exclude", \ 166 cl::CommaSeparated, cl::desc("Don't use specified registers")) \ 167 \ 168 X(ForceMemIntrinOpt, bool, dev_opt_flag, "fmem-intrin-opt", \ 169 cl::desc("Force optimization of memory intrinsics.")) \ 170 \ 171 X(ForceO2String, std::string, dev_opt_flag, "force-O2", \ 172 cl::desc("Force -O2 for certain functions (assumes -Om1)"), cl::init("")) \ 173 \ 174 X(SplitInstString, std::string, dev_opt_flag, "split-inst", \ 175 cl::desc("Restrict local var splitting to specific insts"), cl::init(":")) \ 176 \ 177 X(FunctionSections, bool, dev_opt_flag, "ffunction-sections", \ 178 cl::desc("Emit functions into separate sections")) \ 179 \ 180 X(GenerateBuildAtts, bool, release_opt_flag, "build-atts", \ 181 cl::desc("Generate list of build attributes associated with " \ 182 "this executable."), \ 183 cl::init(false)) \ 184 \ 185 X(SplitGlobalVars, bool, dev_opt_flag, "split-global-vars", \ 186 cl::desc("Global live range splitting"), \ 187 cl::init(false)) \ 188 \ 189 X(InputFileFormat, llvm::NaClFileFormat, dev_opt_flag, "bitcode-format", \ 190 cl::desc("Define format of input file:"), \ 191 cl::values(clEnumValN(llvm::LLVMFormat, "llvm", "LLVM file (default)"), \ 192 clEnumValN(llvm::PNaClFormat, "pnacl", "PNaCl bitcode file") \ 193 CLENUMVALEND), \ 194 cl::init(llvm::LLVMFormat)) \ 195 \ 196 X(KeepDeletedInsts, bool, dev_opt_flag, "keep-deleted-insts", \ 197 cl::desc("Retain deleted instructions in the Cfg"), \ 198 cl::init(Ice::BuildDefs::dump())) \ 199 \ 200 X(LLVMVerboseErrors, bool, dev_opt_flag, "verbose-llvm-parse-errors", \ 201 cl::desc("Print out more descriptive PNaCl bitcode parse errors when " \ 202 "building LLVM IR first"), \ 203 cl::init(false)) \ 204 \ 205 X(LocalCseMaxIterations, uint32_t, dev_opt_flag, "lcse-max-iters", \ 206 cl::desc("Number of times local-cse is run on a block"), cl::init(1)) \ 207 \ 208 X(LoopInvariantCodeMotion, bool, dev_opt_flag, "licm", \ 209 cl::desc("Hoist loop invariant arithmetic operations"), cl::init(false)) \ 210 \ 211 X(LogFilename, std::string, dev_opt_flag, "log", \ 212 cl::desc("Set log filename"), cl::init("-"), cl::value_desc("filename")) \ 213 \ 214 X(MaxNopsPerInstruction, int, dev_opt_flag, "max-nops-per-instruction", \ 215 cl::desc("Max number of nops to insert per instruction"), cl::init(1)) \ 216 \ 217 X(MockBoundsCheck, bool, dev_opt_flag, "mock-bounds-check", \ 218 cl::desc("Mock bounds checking on loads/stores")) \ 219 \ 220 X(NopProbabilityAsPercentage, int, dev_opt_flag, "nop-insertion-percentage", \ 221 cl::desc("Nop insertion probability as percentage"), cl::init(10)) \ 222 \ 223 X(OutFileType, Ice::FileType, dev_opt_flag, "filetype", \ 224 cl::desc("Output file type"), cl::init(Ice::FT_Iasm), \ 225 cl::values( \ 226 clEnumValN(Ice::FT_Elf, "obj", "Native ELF object ('.o') file"), \ 227 clEnumValN(Ice::FT_Asm, "asm", "Assembly ('.s') file"), \ 228 clEnumValN(Ice::FT_Iasm, "iasm", \ 229 "Low-level integrated assembly ('.s') file") \ 230 CLENUMVALEND)) \ 231 \ 232 X(ApplicationBinaryInterface, Ice::ABI, dev_opt_flag, "abi", \ 233 cl::desc("ABI type"), cl::init(Ice::ABI_PNaCl), \ 234 cl::values( \ 235 clEnumValN(Ice::ABI_PNaCl, "pnacl", "x32 for unsandboxed 64-bit x86"), \ 236 clEnumValN(Ice::ABI_Platform, "platform", "Native executable ABI") \ 237 CLENUMVALEND)) \ 238 \ 239 X(ParseParallel, bool, dev_opt_flag, "parse-parallel", \ 240 cl::desc("Parse function blocks in parallel"), cl::init(true)) \ 241 \ 242 X(RandomizeAndPoolImmediatesOption, Ice::RandomizeAndPoolImmediatesEnum, \ 243 dev_opt_flag, "randomize-pool-immediates", \ 244 cl::desc("Randomize or pooling the representation of immediates"), \ 245 cl::init(Ice::RPI_None), \ 246 cl::values(clEnumValN(Ice::RPI_None, "none", \ 247 "Do not randomize or pooling immediates (default)"), \ 248 clEnumValN(Ice::RPI_Randomize, "randomize", \ 249 "Turn on immediate constants blinding"), \ 250 clEnumValN(Ice::RPI_Pool, "pool", \ 251 "Turn on immediate constants pooling") \ 252 CLENUMVALEND)) \ 253 \ 254 X(RandomizeAndPoolImmediatesThreshold, uint32_t, dev_opt_flag, \ 255 "randomize-pool-threshold", \ 256 cl::desc("The threshold for immediates randomization and pooling"), \ 257 cl::init(0xffff)) \ 258 \ 259 X(RandomizeRegisterAllocation, bool, dev_opt_flag, "randomize-regalloc", \ 260 cl::desc("Randomize register allocation"), cl::init(false)) \ 261 \ 262 X(SplitLocalVars, bool, dev_opt_flag, "split-local-vars", cl::init(true), \ 263 cl::desc("Block-local variable splitting (O2 only)")) \ 264 \ 265 X(RandomSeed, unsigned long long, dev_opt_flag, "sz-seed", \ 266 cl::desc("Seed the random number generator"), cl::init(1)) \ 267 \ 268 X(RegAllocReserve, bool, dev_opt_flag, "reg-reserve", \ 269 cl::desc("Let register allocation use reserve registers"), \ 270 cl::init(false)) \ 271 \ 272 X(ReorderBasicBlocks, bool, dev_opt_flag, "reorder-basic-blocks", \ 273 cl::desc("Shuffle the layout of basic blocks in each function"), \ 274 cl::init(false)) \ 275 \ 276 X(ReorderFunctions, bool, dev_opt_flag, "reorder-functions", \ 277 cl::desc("Randomize function ordering"), cl::init(false)) \ 278 \ 279 X(ReorderFunctionsWindowSize, uint32_t, dev_opt_flag, \ 280 "reorder-functions-window-size", \ 281 cl::desc( \ 282 "The shuffling window size for function reordering. 1 or 0 means " \ 283 "no effective shuffling."), \ 284 cl::init(8)) \ 285 \ 286 X(ReorderGlobalVariables, bool, dev_opt_flag, "reorder-global-variables", \ 287 cl::desc("Randomize global data ordering"), cl::init(false)) \ 288 \ 289 X(ReorderPooledConstants, bool, dev_opt_flag, "reorder-pooled-constants", \ 290 cl::desc("Randomize constant pool entry ordering"), cl::init(false)) \ 291 \ 292 X(RepeatRegAlloc, bool, dev_opt_flag, "regalloc-repeat", \ 293 cl::desc("Repeat register allocation until convergence"), cl::init(true)) \ 294 \ 295 /* TODO(tlively): Generalize this to handle more sanitizers */ \ 296 X(SanitizeAddresses, bool, dev_opt_flag, "fsanitize-address", \ 297 cl::desc("Instrument compiled code with Address Sanitizer"), \ 298 cl::init(false)) \ 299 \ 300 X(ShouldDoNopInsertion, bool, dev_opt_flag, "nop-insertion", \ 301 cl::desc("Randomly insert NOPs"), cl::init(false)) \ 302 \ 303 X(SkipUnimplemented, bool, dev_opt_flag, "skip-unimplemented", \ 304 cl::desc("Skip through unimplemented lowering code instead of aborting."), \ 305 cl::init(false)) \ 306 \ 307 X(SubzeroTimingEnabled, bool, dev_opt_flag, "timing", \ 308 cl::desc("Enable breakdown timing of Subzero translation")) \ 309 \ 310 X(TargetInstructionSet, Ice::TargetInstructionSet, dev_opt_flag, "mattr", \ 311 cl::desc("Target architecture attributes"), \ 312 cl::init(Ice::BaseInstructionSet), \ 313 cl::values( \ 314 clEnumValN(Ice::BaseInstructionSet, "base", \ 315 "Target chooses baseline instruction set (default)"), \ 316 clEnumValN(Ice::X86InstructionSet_SSE2, "sse2", \ 317 "Enable X86 SSE2 instructions"), \ 318 clEnumValN(Ice::X86InstructionSet_SSE4_1, "sse4.1", \ 319 "Enable X86 SSE 4.1 instructions"), \ 320 clEnumValN(Ice::ARM32InstructionSet_Neon, "neon", \ 321 "Enable ARM Neon instructions"), \ 322 clEnumValN(Ice::ARM32InstructionSet_HWDivArm, "hwdiv-arm", \ 323 "Enable ARM integer divide instructions in ARM mode") \ 324 CLENUMVALEND)) \ 325 \ 326 X(TestPrefix, std::string, dev_opt_flag, "prefix", \ 327 cl::desc("Prepend a prefix to symbol names for testing"), cl::init(""), \ 328 cl::value_desc("prefix")) \ 329 \ 330 X(TestStackExtra, uint32_t, dev_opt_flag, "test-stack-extra", \ 331 cl::desc("Extra amount of stack to add to the " \ 332 "frame in bytes (for testing)."), \ 333 cl::init(0)) \ 334 \ 335 X(TestStatusString, std::string, dev_opt_flag, "test-status", \ 336 cl::desc("Testing flag for -verbose=status"), cl::init(":")) \ 337 \ 338 X(TimeEachFunction, bool, dev_opt_flag, "timing-funcs", \ 339 cl::desc("Print total translation time for each function")) \ 340 \ 341 X(TimingFocusOnString, std::string, dev_opt_flag, "timing-focus", \ 342 cl::desc("Break down timing for specific functions (use ':' for all)"), \ 343 cl::init("")) \ 344 \ 345 X(TranslateOnlyString, std::string, dev_opt_flag, "translate-only", \ 346 cl::desc("Translate only the given functions"), cl::init(":")) \ 347 \ 348 X(UseNonsfi, bool, dev_opt_flag, "nonsfi", cl::desc("Enable Non-SFI mode")) \ 349 \ 350 X(UseRestrictedRegisters, std::string, dev_list_flag, "reg-use", \ 351 cl::CommaSeparated, \ 352 cl::desc("Only use specified registers for corresponding register " \ 353 "classes")) \ 354 \ 355 X(UseSandboxing, bool, dev_opt_flag, "sandbox", cl::desc("Use sandboxing")) \ 356 \ 357 X(Verbose, Ice::VerboseItem, dev_list_flag, "verbose", cl::CommaSeparated, \ 358 cl::desc("Verbose options (can be comma-separated):"), \ 359 cl::values( \ 360 clEnumValN(Ice::IceV_Instructions, "inst", \ 361 "Print basic instructions"), \ 362 clEnumValN(Ice::IceV_Deleted, "del", "Include deleted instructions"), \ 363 clEnumValN(Ice::IceV_InstNumbers, "instnum", \ 364 "Print instruction numbers"), \ 365 clEnumValN(Ice::IceV_Preds, "pred", "Show predecessors"), \ 366 clEnumValN(Ice::IceV_Succs, "succ", "Show successors"), \ 367 clEnumValN(Ice::IceV_Liveness, "live", "Liveness information"), \ 368 clEnumValN(Ice::IceV_RegOrigins, "orig", "Physical register origins"), \ 369 clEnumValN(Ice::IceV_LinearScan, "regalloc", "Linear scan details"), \ 370 clEnumValN(Ice::IceV_Frame, "frame", "Stack frame layout details"), \ 371 clEnumValN(Ice::IceV_AddrOpt, "addropt", "Address mode optimization"), \ 372 clEnumValN(Ice::IceV_Random, "random", "Randomization details"), \ 373 clEnumValN(Ice::IceV_Folding, "fold", "Instruction folding details"), \ 374 clEnumValN(Ice::IceV_RMW, "rmw", "ReadModifyWrite optimization"), \ 375 clEnumValN(Ice::IceV_Loop, "loop", "Loop nest depth analysis"), \ 376 clEnumValN(Ice::IceV_Mem, "mem", "Memory usage details"), \ 377 clEnumValN(Ice::IceV_ShufMat, "shufvec", \ 378 "Shufflevector rematerialization"), \ 379 clEnumValN(Ice::IceV_Status, "status", \ 380 "Print the name of the function being translated"), \ 381 clEnumValN(Ice::IceV_AvailableRegs, "registers", \ 382 "Show available registers for register allocation"), \ 383 clEnumValN(Ice::IceV_GlobalInit, "global_init", \ 384 "Global initializers"), \ 385 clEnumValN(Ice::IceV_ConstPoolStats, "cpool", \ 386 "Constant pool counters"), \ 387 clEnumValN(Ice::IceV_Wasm, "wasm", "WebAssembly builder"), \ 388 clEnumValN(Ice::IceV_All, "all", "Use all verbose options"), \ 389 clEnumValN(Ice::IceV_Most, "most", \ 390 "Use all verbose options except 'regalloc,global_init'"), \ 391 clEnumValN(Ice::IceV_None, "none", "No verbosity") CLENUMVALEND)) \ 392 \ 393 X(VerboseFocusOnString, std::string, dev_opt_flag, "verbose-focus", \ 394 cl::desc("Override with -verbose=none except for specified functions"), \ 395 cl::init(":")) \ 396 \ 397 X(WasmBoundsCheck, bool, dev_opt_flag, "wasm-bounds-check", \ 398 cl::desc("Add bounds checking code in WASM frontend"), \ 399 cl::init(true)) 400 401//#define X(Name, Type, ClType, ...) 402 403} // end of namespace Ice 404 405#endif // SUBZERO_SRC_ICECLFLAGS_DEF 406