1//-- SystemZScheduleZ13.td - SystemZ Scheduling Definitions ----*- tblgen -*-=//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file defines the machine model for Z13 to support instruction
11// scheduling and other instruction cost heuristics.
12//
13// Pseudos expanded right after isel do not need to be modelled here.
14//
15//===----------------------------------------------------------------------===//
16
17def Z13Model : SchedMachineModel {
18
19    let UnsupportedFeatures = Arch11UnsupportedFeatures.List;
20
21    let IssueWidth = 6;             // Number of instructions decoded per cycle.
22    let MicroOpBufferSize = 60;     // Issue queues
23    let LoadLatency = 1;            // Optimistic load latency.
24
25    let PostRAScheduler = 1;
26
27    // Extra cycles for a mispredicted branch.
28    let MispredictPenalty = 20;
29}
30
31let SchedModel = Z13Model in  {
32// These definitions need the SchedModel value. They could be put in a
33// subtarget common include file, but it seems the include system in Tablegen
34// currently (2016) rejects multiple includes of same file.
35
36// Decoder grouping rules
37let NumMicroOps = 1 in {
38  def : WriteRes<NormalGr, []>;
39  def : WriteRes<BeginGroup, []> { let BeginGroup  = 1; }
40  def : WriteRes<EndGroup, []>   { let EndGroup    = 1; }
41}
42def : WriteRes<Cracked, []> {
43  let NumMicroOps = 2;
44  let BeginGroup  = 1;
45}
46def : WriteRes<GroupAlone, []> {
47  let NumMicroOps = 3;
48  let BeginGroup  = 1;
49  let EndGroup    = 1;
50}
51
52// Incoming latency removed from the register operand which is used together
53// with a memory operand by the instruction.
54def : ReadAdvance<RegReadAdv, 4>;
55
56// LoadLatency (above) is not used for instructions in this file. This is
57// instead the role of LSULatency, which is the latency value added to the
58// result of loads and instructions with folded memory operands.
59def : WriteRes<LSULatency, []> { let Latency = 4; let NumMicroOps = 0; }
60
61let NumMicroOps = 0 in {
62  foreach L = 1-30 in
63    def : WriteRes<!cast<SchedWrite>("WLat"#L), []> { let Latency = L; }
64}
65
66// Execution units.
67def Z13_FXaUnit     : ProcResource<2>;
68def Z13_FXbUnit     : ProcResource<2>;
69def Z13_LSUnit      : ProcResource<2>;
70def Z13_VecUnit     : ProcResource<2>;
71def Z13_VecFPdUnit  : ProcResource<2> { let BufferSize = 1; /* blocking */ }
72def Z13_VBUnit      : ProcResource<2>;
73def Z13_MCD         : ProcResource<1>;
74
75// Subtarget specific definitions of scheduling resources.
76let NumMicroOps = 0 in {
77  def : WriteRes<FXa, [Z13_FXaUnit]>;
78  def : WriteRes<FXb, [Z13_FXbUnit]>;
79  def : WriteRes<LSU, [Z13_LSUnit]>;
80  def : WriteRes<VecBF,  [Z13_VecUnit]>;
81  def : WriteRes<VecDF,  [Z13_VecUnit]>;
82  def : WriteRes<VecDFX, [Z13_VecUnit]>;
83  def : WriteRes<VecMul,  [Z13_VecUnit]>;
84  def : WriteRes<VecStr,  [Z13_VecUnit]>;
85  def : WriteRes<VecXsPm, [Z13_VecUnit]>;
86  foreach Num = 2-5 in { let ResourceCycles = [Num] in {
87    def : WriteRes<!cast<SchedWrite>("FXa"#Num), [Z13_FXaUnit]>;
88    def : WriteRes<!cast<SchedWrite>("FXb"#Num), [Z13_FXbUnit]>;
89    def : WriteRes<!cast<SchedWrite>("LSU"#Num), [Z13_LSUnit]>;
90    def : WriteRes<!cast<SchedWrite>("VecBF"#Num), [Z13_VecUnit]>;
91    def : WriteRes<!cast<SchedWrite>("VecDF"#Num), [Z13_VecUnit]>;
92    def : WriteRes<!cast<SchedWrite>("VecDFX"#Num), [Z13_VecUnit]>;
93    def : WriteRes<!cast<SchedWrite>("VecMul"#Num), [Z13_VecUnit]>;
94    def : WriteRes<!cast<SchedWrite>("VecStr"#Num), [Z13_VecUnit]>;
95    def : WriteRes<!cast<SchedWrite>("VecXsPm"#Num), [Z13_VecUnit]>;
96  }}
97
98  def : WriteRes<VecFPd,  [Z13_VecFPdUnit]> { let ResourceCycles = [30]; }
99
100  def : WriteRes<VBU,     [Z13_VBUnit]>; // Virtual Branching Unit
101}
102
103def : WriteRes<MCD, [Z13_MCD]> { let NumMicroOps = 3;
104                                 let BeginGroup  = 1;
105                                 let EndGroup    = 1; }
106
107// -------------------------- INSTRUCTIONS ---------------------------------- //
108
109// InstRW constructs have been used in order to preserve the
110// readability of the InstrInfo files.
111
112// For each instruction, as matched by a regexp, provide a list of
113// resources that it needs. These will be combined into a SchedClass.
114
115//===----------------------------------------------------------------------===//
116// Stack allocation
117//===----------------------------------------------------------------------===//
118
119// Pseudo -> LA / LAY
120def : InstRW<[WLat1, FXa, NormalGr], (instregex "ADJDYNALLOC$")>;
121
122//===----------------------------------------------------------------------===//
123// Branch instructions
124//===----------------------------------------------------------------------===//
125
126// Branch
127def : InstRW<[WLat1, VBU, NormalGr], (instregex "(Call)?BRC(L)?(Asm.*)?$")>;
128def : InstRW<[WLat1, VBU, NormalGr], (instregex "(Call)?J(G)?(Asm.*)?$")>;
129def : InstRW<[WLat1, FXb, NormalGr], (instregex "(Call)?BC(R)?(Asm.*)?$")>;
130def : InstRW<[WLat1, FXb, NormalGr], (instregex "(Call)?B(R)?(Asm.*)?$")>;
131def : InstRW<[WLat1, FXa, EndGroup], (instregex "BRCT(G)?$")>;
132def : InstRW<[WLat1, FXa, FXb, GroupAlone], (instregex "BRCTH$")>;
133def : InstRW<[WLat1, FXa, FXb, GroupAlone], (instregex "BCT(G)?(R)?$")>;
134def : InstRW<[WLat1, FXa2, FXb2, GroupAlone],
135             (instregex "B(R)?X(H|L).*$")>;
136
137// Compare and branch
138def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(L)?(G)?(I|R)J(Asm.*)?$")>;
139def : InstRW<[WLat1, FXb2, GroupAlone],
140             (instregex "C(L)?(G)?(I|R)B(Call|Return|Asm.*)?$")>;
141
142//===----------------------------------------------------------------------===//
143// Trap instructions
144//===----------------------------------------------------------------------===//
145
146// Trap
147def : InstRW<[WLat1, VBU, NormalGr], (instregex "(Cond)?Trap$")>;
148
149// Compare and trap
150def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(G)?(I|R)T(Asm.*)?$")>;
151def : InstRW<[WLat1, FXb, NormalGr], (instregex "CL(G)?RT(Asm.*)?$")>;
152def : InstRW<[WLat1, FXb, NormalGr], (instregex "CL(F|G)IT(Asm.*)?$")>;
153def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "CL(G)?T(Asm.*)?$")>;
154
155//===----------------------------------------------------------------------===//
156// Call and return instructions
157//===----------------------------------------------------------------------===//
158
159// Call
160def : InstRW<[WLat1, VBU, FXa2, GroupAlone], (instregex "(Call)?BRAS$")>;
161def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "(Call)?BRASL$")>;
162def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "(Call)?BAS(R)?$")>;
163def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "TLS_(G|L)DCALL$")>;
164
165// Return
166def : InstRW<[WLat1, FXb, EndGroup], (instregex "Return$")>;
167def : InstRW<[WLat1, FXb, NormalGr], (instregex "CondReturn$")>;
168
169//===----------------------------------------------------------------------===//
170// Move instructions
171//===----------------------------------------------------------------------===//
172
173// Moves
174def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "MV(G|H)?HI$")>;
175def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "MVI(Y)?$")>;
176
177// Move character
178def : InstRW<[WLat1, FXb, LSU3, GroupAlone], (instregex "MVC$")>;
179def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "MVCL(E|U)?$")>;
180
181// Pseudo -> reg move
182def : InstRW<[WLat1, FXa, NormalGr], (instregex "COPY(_TO_REGCLASS)?$")>;
183def : InstRW<[WLat1, FXa, NormalGr], (instregex "EXTRACT_SUBREG$")>;
184def : InstRW<[WLat1, FXa, NormalGr], (instregex "INSERT_SUBREG$")>;
185def : InstRW<[WLat1, FXa, NormalGr], (instregex "REG_SEQUENCE$")>;
186
187// Loads
188def : InstRW<[LSULatency, LSU, NormalGr], (instregex "L(Y|FH|RL|Mux)?$")>;
189def : InstRW<[LSULatency, LSULatency, LSU, NormalGr], (instregex "LCBB$")>;
190def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LG(RL)?$")>;
191def : InstRW<[LSULatency, LSU, NormalGr], (instregex "L128$")>;
192
193def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLIH(F|H|L)$")>;
194def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLIL(F|H|L)$")>;
195
196def : InstRW<[WLat1, FXa, NormalGr], (instregex "LG(F|H)I$")>;
197def : InstRW<[WLat1, FXa, NormalGr], (instregex "LHI(Mux)?$")>;
198def : InstRW<[WLat1, FXa, NormalGr], (instregex "LR(Mux)?$")>;
199
200// Load and zero rightmost byte
201def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LZR(F|G)$")>;
202
203// Load and trap
204def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "L(FH|G)?AT$")>;
205
206// Load and test
207def : InstRW<[WLat1LSU, WLat1LSU, LSU, FXa, NormalGr], (instregex "LT(G)?$")>;
208def : InstRW<[WLat1, FXa, NormalGr], (instregex "LT(G)?R$")>;
209
210// Stores
211def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STG(RL)?$")>;
212def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "ST128$")>;
213def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "ST(Y|FH|RL|Mux)?$")>;
214
215// String moves.
216def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "MVST$")>;
217
218//===----------------------------------------------------------------------===//
219// Conditional move instructions
220//===----------------------------------------------------------------------===//
221
222def : InstRW<[WLat2, FXa, NormalGr], (instregex "LOCRMux$")>;
223def : InstRW<[WLat2, FXa, NormalGr], (instregex "LOC(G|FH)?R(Asm.*)?$")>;
224def : InstRW<[WLat2, FXa, NormalGr], (instregex "LOC(G|H)?HI(Mux|(Asm.*))?$")>;
225def : InstRW<[WLat2LSU, RegReadAdv, FXa, LSU, NormalGr],
226             (instregex "LOC(G|FH|Mux)?(Asm.*)?$")>;
227def : InstRW<[WLat1, FXb, LSU, NormalGr],
228             (instregex "STOC(G|FH|Mux)?(Asm.*)?$")>;
229
230//===----------------------------------------------------------------------===//
231// Sign extensions
232//===----------------------------------------------------------------------===//
233
234def : InstRW<[WLat1, FXa, NormalGr], (instregex "L(B|H|G)R$")>;
235def : InstRW<[WLat1, FXa, NormalGr], (instregex "LG(B|H|F)R$")>;
236
237def : InstRW<[WLat1LSU, WLat1LSU, FXa, LSU, NormalGr], (instregex "LTGF$")>;
238def : InstRW<[WLat1, FXa, NormalGr], (instregex "LTGFR$")>;
239
240def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LB(H|Mux)?$")>;
241def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LH(Y)?$")>;
242def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LH(H|Mux|RL)$")>;
243def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LG(B|H|F)$")>;
244def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LG(H|F)RL$")>;
245
246//===----------------------------------------------------------------------===//
247// Zero extensions
248//===----------------------------------------------------------------------===//
249
250def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLCR(Mux)?$")>;
251def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLHR(Mux)?$")>;
252def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLG(C|H|F|T)R$")>;
253def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLC(Mux)?$")>;
254def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLH(Mux)?$")>;
255def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LL(C|H)H$")>;
256def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLHRL$")>;
257def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLG(C|H|F|T|HRL|FRL)$")>;
258
259// Load and zero rightmost byte
260def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLZRGF$")>;
261
262// Load and trap
263def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "LLG(F|T)?AT$")>;
264
265//===----------------------------------------------------------------------===//
266// Truncations
267//===----------------------------------------------------------------------===//
268
269def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STC(H|Y|Mux)?$")>;
270def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STH(H|Y|RL|Mux)?$")>;
271def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STCM(H|Y)?$")>;
272
273//===----------------------------------------------------------------------===//
274// Multi-register moves
275//===----------------------------------------------------------------------===//
276
277// Load multiple (estimated average of 5 ops)
278def : InstRW<[WLat10, WLat10, LSU5, GroupAlone], (instregex "LM(H|Y|G)?$")>;
279
280// Load multiple disjoint
281def : InstRW<[WLat30, WLat30, MCD], (instregex "LMD$")>;
282
283// Store multiple
284def : InstRW<[WLat1, LSU2, FXb3, GroupAlone], (instregex "STM(G|H|Y)?$")>;
285
286//===----------------------------------------------------------------------===//
287// Byte swaps
288//===----------------------------------------------------------------------===//
289
290def : InstRW<[WLat1, FXa, NormalGr], (instregex "LRV(G)?R$")>;
291def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LRV(G|H)?$")>;
292def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STRV(G|H)?$")>;
293def : InstRW<[WLat30, MCD], (instregex "MVCIN$")>;
294
295//===----------------------------------------------------------------------===//
296// Load address instructions
297//===----------------------------------------------------------------------===//
298
299def : InstRW<[WLat1, FXa, NormalGr], (instregex "LA(Y|RL)?$")>;
300
301// Load the Global Offset Table address ( -> larl )
302def : InstRW<[WLat1, FXa, NormalGr], (instregex "GOT$")>;
303
304//===----------------------------------------------------------------------===//
305// Absolute and Negation
306//===----------------------------------------------------------------------===//
307
308def : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "LP(G)?R$")>;
309def : InstRW<[WLat3, WLat3, FXa2, Cracked], (instregex "L(N|P)GFR$")>;
310def : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "LN(R|GR)$")>;
311def : InstRW<[WLat1, FXa, NormalGr], (instregex "LC(R|GR)$")>;
312def : InstRW<[WLat2, WLat2, FXa2, Cracked], (instregex "LCGFR$")>;
313
314//===----------------------------------------------------------------------===//
315// Insertion
316//===----------------------------------------------------------------------===//
317
318def : InstRW<[WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], (instregex "IC(Y)?$")>;
319def : InstRW<[WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
320             (instregex "IC32(Y)?$")>;
321def : InstRW<[WLat1LSU, RegReadAdv, WLat1LSU, FXa, LSU, NormalGr],
322             (instregex "ICM(H|Y)?$")>;
323def : InstRW<[WLat1, FXa, NormalGr], (instregex "II(F|H|L)Mux$")>;
324def : InstRW<[WLat1, FXa, NormalGr], (instregex "IIHF(64)?$")>;
325def : InstRW<[WLat1, FXa, NormalGr], (instregex "IIHH(64)?$")>;
326def : InstRW<[WLat1, FXa, NormalGr], (instregex "IIHL(64)?$")>;
327def : InstRW<[WLat1, FXa, NormalGr], (instregex "IILF(64)?$")>;
328def : InstRW<[WLat1, FXa, NormalGr], (instregex "IILH(64)?$")>;
329def : InstRW<[WLat1, FXa, NormalGr], (instregex "IILL(64)?$")>;
330
331//===----------------------------------------------------------------------===//
332// Addition
333//===----------------------------------------------------------------------===//
334
335def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
336             (instregex "A(Y)?$")>;
337def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, NormalGr],
338             (instregex "AH(Y)?$")>;
339def : InstRW<[WLat1, FXa, NormalGr], (instregex "AIH$")>;
340def : InstRW<[WLat1, FXa, NormalGr], (instregex "AFI(Mux)?$")>;
341def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
342             (instregex "AG$")>;
343def : InstRW<[WLat1, FXa, NormalGr], (instregex "AGFI$")>;
344def : InstRW<[WLat1, FXa, NormalGr], (instregex "AGHI(K)?$")>;
345def : InstRW<[WLat1, FXa, NormalGr], (instregex "AGR(K)?$")>;
346def : InstRW<[WLat1, FXa, NormalGr], (instregex "AHI(K)?$")>;
347def : InstRW<[WLat1, FXa, NormalGr], (instregex "AHIMux(K)?$")>;
348def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
349             (instregex "AL(Y)?$")>;
350def : InstRW<[WLat1, FXa, NormalGr], (instregex "AL(FI|HSIK)$")>;
351def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
352             (instregex "ALG(F)?$")>;
353def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALGHSIK$")>;
354def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALGF(I|R)$")>;
355def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALGR(K)?$")>;
356def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALR(K)?$")>;
357def : InstRW<[WLat1, FXa, NormalGr], (instregex "AR(K)?$")>;
358def : InstRW<[WLat1, FXa, NormalGr], (instregex "A(L)?HHHR$")>;
359def : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "A(L)?HHLR$")>;
360def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALSIH(N)?$")>;
361def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "A(L)?(G)?SI$")>;
362
363// Logical addition with carry
364def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, GroupAlone],
365             (instregex "ALC(G)?$")>;
366def : InstRW<[WLat2, WLat2, FXa, GroupAlone], (instregex "ALC(G)?R$")>;
367
368// Add with sign extension (32 -> 64)
369def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, NormalGr],
370             (instregex "AGF$")>;
371def : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "AGFR$")>;
372
373//===----------------------------------------------------------------------===//
374// Subtraction
375//===----------------------------------------------------------------------===//
376
377def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
378             (instregex "S(G|Y)?$")>;
379def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, NormalGr],
380             (instregex "SH(Y)?$")>;
381def : InstRW<[WLat1, FXa, NormalGr], (instregex "SGR(K)?$")>;
382def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLFI$")>;
383def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
384             (instregex "SL(G|GF|Y)?$")>;
385def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLGF(I|R)$")>;
386def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLGR(K)?$")>;
387def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLR(K)?$")>;
388def : InstRW<[WLat1, FXa, NormalGr], (instregex "SR(K)?$")>;
389def : InstRW<[WLat1, FXa, NormalGr], (instregex "S(L)?HHHR$")>;
390def : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "S(L)?HHLR$")>;
391
392// Subtraction with borrow
393def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, GroupAlone],
394             (instregex "SLB(G)?$")>;
395def : InstRW<[WLat2, WLat2, FXa, GroupAlone], (instregex "SLB(G)?R$")>;
396
397// Subtraction with sign extension (32 -> 64)
398def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, NormalGr],
399             (instregex "SGF$")>;
400def : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "SGFR$")>;
401
402//===----------------------------------------------------------------------===//
403// AND
404//===----------------------------------------------------------------------===//
405
406def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
407             (instregex "N(G|Y)?$")>;
408def : InstRW<[WLat1, FXa, NormalGr], (instregex "NGR(K)?$")>;
409def : InstRW<[WLat1, FXa, NormalGr], (instregex "NI(FMux|HMux|LMux)$")>;
410def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "NI(Y)?$")>;
411def : InstRW<[WLat1, FXa, NormalGr], (instregex "NIHF(64)?$")>;
412def : InstRW<[WLat1, FXa, NormalGr], (instregex "NIHH(64)?$")>;
413def : InstRW<[WLat1, FXa, NormalGr], (instregex "NIHL(64)?$")>;
414def : InstRW<[WLat1, FXa, NormalGr], (instregex "NILF(64)?$")>;
415def : InstRW<[WLat1, FXa, NormalGr], (instregex "NILH(64)?$")>;
416def : InstRW<[WLat1, FXa, NormalGr], (instregex "NILL(64)?$")>;
417def : InstRW<[WLat1, FXa, NormalGr], (instregex "NR(K)?$")>;
418def : InstRW<[WLat3LSU, LSU2, FXb, Cracked], (instregex "NC$")>;
419
420//===----------------------------------------------------------------------===//
421// OR
422//===----------------------------------------------------------------------===//
423
424def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
425             (instregex "O(G|Y)?$")>;
426def : InstRW<[WLat1, FXa, NormalGr], (instregex "OGR(K)?$")>;
427def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "OI(Y)?$")>;
428def : InstRW<[WLat1, FXa, NormalGr], (instregex "OI(FMux|HMux|LMux)$")>;
429def : InstRW<[WLat1, FXa, NormalGr], (instregex "OIHF(64)?$")>;
430def : InstRW<[WLat1, FXa, NormalGr], (instregex "OIHH(64)?$")>;
431def : InstRW<[WLat1, FXa, NormalGr], (instregex "OIHL(64)?$")>;
432def : InstRW<[WLat1, FXa, NormalGr], (instregex "OILF(64)?$")>;
433def : InstRW<[WLat1, FXa, NormalGr], (instregex "OILH(64)?$")>;
434def : InstRW<[WLat1, FXa, NormalGr], (instregex "OILL(64)?$")>;
435def : InstRW<[WLat1, FXa, NormalGr], (instregex "OR(K)?$")>;
436def : InstRW<[WLat3LSU, LSU2, FXb, Cracked], (instregex "OC$")>;
437
438//===----------------------------------------------------------------------===//
439// XOR
440//===----------------------------------------------------------------------===//
441
442def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
443             (instregex "X(G|Y)?$")>;
444def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "XI(Y)?$")>;
445def : InstRW<[WLat1, FXa, NormalGr], (instregex "XIFMux$")>;
446def : InstRW<[WLat1, FXa, NormalGr], (instregex "XGR(K)?$")>;
447def : InstRW<[WLat1, FXa, NormalGr], (instregex "XIHF(64)?$")>;
448def : InstRW<[WLat1, FXa, NormalGr], (instregex "XILF(64)?$")>;
449def : InstRW<[WLat1, FXa, NormalGr], (instregex "XR(K)?$")>;
450def : InstRW<[WLat3LSU, LSU2, FXb, Cracked], (instregex "XC$")>;
451
452//===----------------------------------------------------------------------===//
453// Multiplication
454//===----------------------------------------------------------------------===//
455
456def : InstRW<[WLat6LSU, RegReadAdv, FXa, LSU, NormalGr],
457             (instregex "MS(GF|Y)?$")>;
458def : InstRW<[WLat6, FXa, NormalGr], (instregex "MS(R|FI)$")>;
459def : InstRW<[WLat8LSU, RegReadAdv, FXa, LSU, NormalGr], (instregex "MSG$")>;
460def : InstRW<[WLat8, FXa, NormalGr], (instregex "MSGR$")>;
461def : InstRW<[WLat6, FXa, NormalGr], (instregex "MSGF(I|R)$")>;
462def : InstRW<[WLat11LSU, RegReadAdv, FXa2, LSU, GroupAlone],
463             (instregex "MLG$")>;
464def : InstRW<[WLat9, FXa2, GroupAlone], (instregex "MLGR$")>;
465def : InstRW<[WLat5, FXa, NormalGr], (instregex "MGHI$")>;
466def : InstRW<[WLat5, FXa, NormalGr], (instregex "MHI$")>;
467def : InstRW<[WLat5LSU, RegReadAdv, FXa, LSU, NormalGr], (instregex "MH(Y)?$")>;
468def : InstRW<[WLat7, FXa2, GroupAlone], (instregex "M(L)?R$")>;
469def : InstRW<[WLat7LSU, RegReadAdv, FXa2, LSU, GroupAlone],
470             (instregex "M(FY|L)?$")>;
471
472//===----------------------------------------------------------------------===//
473// Division and remainder
474//===----------------------------------------------------------------------===//
475
476def : InstRW<[WLat20, FXa4, GroupAlone], (instregex "DR$")>;
477def : InstRW<[WLat30, RegReadAdv, FXa4, LSU, GroupAlone], (instregex "D$")>;
478def : InstRW<[WLat30, FXa2, GroupAlone], (instregex "DSG(F)?R$")>;
479def : InstRW<[WLat30, RegReadAdv, FXa2, LSU, GroupAlone],
480             (instregex "DSG(F)?$")>;
481def : InstRW<[WLat20, FXa4, GroupAlone], (instregex "DLR$")>;
482def : InstRW<[WLat30, FXa4, GroupAlone], (instregex "DLGR$")>;
483def : InstRW<[WLat30, RegReadAdv, FXa4, LSU, GroupAlone], (instregex "DL(G)?$")>;
484
485//===----------------------------------------------------------------------===//
486// Shifts
487//===----------------------------------------------------------------------===//
488
489def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLL(G|K)?$")>;
490def : InstRW<[WLat1, FXa, NormalGr], (instregex "SRL(G|K)?$")>;
491def : InstRW<[WLat1, FXa, NormalGr], (instregex "SRA(G|K)?$")>;
492def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLA(G|K)?$")>;
493def : InstRW<[WLat5LSU, WLat5LSU, FXa4, LSU, GroupAlone],
494             (instregex "S(L|R)D(A|L)$")>;
495
496// Rotate
497def : InstRW<[WLat2LSU, FXa, LSU, NormalGr], (instregex "RLL(G)?$")>;
498
499// Rotate and insert
500def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBG(N|32)?$")>;
501def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBH(G|H|L)$")>;
502def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBL(G|H|L)$")>;
503def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBMux$")>;
504
505// Rotate and Select
506def : InstRW<[WLat3, WLat3, FXa2, Cracked], (instregex "R(N|O|X)SBG$")>;
507
508//===----------------------------------------------------------------------===//
509// Comparison
510//===----------------------------------------------------------------------===//
511
512def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr],
513             (instregex "C(G|Y|Mux)?$")>;
514def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CRL$")>;
515def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(F|H)I(Mux)?$")>;
516def : InstRW<[WLat1, FXb, NormalGr], (instregex "CG(F|H)I$")>;
517def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CG(HSI|RL)$")>;
518def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(G)?R$")>;
519def : InstRW<[WLat1, FXb, NormalGr], (instregex "CIH$")>;
520def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CHF$")>;
521def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CHSI$")>;
522def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr],
523             (instregex "CL(Y|Mux)?$")>;
524def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLFHSI$")>;
525def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLFI(Mux)?$")>;
526def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CLG$")>;
527def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLG(HRL|HSI)$")>;
528def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CLGF$")>;
529def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLGFRL$")>;
530def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLGF(I|R)$")>;
531def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLGR$")>;
532def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLGRL$")>;
533def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CLHF$")>;
534def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLH(RL|HSI)$")>;
535def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLIH$")>;
536def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLI(Y)?$")>;
537def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLR$")>;
538def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLRL$")>;
539def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(L)?HHR$")>;
540def : InstRW<[WLat2, FXb, NormalGr], (instregex "C(L)?HLR$")>;
541
542// Compare halfword
543def : InstRW<[WLat2LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CH(Y)?$")>;
544def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "CHRL$")>;
545def : InstRW<[WLat2LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CGH$")>;
546def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "CGHRL$")>;
547def : InstRW<[WLat2LSU, FXa, FXb, LSU, Cracked], (instregex "CHHSI$")>;
548
549// Compare with sign extension (32 -> 64)
550def : InstRW<[WLat2LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CGF$")>;
551def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "CGFRL$")>;
552def : InstRW<[WLat2, FXb, NormalGr], (instregex "CGFR$")>;
553
554// Compare logical character
555def : InstRW<[WLat6, FXb, LSU2, Cracked], (instregex "CLC$")>;
556def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CLCL(E|U)?$")>;
557def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CLST$")>;
558
559// Test under mask
560def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "TM(Y)?$")>;
561def : InstRW<[WLat1, FXb, NormalGr], (instregex "TM(H|L)Mux$")>;
562def : InstRW<[WLat1, FXb, NormalGr], (instregex "TMHH(64)?$")>;
563def : InstRW<[WLat1, FXb, NormalGr], (instregex "TMHL(64)?$")>;
564def : InstRW<[WLat1, FXb, NormalGr], (instregex "TMLH(64)?$")>;
565def : InstRW<[WLat1, FXb, NormalGr], (instregex "TMLL(64)?$")>;
566
567// Compare logical characters under mask
568def : InstRW<[WLat2LSU, RegReadAdv, FXb, LSU, NormalGr],
569             (instregex "CLM(H|Y)?$")>;
570
571//===----------------------------------------------------------------------===//
572// Prefetch and execution hint
573//===----------------------------------------------------------------------===//
574
575def : InstRW<[WLat1, LSU, NormalGr], (instregex "PFD(RL)?$")>;
576def : InstRW<[WLat1, FXb, NormalGr], (instregex "BPP$")>;
577def : InstRW<[FXb, EndGroup], (instregex "BPRP$")>;
578def : InstRW<[WLat1, FXb, NormalGr], (instregex "NIAI$")>;
579
580//===----------------------------------------------------------------------===//
581// Atomic operations
582//===----------------------------------------------------------------------===//
583
584def : InstRW<[WLat1, FXb, EndGroup], (instregex "Serialize$")>;
585
586def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAA(G)?$")>;
587def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAAL(G)?$")>;
588def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAN(G)?$")>;
589def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAO(G)?$")>;
590def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAX(G)?$")>;
591
592// Test and set
593def : InstRW<[WLat2LSU, FXb, LSU, EndGroup], (instregex "TS$")>;
594
595// Compare and swap
596def : InstRW<[WLat3LSU, WLat3LSU, FXa, FXb, LSU, GroupAlone],
597             (instregex "CS(G|Y)?$")>;
598
599// Compare double and swap
600def : InstRW<[WLat6LSU, WLat6LSU, FXa3, FXb2, LSU, GroupAlone],
601             (instregex "CDS(Y)?$")>;
602def : InstRW<[WLat15, WLat15, FXa2, FXb4, LSU3, GroupAlone],
603             (instregex "CDSG$")>;
604
605// Compare and swap and store
606def : InstRW<[WLat30, MCD], (instregex "CSST$")>;
607
608// Perform locked operation
609def : InstRW<[WLat30, MCD], (instregex "PLO$")>;
610
611// Load/store pair from/to quadword
612def : InstRW<[WLat4LSU, LSU2, GroupAlone], (instregex "LPQ$")>;
613def : InstRW<[WLat1, FXb2, LSU, GroupAlone], (instregex "STPQ$")>;
614
615// Load pair disjoint
616def : InstRW<[WLat1LSU, WLat1LSU, LSU2, GroupAlone], (instregex "LPD(G)?$")>;
617
618//===----------------------------------------------------------------------===//
619// Translate and convert
620//===----------------------------------------------------------------------===//
621
622def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "TR$")>;
623def : InstRW<[WLat30, WLat30, WLat30, FXa3, LSU2, GroupAlone],
624             (instregex "TRT$")>;
625def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "TRTR$")>;
626def : InstRW<[WLat30, WLat30, MCD], (instregex "TRE$")>;
627def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "TRT(R)?E(Opt)?$")>;
628def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "TR(T|O)(T|O)(Opt)?$")>;
629def : InstRW<[WLat30, WLat30, WLat30, MCD],
630             (instregex "CU(12|14|21|24|41|42)(Opt)?$")>;
631def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "(CUUTF|CUTFU)(Opt)?$")>;
632
633//===----------------------------------------------------------------------===//
634// Message-security assist
635//===----------------------------------------------------------------------===//
636
637def : InstRW<[WLat30, WLat30, WLat30, WLat30, MCD],
638             (instregex "KM(C|F|O|CTR)?$")>;
639def : InstRW<[WLat30, WLat30, WLat30, MCD],
640             (instregex "(KIMD|KLMD|KMAC|PCC|PPNO)$")>;
641
642//===----------------------------------------------------------------------===//
643// Decimal arithmetic
644//===----------------------------------------------------------------------===//
645
646def : InstRW<[WLat30, RegReadAdv, FXb, VecDF2, LSU2, GroupAlone],
647             (instregex "CVBG$")>;
648def : InstRW<[WLat30, RegReadAdv, FXb, VecDF, LSU, GroupAlone],
649             (instregex "CVB(Y)?$")>;
650def : InstRW<[WLat1, FXb3, VecDF4, LSU, GroupAlone], (instregex "CVDG$")>;
651def : InstRW<[WLat1, FXb2, VecDF, LSU, GroupAlone], (instregex "CVD(Y)?$")>;
652def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "MV(N|O|Z)$")>;
653def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "(PACK|PKA|PKU)$")>;
654def : InstRW<[WLat12, LSU5, GroupAlone], (instregex "UNPK(A|U)$")>;
655def : InstRW<[WLat1, FXb, LSU2, Cracked], (instregex "UNPK$")>;
656
657def : InstRW<[WLat5LSU, FXb, VecDFX, LSU3, GroupAlone],
658             (instregex "(A|S|ZA)P$")>;
659def : InstRW<[WLat1, FXb, VecDFX4, LSU3, GroupAlone], (instregex "(M|D)P$")>;
660def : InstRW<[WLat15, FXb, VecDFX2, LSU2, GroupAlone], (instregex "SRP$")>;
661def : InstRW<[WLat8, VecDFX, LSU, LSU, GroupAlone], (instregex "CP$")>;
662def : InstRW<[WLat3LSU, VecDFX, LSU, Cracked], (instregex "TP$")>;
663def : InstRW<[WLat30, MCD], (instregex "ED(MK)?$")>;
664
665//===----------------------------------------------------------------------===//
666// Access registers
667//===----------------------------------------------------------------------===//
668
669// Extract/set/copy access register
670def : InstRW<[WLat3, LSU, NormalGr], (instregex "(EAR|SAR|CPYA)$")>;
671
672// Load address extended
673def : InstRW<[WLat5, LSU, FXa, Cracked], (instregex "LAE(Y)?$")>;
674
675// Load/store access multiple (not modeled precisely)
676def : InstRW<[WLat20, WLat20, LSU5, GroupAlone], (instregex "LAM(Y)?$")>;
677def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "STAM(Y)?$")>;
678
679//===----------------------------------------------------------------------===//
680// Program mask and addressing mode
681//===----------------------------------------------------------------------===//
682
683// Insert Program Mask
684def : InstRW<[WLat3, FXa, EndGroup], (instregex "IPM$")>;
685
686// Set Program Mask
687def : InstRW<[WLat3, LSU, EndGroup], (instregex "SPM$")>;
688
689// Branch and link
690def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "BAL(R)?$")>;
691
692// Test addressing mode
693def : InstRW<[WLat1, FXb, NormalGr], (instregex "TAM$")>;
694
695// Set addressing mode
696def : InstRW<[WLat1, FXb, EndGroup], (instregex "SAM(24|31|64)$")>;
697
698// Branch (and save) and set mode.
699def : InstRW<[WLat1, FXa, FXb, GroupAlone], (instregex "BSM$")>;
700def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "BASSM$")>;
701
702//===----------------------------------------------------------------------===//
703// Transactional execution
704//===----------------------------------------------------------------------===//
705
706// Transaction begin
707def : InstRW<[WLat9, LSU2, FXb5, GroupAlone], (instregex "TBEGIN(C)?$")>;
708
709// Transaction end
710def : InstRW<[WLat1, FXb, GroupAlone], (instregex "TEND$")>;
711
712// Transaction abort
713def : InstRW<[WLat30, MCD], (instregex "TABORT$")>;
714
715// Extract Transaction Nesting Depth
716def : InstRW<[WLat1, FXa, NormalGr], (instregex "ETND$")>;
717
718// Nontransactional store
719def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "NTSTG$")>;
720
721//===----------------------------------------------------------------------===//
722// Processor assist
723//===----------------------------------------------------------------------===//
724
725def : InstRW<[WLat30, MCD], (instregex "PPA$")>;
726
727//===----------------------------------------------------------------------===//
728// Miscellaneous Instructions.
729//===----------------------------------------------------------------------===//
730
731// Find leftmost one
732def : InstRW<[WLat7, WLat7, FXa2, GroupAlone], (instregex "FLOGR$")>;
733
734// Population count
735def : InstRW<[WLat3, WLat3, FXa, NormalGr], (instregex "POPCNT$")>;
736
737// String instructions
738def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "SRST(U)?$")>;
739def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CUSE$")>;
740
741// Various complex instructions
742def : InstRW<[WLat30, WLat30, WLat30, WLat30, MCD], (instregex "CFC$")>;
743def : InstRW<[WLat30, WLat30, WLat30, WLat30, WLat30, WLat30, MCD],
744             (instregex "UPT$")>;
745def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CKSM$")>;
746def : InstRW<[WLat30, WLat30, WLat30, WLat30, MCD], (instregex "CMPSC$")>;
747
748// Execute
749def : InstRW<[WLat1, FXb, GroupAlone], (instregex "EX(RL)?$")>;
750
751//===----------------------------------------------------------------------===//
752// .insn directive instructions
753//===----------------------------------------------------------------------===//
754
755// An "empty" sched-class will be assigned instead of the "invalid sched-class".
756// getNumDecoderSlots() will then return 1 instead of 0.
757def : InstRW<[], (instregex "Insn.*")>;
758
759
760// ----------------------------- Floating point ----------------------------- //
761
762//===----------------------------------------------------------------------===//
763// FP: Move instructions
764//===----------------------------------------------------------------------===//
765
766// Load zero
767def : InstRW<[WLat1, FXb, NormalGr], (instregex "LZ(DR|ER)$")>;
768def : InstRW<[WLat2, FXb2, Cracked], (instregex "LZXR$")>;
769
770// Load
771def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "LER$")>;
772def : InstRW<[WLat1, FXb, NormalGr], (instregex "LD(R|R32|GR)$")>;
773def : InstRW<[WLat3, FXb, NormalGr], (instregex "LGDR$")>;
774def : InstRW<[WLat2, FXb2, GroupAlone], (instregex "LXR$")>;
775
776// Load and Test
777def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "LT(E|D)BR$")>;
778def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "LT(E|D)BRCompare$")>;
779def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone],
780             (instregex "LTXBR(Compare)?$")>;
781
782// Copy sign
783def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "CPSDR(d|s)(d|s)$")>;
784
785//===----------------------------------------------------------------------===//
786// FP: Load instructions
787//===----------------------------------------------------------------------===//
788
789def : InstRW<[WLat2LSU, VecXsPm, LSU, NormalGr], (instregex "LE(Y)?$")>;
790def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LD(Y|E32)?$")>;
791def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LX$")>;
792
793//===----------------------------------------------------------------------===//
794// FP: Store instructions
795//===----------------------------------------------------------------------===//
796
797def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "ST(E|D)(Y)?$")>;
798def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STX$")>;
799
800//===----------------------------------------------------------------------===//
801// FP: Conversion instructions
802//===----------------------------------------------------------------------===//
803
804// Load rounded
805def : InstRW<[WLat7, VecBF, NormalGr], (instregex "LEDBR(A)?$")>;
806def : InstRW<[WLat9, VecDF2, NormalGr], (instregex "L(E|D)XBR(A)?$")>;
807
808// Load lengthened
809def : InstRW<[WLat7LSU, VecBF, LSU, NormalGr], (instregex "LDEB$")>;
810def : InstRW<[WLat7, VecBF, NormalGr], (instregex "LDEBR$")>;
811def : InstRW<[WLat8LSU, VecBF4, LSU, GroupAlone], (instregex "LX(E|D)B$")>;
812def : InstRW<[WLat8, VecBF4, GroupAlone], (instregex "LX(E|D)BR$")>;
813
814// Convert from fixed / logical
815def : InstRW<[WLat8, FXb, VecBF, Cracked], (instregex "C(E|D)(F|G)BR(A)?$")>;
816def : InstRW<[WLat11, FXb, VecDF4, GroupAlone], (instregex "CX(F|G)BR(A)?$")>;
817def : InstRW<[WLat8, FXb, VecBF, Cracked], (instregex "C(E|D)L(F|G)BR$")>;
818def : InstRW<[WLat11, FXb, VecDF4, GroupAlone], (instregex "CXL(F|G)BR$")>;
819
820// Convert to fixed / logical
821def : InstRW<[WLat10, WLat10, FXb, VecBF, Cracked],
822             (instregex "C(F|G)(E|D)BR(A)?$")>;
823def : InstRW<[WLat12, WLat12, FXb, VecDF2, Cracked],
824             (instregex "C(F|G)XBR(A)?$")>;
825def : InstRW<[WLat10, WLat10, FXb, VecBF, GroupAlone], (instregex "CLFEBR$")>;
826def : InstRW<[WLat10, WLat10, FXb, VecBF, Cracked], (instregex "CLFDBR$")>;
827def : InstRW<[WLat10, WLat10, FXb, VecBF, Cracked], (instregex "CLG(E|D)BR$")>;
828def : InstRW<[WLat12, WLat12, FXb, VecDF2, Cracked], (instregex "CL(F|G)XBR$")>;
829
830//===----------------------------------------------------------------------===//
831// FP: Unary arithmetic
832//===----------------------------------------------------------------------===//
833
834// Load Complement / Negative / Positive
835def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "L(C|N|P)(E|D)BR$")>;
836def : InstRW<[WLat1, FXb, NormalGr], (instregex "L(C|N|P)DFR(_32)?$")>;
837def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "L(C|N|P)XBR$")>;
838
839// Square root
840def : InstRW<[WLat30, VecFPd, LSU, NormalGr], (instregex "SQ(E|D)B$")>;
841def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "SQ(E|D)BR$")>;
842def : InstRW<[WLat30, VecFPd, GroupAlone], (instregex "SQXBR$")>;
843
844// Load FP integer
845def : InstRW<[WLat7, VecBF, NormalGr], (instregex "FI(E|D)BR(A)?$")>;
846def : InstRW<[WLat10, VecDF4, GroupAlone], (instregex "FIXBR(A)?$")>;
847
848//===----------------------------------------------------------------------===//
849// FP: Binary arithmetic
850//===----------------------------------------------------------------------===//
851
852// Addition
853def : InstRW<[WLat7LSU, WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr],
854             (instregex "A(E|D)B$")>;
855def : InstRW<[WLat7, WLat7, VecBF, NormalGr], (instregex "A(E|D)BR$")>;
856def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "AXBR$")>;
857
858// Subtraction
859def : InstRW<[WLat7LSU, WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr],
860             (instregex "S(E|D)B$")>;
861def : InstRW<[WLat7, WLat7, VecBF, NormalGr], (instregex "S(E|D)BR$")>;
862def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "SXBR$")>;
863
864// Multiply
865def : InstRW<[WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr],
866             (instregex "M(D|DE|EE)B$")>;
867def : InstRW<[WLat7, VecBF, NormalGr], (instregex "M(D|DE|EE)BR$")>;
868def : InstRW<[WLat8LSU, RegReadAdv, VecBF4, LSU, GroupAlone],
869             (instregex "MXDB$")>;
870def : InstRW<[WLat8, VecBF4, GroupAlone], (instregex "MXDBR$")>;
871def : InstRW<[WLat20, VecDF4, GroupAlone], (instregex "MXBR$")>;
872
873// Multiply and add / subtract
874def : InstRW<[WLat7LSU, RegReadAdv, RegReadAdv, VecBF2, LSU, GroupAlone],
875             (instregex "M(A|S)EB$")>;
876def : InstRW<[WLat7, VecBF, GroupAlone], (instregex "M(A|S)EBR$")>;
877def : InstRW<[WLat7LSU, RegReadAdv, RegReadAdv, VecBF2, LSU, GroupAlone],
878             (instregex "M(A|S)DB$")>;
879def : InstRW<[WLat7, VecBF, NormalGr], (instregex "M(A|S)DBR$")>;
880
881// Division
882def : InstRW<[WLat30, RegReadAdv, VecFPd, LSU, NormalGr],
883             (instregex "D(E|D)B$")>;
884def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "D(E|D)BR$")>;
885def : InstRW<[WLat30, VecFPd, GroupAlone], (instregex "DXBR$")>;
886
887// Divide to integer
888def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "DI(E|D)BR$")>;
889
890//===----------------------------------------------------------------------===//
891// FP: Comparisons
892//===----------------------------------------------------------------------===//
893
894// Compare
895def : InstRW<[WLat3LSU, RegReadAdv, VecXsPm, LSU, NormalGr],
896             (instregex "(K|C)(E|D)B$")>;
897def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "(K|C)(E|D)BR$")>;
898def : InstRW<[WLat9, VecDF2, GroupAlone], (instregex "(K|C)XBR$")>;
899
900// Test Data Class
901def : InstRW<[WLat5, LSU, VecXsPm, NormalGr], (instregex "TC(E|D)B$")>;
902def : InstRW<[WLat10, LSU2, VecDF4, GroupAlone], (instregex "TCXB$")>;
903
904//===----------------------------------------------------------------------===//
905// FP: Floating-point control register instructions
906//===----------------------------------------------------------------------===//
907
908def : InstRW<[WLat4, FXa, LSU, GroupAlone], (instregex "EFPC$")>;
909def : InstRW<[WLat1, FXb, LSU, GroupAlone], (instregex "STFPC$")>;
910def : InstRW<[WLat3, LSU, GroupAlone], (instregex "SFPC$")>;
911def : InstRW<[WLat3LSU, LSU2, GroupAlone], (instregex "LFPC$")>;
912def : InstRW<[WLat30, MCD], (instregex "SFASR$")>;
913def : InstRW<[WLat30, MCD], (instregex "LFAS$")>;
914def : InstRW<[WLat3, FXb, GroupAlone], (instregex "SRNM(B|T)?$")>;
915
916
917// --------------------- Hexadecimal floating point ------------------------- //
918
919//===----------------------------------------------------------------------===//
920// HFP: Move instructions
921//===----------------------------------------------------------------------===//
922
923// Load and Test
924def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "LT(E|D)R$")>;
925def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "LTXR$")>;
926
927//===----------------------------------------------------------------------===//
928// HFP: Conversion instructions
929//===----------------------------------------------------------------------===//
930
931// Load rounded
932def : InstRW<[WLat7, VecBF, NormalGr], (instregex "(LEDR|LRER)$")>;
933def : InstRW<[WLat7, VecBF, NormalGr], (instregex "LEXR$")>;
934def : InstRW<[WLat9, VecDF2, NormalGr], (instregex "(LDXR|LRDR)$")>;
935
936// Load lengthened
937def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LDE$")>;
938def : InstRW<[WLat1, FXb, NormalGr], (instregex "LDER$")>;
939def : InstRW<[WLat8LSU, VecBF4, LSU, GroupAlone], (instregex "LX(E|D)$")>;
940def : InstRW<[WLat8, VecBF4, GroupAlone], (instregex "LX(E|D)R$")>;
941
942// Convert from fixed
943def : InstRW<[WLat8, FXb, VecBF, Cracked], (instregex "C(E|D)(F|G)R$")>;
944def : InstRW<[WLat11, FXb, VecDF4, GroupAlone], (instregex "CX(F|G)R$")>;
945
946// Convert to fixed
947def : InstRW<[WLat10, WLat10, FXb, VecBF, Cracked], (instregex "C(F|G)(E|D)R$")>;
948def : InstRW<[WLat12, WLat12, FXb, VecDF2, Cracked], (instregex "C(F|G)XR$")>;
949
950// Convert BFP to HFP / HFP to BFP.
951def : InstRW<[WLat7, WLat7, VecBF, NormalGr], (instregex "THD(E)?R$")>;
952def : InstRW<[WLat7, WLat7, VecBF, NormalGr], (instregex "TB(E)?DR$")>;
953
954//===----------------------------------------------------------------------===//
955// HFP: Unary arithmetic
956//===----------------------------------------------------------------------===//
957
958// Load Complement / Negative / Positive
959def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "L(C|N|P)(E|D)R$")>;
960def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "L(C|N|P)XR$")>;
961
962// Halve
963def : InstRW<[WLat7, VecBF, NormalGr], (instregex "H(E|D)R$")>;
964
965// Square root
966def : InstRW<[WLat30, VecFPd, LSU, NormalGr], (instregex "SQ(E|D)$")>;
967def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "SQ(E|D)R$")>;
968def : InstRW<[WLat30, VecFPd, GroupAlone], (instregex "SQXR$")>;
969
970// Load FP integer
971def : InstRW<[WLat7, VecBF, NormalGr], (instregex "FI(E|D)R$")>;
972def : InstRW<[WLat10, VecDF4, GroupAlone], (instregex "FIXR$")>;
973
974//===----------------------------------------------------------------------===//
975// HFP: Binary arithmetic
976//===----------------------------------------------------------------------===//
977
978// Addition
979def : InstRW<[WLat7LSU, WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr],
980             (instregex "A(E|D|U|W)$")>;
981def : InstRW<[WLat7, WLat7, VecBF, NormalGr], (instregex "A(E|D|U|W)R$")>;
982def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "AXR$")>;
983
984// Subtraction
985def : InstRW<[WLat7LSU, WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr],
986             (instregex "S(E|D|U|W)$")>;
987def : InstRW<[WLat7, WLat7, VecBF, NormalGr], (instregex "S(E|D|U|W)R$")>;
988def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "SXR$")>;
989
990// Multiply
991def : InstRW<[WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr],
992             (instregex "M(D|DE|E|EE)$")>;
993def : InstRW<[WLat7, VecBF, NormalGr], (instregex "M(D|DE|E|EE)R$")>;
994def : InstRW<[WLat8LSU, RegReadAdv, VecBF4, LSU, GroupAlone],
995             (instregex "MXD$")>;
996def : InstRW<[WLat8, VecBF4, GroupAlone], (instregex "MXDR$")>;
997def : InstRW<[WLat30, VecDF4, GroupAlone], (instregex "MXR$")>;
998def : InstRW<[WLat8LSU, RegReadAdv, VecBF4, LSU, GroupAlone],
999             (instregex "MY$")>;
1000def : InstRW<[WLat7LSU, RegReadAdv, VecBF2, LSU, GroupAlone],
1001             (instregex "MY(H|L)$")>;
1002def : InstRW<[WLat8, VecBF4, GroupAlone], (instregex "MYR$")>;
1003def : InstRW<[WLat7, VecBF, GroupAlone], (instregex "MY(H|L)R$")>;
1004
1005// Multiply and add / subtract
1006def : InstRW<[WLat7LSU, RegReadAdv, RegReadAdv, VecBF2, LSU, GroupAlone],
1007             (instregex "M(A|S)(E|D)$")>;
1008def : InstRW<[WLat7, VecBF, GroupAlone], (instregex "M(A|S)(E|D)R$")>;
1009def : InstRW<[WLat8LSU, RegReadAdv, RegReadAdv, VecBF4, LSU, GroupAlone],
1010             (instregex "MAY$")>;
1011def : InstRW<[WLat7LSU, RegReadAdv, RegReadAdv, VecBF2, LSU, GroupAlone],
1012             (instregex "MAY(H|L)$")>;
1013def : InstRW<[WLat8, VecBF4, GroupAlone], (instregex "MAYR$")>;
1014def : InstRW<[WLat7, VecBF, GroupAlone], (instregex "MAY(H|L)R$")>;
1015
1016// Division
1017def : InstRW<[WLat30, RegReadAdv, VecFPd, LSU, NormalGr],
1018             (instregex "D(E|D)$")>;
1019def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "D(E|D)R$")>;
1020def : InstRW<[WLat30, VecFPd, GroupAlone], (instregex "DXR$")>;
1021
1022//===----------------------------------------------------------------------===//
1023// HFP: Comparisons
1024//===----------------------------------------------------------------------===//
1025
1026// Compare
1027def : InstRW<[WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr],
1028             (instregex "C(E|D)$")>;
1029def : InstRW<[WLat7, VecBF, NormalGr], (instregex "C(E|D)R$")>;
1030def : InstRW<[WLat10, VecDF2, GroupAlone], (instregex "CXR$")>;
1031
1032
1033// ------------------------ Decimal floating point -------------------------- //
1034
1035//===----------------------------------------------------------------------===//
1036// DFP: Move instructions
1037//===----------------------------------------------------------------------===//
1038
1039// Load and Test
1040def : InstRW<[WLat8, WLat8, VecDF, NormalGr], (instregex "LTDTR$")>;
1041def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "LTXTR$")>;
1042
1043//===----------------------------------------------------------------------===//
1044// DFP: Conversion instructions
1045//===----------------------------------------------------------------------===//
1046
1047// Load rounded
1048def : InstRW<[WLat15, VecDF, NormalGr], (instregex "LEDTR$")>;
1049def : InstRW<[WLat15, VecDF2, NormalGr], (instregex "LDXTR$")>;
1050
1051// Load lengthened
1052def : InstRW<[WLat8, VecDF, NormalGr], (instregex "LDETR$")>;
1053def : InstRW<[WLat10, VecDF4, GroupAlone], (instregex "LXDTR$")>;
1054
1055// Convert from fixed / logical
1056def : InstRW<[WLat30, FXb, VecDF, Cracked], (instregex "CD(F|G)TR(A)?$")>;
1057def : InstRW<[WLat30, FXb, VecDF4, GroupAlone], (instregex "CX(F|G)TR(A)?$")>;
1058def : InstRW<[WLat30, FXb, VecDF, Cracked], (instregex "CDL(F|G)TR$")>;
1059def : InstRW<[WLat30, FXb, VecDF4, GroupAlone], (instregex "CXL(F|G)TR$")>;
1060
1061// Convert to fixed / logical
1062def : InstRW<[WLat30, WLat30, FXb, VecDF, Cracked],
1063             (instregex "C(F|G)DTR(A)?$")>;
1064def : InstRW<[WLat30, WLat30, FXb, VecDF2, Cracked],
1065             (instregex "C(F|G)XTR(A)?$")>;
1066def : InstRW<[WLat30, WLat30, FXb, VecDF, Cracked], (instregex "CL(F|G)DTR$")>;
1067def : InstRW<[WLat30, WLat30, FXb, VecDF2, Cracked], (instregex "CL(F|G)XTR$")>;
1068
1069// Convert from / to signed / unsigned packed
1070def : InstRW<[WLat9, FXb, VecDF, Cracked], (instregex "CD(S|U)TR$")>;
1071def : InstRW<[WLat12, FXb2, VecDF4, GroupAlone], (instregex "CX(S|U)TR$")>;
1072def : InstRW<[WLat11, FXb, VecDF, Cracked], (instregex "C(S|U)DTR$")>;
1073def : InstRW<[WLat15, FXb2, VecDF4, GroupAlone], (instregex "C(S|U)XTR$")>;
1074
1075// Convert from / to zoned
1076def : InstRW<[WLat8LSU, LSU, VecDF, Cracked], (instregex "CDZT$")>;
1077def : InstRW<[WLat16LSU, LSU2, VecDF4, GroupAlone], (instregex "CXZT$")>;
1078def : InstRW<[WLat1, FXb, LSU, VecDF, Cracked], (instregex "CZDT$")>;
1079def : InstRW<[WLat1, FXb, LSU, VecDF2, GroupAlone], (instregex "CZXT$")>;
1080
1081// Convert from / to packed
1082def : InstRW<[WLat8LSU, LSU, VecDF, Cracked], (instregex "CDPT$")>;
1083def : InstRW<[WLat16LSU, LSU2, VecDF4, GroupAlone], (instregex "CXPT$")>;
1084def : InstRW<[WLat1, FXb, LSU, VecDF, Cracked], (instregex "CPDT$")>;
1085def : InstRW<[WLat1, FXb, LSU, VecDF2, GroupAlone], (instregex "CPXT$")>;
1086
1087// Perform floating-point operation
1088def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "PFPO$")>;
1089
1090//===----------------------------------------------------------------------===//
1091// DFP: Unary arithmetic
1092//===----------------------------------------------------------------------===//
1093
1094// Load FP integer
1095def : InstRW<[WLat8, VecDF, NormalGr], (instregex "FIDTR$")>;
1096def : InstRW<[WLat10, VecDF4, GroupAlone], (instregex "FIXTR$")>;
1097
1098// Extract biased exponent
1099def : InstRW<[WLat11, FXb, VecDF, Cracked], (instregex "EEDTR$")>;
1100def : InstRW<[WLat11, FXb, VecDF, Cracked], (instregex "EEXTR$")>;
1101
1102// Extract significance
1103def : InstRW<[WLat11, FXb, VecDF, Cracked], (instregex "ESDTR$")>;
1104def : InstRW<[WLat12, FXb, VecDF2, Cracked], (instregex "ESXTR$")>;
1105
1106//===----------------------------------------------------------------------===//
1107// DFP: Binary arithmetic
1108//===----------------------------------------------------------------------===//
1109
1110// Addition
1111def : InstRW<[WLat8, WLat8, VecDF, NormalGr], (instregex "ADTR(A)?$")>;
1112def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "AXTR(A)?$")>;
1113
1114// Subtraction
1115def : InstRW<[WLat8, WLat8, VecDF, NormalGr], (instregex "SDTR(A)?$")>;
1116def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "SXTR(A)?$")>;
1117
1118// Multiply
1119def : InstRW<[WLat30, VecDF, NormalGr], (instregex "MDTR(A)?$")>;
1120def : InstRW<[WLat30, VecDF4, GroupAlone], (instregex "MXTR(A)?$")>;
1121
1122// Division
1123def : InstRW<[WLat30, VecDF, NormalGr], (instregex "DDTR(A)?$")>;
1124def : InstRW<[WLat30, VecDF4, GroupAlone], (instregex "DXTR(A)?$")>;
1125
1126// Quantize
1127def : InstRW<[WLat8, WLat8, VecDF, NormalGr], (instregex "QADTR$")>;
1128def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "QAXTR$")>;
1129
1130// Reround
1131def : InstRW<[WLat9, WLat9, FXb, VecDF, Cracked], (instregex "RRDTR$")>;
1132def : InstRW<[WLat11, WLat11, FXb, VecDF4, GroupAlone], (instregex "RRXTR$")>;
1133
1134// Shift significand left/right
1135def : InstRW<[WLat11LSU, LSU, VecDF, GroupAlone], (instregex "S(L|R)DT$")>;
1136def : InstRW<[WLat11LSU, LSU, VecDF4, GroupAlone], (instregex "S(L|R)XT$")>;
1137
1138// Insert biased exponent
1139def : InstRW<[WLat9, FXb, VecDF, Cracked], (instregex "IEDTR$")>;
1140def : InstRW<[WLat11, FXb, VecDF4, GroupAlone], (instregex "IEXTR$")>;
1141
1142//===----------------------------------------------------------------------===//
1143// DFP: Comparisons
1144//===----------------------------------------------------------------------===//
1145
1146// Compare
1147def : InstRW<[WLat8, VecDF, NormalGr], (instregex "(K|C)DTR$")>;
1148def : InstRW<[WLat9, VecDF2, GroupAlone], (instregex "(K|C)XTR$")>;
1149
1150// Compare biased exponent
1151def : InstRW<[WLat8, VecDF, NormalGr], (instregex "CEDTR$")>;
1152def : InstRW<[WLat8, VecDF, NormalGr], (instregex "CEXTR$")>;
1153
1154// Test Data Class/Group
1155def : InstRW<[WLat15, LSU, VecDF, NormalGr], (instregex "TD(C|G)(E|D)T$")>;
1156def : InstRW<[WLat15, LSU, VecDF2, GroupAlone], (instregex "TD(C|G)XT$")>;
1157
1158
1159// --------------------------------- Vector --------------------------------- //
1160
1161//===----------------------------------------------------------------------===//
1162// Vector: Move instructions
1163//===----------------------------------------------------------------------===//
1164
1165def : InstRW<[WLat1, FXb, NormalGr], (instregex "VLR(32|64)?$")>;
1166def : InstRW<[WLat4, FXb, NormalGr], (instregex "VLGV(B|F|G|H)?$")>;
1167def : InstRW<[WLat1, FXb, NormalGr], (instregex "VLVG(B|F|G|H)?$")>;
1168def : InstRW<[WLat3, FXb, NormalGr], (instregex "VLVGP(32)?$")>;
1169
1170//===----------------------------------------------------------------------===//
1171// Vector: Immediate instructions
1172//===----------------------------------------------------------------------===//
1173
1174def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VZERO$")>;
1175def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VONE$")>;
1176def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VGBM$")>;
1177def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VGM(B|F|G|H)?$")>;
1178def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VREPI(B|F|G|H)?$")>;
1179def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VLEI(B|F|G|H)$")>;
1180
1181//===----------------------------------------------------------------------===//
1182// Vector: Loads
1183//===----------------------------------------------------------------------===//
1184
1185def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VL(BB)?$")>;
1186def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VLL$")>;
1187def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VL(32|64)$")>;
1188def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VLLEZ(B|F|G|H)?$")>;
1189def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VLREP(B|F|G|H)?$")>;
1190def : InstRW<[WLat2LSU, RegReadAdv, VecXsPm, LSU, NormalGr],
1191             (instregex "VLE(B|F|G|H)$")>;
1192def : InstRW<[WLat6LSU, RegReadAdv, FXb, LSU, VecXsPm, Cracked],
1193             (instregex "VGE(F|G)$")>;
1194def : InstRW<[WLat4LSU, WLat4LSU, LSU5, GroupAlone], (instregex "VLM$")>;
1195
1196//===----------------------------------------------------------------------===//
1197// Vector: Stores
1198//===----------------------------------------------------------------------===//
1199
1200def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "VST(L|32|64)?$")>;
1201def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "VSTE(F|G)$")>;
1202def : InstRW<[WLat1, FXb, LSU, VecXsPm, Cracked], (instregex "VSTE(B|H)$")>;
1203def : InstRW<[WLat1, LSU2, FXb3, GroupAlone], (instregex "VSTM$")>;
1204def : InstRW<[WLat1, FXb2, LSU, Cracked], (instregex "VSCE(F|G)$")>;
1205
1206//===----------------------------------------------------------------------===//
1207// Vector: Selects and permutes
1208//===----------------------------------------------------------------------===//
1209
1210def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMRH(B|F|G|H)?$")>;
1211def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMRL(B|F|G|H)?$")>;
1212def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPERM$")>;
1213def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPDI$")>;
1214def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VREP(B|F|G|H)?$")>;
1215def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSEL$")>;
1216
1217//===----------------------------------------------------------------------===//
1218// Vector: Widening and narrowing
1219//===----------------------------------------------------------------------===//
1220
1221def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPK(F|G|H)?$")>;
1222def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPKS(F|G|H)?$")>;
1223def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VPKS(F|G|H)S$")>;
1224def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPKLS(F|G|H)?$")>;
1225def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VPKLS(F|G|H)S$")>;
1226def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSEG(B|F|H)?$")>;
1227def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VUPH(B|F|H)?$")>;
1228def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VUPL(B|F)?$")>;
1229def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VUPLH(B|F|H|W)?$")>;
1230def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VUPLL(B|F|H)?$")>;
1231
1232//===----------------------------------------------------------------------===//
1233// Vector: Integer arithmetic
1234//===----------------------------------------------------------------------===//
1235
1236def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VA(B|F|G|H|Q|C|CQ)?$")>;
1237def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VACC(B|F|G|H|Q|C|CQ)?$")>;
1238def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VAVG(B|F|G|H)?$")>;
1239def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VAVGL(B|F|G|H)?$")>;
1240def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VN(C|O)?$")>;
1241def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VO$")>;
1242def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VCKSM$")>;
1243def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCLZ(B|F|G|H)?$")>;
1244def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCTZ(B|F|G|H)?$")>;
1245def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VX$")>;
1246def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VGFM?$")>;
1247def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VGFMA(B|F|G|H)?$")>;
1248def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VGFM(B|F|G|H)$")>;
1249def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VLC(B|F|G|H)?$")>;
1250def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VLP(B|F|G|H)?$")>;
1251def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMX(B|F|G|H)?$")>;
1252def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMXL(B|F|G|H)?$")>;
1253def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMN(B|F|G|H)?$")>;
1254def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMNL(B|F|G|H)?$")>;
1255def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMAL(B|F)?$")>;
1256def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMALE(B|F|H)?$")>;
1257def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMALH(B|F|H|W)?$")>;
1258def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMALO(B|F|H)?$")>;
1259def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMAO(B|F|H)?$")>;
1260def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMAE(B|F|H)?$")>;
1261def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMAH(B|F|H)?$")>;
1262def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VME(B|F|H)?$")>;
1263def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMH(B|F|H)?$")>;
1264def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VML(B|F)?$")>;
1265def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMLE(B|F|H)?$")>;
1266def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMLH(B|F|H|W)?$")>;
1267def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMLO(B|F|H)?$")>;
1268def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMO(B|F|H)?$")>;
1269
1270def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPOPCT$")>;
1271
1272def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VERLL(B|F|G|H)?$")>;
1273def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VERLLV(B|F|G|H)?$")>;
1274def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VERIM(B|F|G|H)?$")>;
1275def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESL(B|F|G|H)?$")>;
1276def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESLV(B|F|G|H)?$")>;
1277def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESRA(B|F|G|H)?$")>;
1278def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESRAV(B|F|G|H)?$")>;
1279def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESRL(B|F|G|H)?$")>;
1280def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESRLV(B|F|G|H)?$")>;
1281
1282def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSL(DB)?$")>;
1283def : InstRW<[WLat3, VecXsPm2, NormalGr], (instregex "VSLB$")>;
1284def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSR(A|L)$")>;
1285def : InstRW<[WLat3, VecXsPm2, NormalGr], (instregex "VSR(A|L)B$")>;
1286
1287def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSB(I|IQ|CBI|CBIQ)?$")>;
1288def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSCBI(B|F|G|H|Q)?$")>;
1289def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VS(F|G|H|Q)?$")>;
1290
1291def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VSUM(B|H)?$")>;
1292def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VSUMG(F|H)?$")>;
1293def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VSUMQ(F|G)?$")>;
1294
1295//===----------------------------------------------------------------------===//
1296// Vector: Integer comparison
1297//===----------------------------------------------------------------------===//
1298
1299def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "VEC(B|F|G|H)?$")>;
1300def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "VECL(B|F|G|H)?$")>;
1301def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCEQ(B|F|G|H)?$")>;
1302def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VCEQ(B|F|G|H)S$")>;
1303def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCH(B|F|G|H)?$")>;
1304def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VCH(B|F|G|H)S$")>;
1305def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCHL(B|F|G|H)?$")>;
1306def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VCHL(B|F|G|H)S$")>;
1307def : InstRW<[WLat4, VecStr, NormalGr], (instregex "VTM$")>;
1308
1309//===----------------------------------------------------------------------===//
1310// Vector: Floating-point arithmetic
1311//===----------------------------------------------------------------------===//
1312
1313// Conversion and rounding
1314def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VCD(L)?G$")>;
1315def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VCD(L)?GB$")>;
1316def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WCD(L)?GB$")>;
1317def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VC(L)?GD$")>;
1318def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VC(L)?GDB$")>;
1319def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WC(L)?GDB$")>;
1320def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VL(DE|ED)$")>;
1321def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VL(DE|ED)B$")>;
1322def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WL(DE|ED)B$")>;
1323def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VFI$")>;
1324def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VFIDB$")>;
1325def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WFIDB$")>;
1326
1327// Sign operations
1328def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VFPSO$")>;
1329def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "(V|W)FPSODB$")>;
1330def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "(V|W)FL(C|N|P)DB$")>;
1331
1332// Test data class
1333def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VFTCI$")>;
1334def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "(V|W)FTCIDB$")>;
1335
1336// Add / subtract
1337def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VF(A|S)$")>;
1338def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VF(A|S)DB$")>;
1339def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WF(A|S)DB$")>;
1340
1341// Multiply / multiply-and-add/subtract
1342def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VFM$")>;
1343def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VFMDB$")>;
1344def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WFMDB$")>;
1345def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VFM(A|S)$")>;
1346def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VFM(A|S)DB$")>;
1347def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WFM(A|S)DB$")>;
1348
1349// Divide / square root
1350def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "VFD$")>;
1351def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "(V|W)FDDB$")>;
1352def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "VFSQ$")>;
1353def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "(V|W)FSQDB$")>;
1354
1355//===----------------------------------------------------------------------===//
1356// Vector: Floating-point comparison
1357//===----------------------------------------------------------------------===//
1358
1359def : InstRW<[WLat2, WLat2, VecXsPm, NormalGr], (instregex "VFC(E|H|HE)$")>;
1360def : InstRW<[WLat2, WLat2, VecXsPm, NormalGr], (instregex "VFC(E|H|HE)DB$")>;
1361def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WFC(E|H|HE)DB$")>;
1362def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VFC(E|H|HE)DBS$")>;
1363def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "WFC(E|H|HE)DBS$")>;
1364def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "WF(C|K)$")>;
1365def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "WF(C|K)DB$")>;
1366
1367//===----------------------------------------------------------------------===//
1368// Vector: Floating-point insertion and extraction
1369//===----------------------------------------------------------------------===//
1370
1371def : InstRW<[WLat1, FXb, NormalGr], (instregex "LEFR$")>;
1372def : InstRW<[WLat4, FXb, NormalGr], (instregex "LFER$")>;
1373
1374//===----------------------------------------------------------------------===//
1375// Vector: String instructions
1376//===----------------------------------------------------------------------===//
1377
1378def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFAE(B)?$")>;
1379def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFAE(F|H)$")>;
1380def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VFAE(B|F|H)S$")>;
1381def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFAEZ(B|F|H)$")>;
1382def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VFAEZ(B|F|H)S$")>;
1383def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFEE(B|F|H|ZB|ZF|ZH)?$")>;
1384def : InstRW<[WLat4, WLat4, VecStr, NormalGr],
1385             (instregex "VFEE(B|F|H|ZB|ZF|ZH)S$")>;
1386def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFENE(B|F|H|ZB|ZF|ZH)?$")>;
1387def : InstRW<[WLat4, WLat4, VecStr, NormalGr],
1388             (instregex "VFENE(B|F|H|ZB|ZF|ZH)S$")>;
1389def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VISTR(B|F|H)?$")>;
1390def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VISTR(B|F|H)S$")>;
1391def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VSTRC(B|F|H)?$")>;
1392def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VSTRC(B|F|H)S$")>;
1393def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VSTRCZ(B|F|H)$")>;
1394def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VSTRCZ(B|F|H)S$")>;
1395
1396
1397// -------------------------------- System ---------------------------------- //
1398
1399//===----------------------------------------------------------------------===//
1400// System: Program-Status Word Instructions
1401//===----------------------------------------------------------------------===//
1402
1403def : InstRW<[WLat30, WLat30, MCD], (instregex "EPSW$")>;
1404def : InstRW<[WLat30, MCD], (instregex "LPSW(E)?$")>;
1405def : InstRW<[WLat3, FXa, GroupAlone], (instregex "IPK$")>;
1406def : InstRW<[WLat1, LSU, EndGroup], (instregex "SPKA$")>;
1407def : InstRW<[WLat1, LSU, EndGroup], (instregex "SSM$")>;
1408def : InstRW<[WLat1, FXb, LSU, GroupAlone], (instregex "ST(N|O)SM$")>;
1409def : InstRW<[WLat3, FXa, NormalGr], (instregex "IAC$")>;
1410def : InstRW<[WLat1, LSU, EndGroup], (instregex "SAC(F)?$")>;
1411
1412//===----------------------------------------------------------------------===//
1413// System: Control Register Instructions
1414//===----------------------------------------------------------------------===//
1415
1416def : InstRW<[WLat4LSU, WLat4LSU, LSU2, GroupAlone], (instregex "LCTL(G)?$")>;
1417def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "STCT(L|G)$")>;
1418def : InstRW<[LSULatency, LSU, NormalGr], (instregex "E(P|S)A(I)?R$")>;
1419def : InstRW<[WLat30, MCD], (instregex "SSA(I)?R$")>;
1420def : InstRW<[WLat30, MCD], (instregex "ESEA$")>;
1421
1422//===----------------------------------------------------------------------===//
1423// System: Prefix-Register Instructions
1424//===----------------------------------------------------------------------===//
1425
1426def : InstRW<[WLat30, MCD], (instregex "S(T)?PX$")>;
1427
1428//===----------------------------------------------------------------------===//
1429// System: Storage-Key and Real Memory Instructions
1430//===----------------------------------------------------------------------===//
1431
1432def : InstRW<[WLat30, MCD], (instregex "ISKE$")>;
1433def : InstRW<[WLat30, MCD], (instregex "IVSK$")>;
1434def : InstRW<[WLat30, MCD], (instregex "SSKE(Opt)?$")>;
1435def : InstRW<[WLat30, MCD], (instregex "RRB(E|M)$")>;
1436def : InstRW<[WLat30, MCD], (instregex "PFMF$")>;
1437def : InstRW<[WLat30, WLat30, MCD], (instregex "TB$")>;
1438def : InstRW<[WLat30, MCD], (instregex "PGIN$")>;
1439def : InstRW<[WLat30, MCD], (instregex "PGOUT$")>;
1440
1441//===----------------------------------------------------------------------===//
1442// System: Dynamic-Address-Translation Instructions
1443//===----------------------------------------------------------------------===//
1444
1445def : InstRW<[WLat30, MCD], (instregex "IPTE(Opt)?(Opt)?$")>;
1446def : InstRW<[WLat30, MCD], (instregex "IDTE(Opt)?$")>;
1447def : InstRW<[WLat30, MCD], (instregex "CRDTE(Opt)?$")>;
1448def : InstRW<[WLat30, MCD], (instregex "PTLB$")>;
1449def : InstRW<[WLat30, WLat30, MCD], (instregex "CSP(G)?$")>;
1450def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "LPTEA$")>;
1451def : InstRW<[WLat30, WLat30, MCD], (instregex "LRA(Y|G)?$")>;
1452def : InstRW<[WLat30, MCD], (instregex "STRAG$")>;
1453def : InstRW<[WLat30, MCD], (instregex "LURA(G)?$")>;
1454def : InstRW<[WLat30, MCD], (instregex "STUR(A|G)$")>;
1455def : InstRW<[WLat30, MCD], (instregex "TPROT$")>;
1456
1457//===----------------------------------------------------------------------===//
1458// System: Memory-move Instructions
1459//===----------------------------------------------------------------------===//
1460
1461def : InstRW<[WLat4LSU, FXa2, FXb, LSU5, GroupAlone], (instregex "MVC(K|P|S)$")>;
1462def : InstRW<[WLat1, FXa, LSU5, GroupAlone], (instregex "MVC(S|D)K$")>;
1463def : InstRW<[WLat30, MCD], (instregex "MVCOS$")>;
1464def : InstRW<[WLat30, MCD], (instregex "MVPG$")>;
1465
1466//===----------------------------------------------------------------------===//
1467// System: Address-Space Instructions
1468//===----------------------------------------------------------------------===//
1469
1470def : InstRW<[WLat30, MCD], (instregex "LASP$")>;
1471def : InstRW<[WLat1, LSU, GroupAlone], (instregex "PALB$")>;
1472def : InstRW<[WLat30, MCD], (instregex "PC$")>;
1473def : InstRW<[WLat30, MCD], (instregex "PR$")>;
1474def : InstRW<[WLat30, MCD], (instregex "PT(I)?$")>;
1475def : InstRW<[WLat30, MCD], (instregex "RP$")>;
1476def : InstRW<[WLat30, MCD], (instregex "BS(G|A)$")>;
1477def : InstRW<[WLat30, MCD], (instregex "TAR$")>;
1478
1479//===----------------------------------------------------------------------===//
1480// System: Linkage-Stack Instructions
1481//===----------------------------------------------------------------------===//
1482
1483def : InstRW<[WLat30, MCD], (instregex "BAKR$")>;
1484def : InstRW<[WLat30, MCD], (instregex "EREG(G)?$")>;
1485def : InstRW<[WLat30, WLat30, MCD], (instregex "(E|M)STA$")>;
1486
1487//===----------------------------------------------------------------------===//
1488// System: Time-Related Instructions
1489//===----------------------------------------------------------------------===//
1490
1491def : InstRW<[WLat30, MCD], (instregex "PTFF$")>;
1492def : InstRW<[WLat30, MCD], (instregex "SCK(PF|C)?$")>;
1493def : InstRW<[WLat1, LSU2, GroupAlone], (instregex "SPT$")>;
1494def : InstRW<[WLat15, LSU3, FXa2, FXb, GroupAlone], (instregex "STCK(F)?$")>;
1495def : InstRW<[WLat20, LSU4, FXa2, FXb2, GroupAlone], (instregex "STCKE$")>;
1496def : InstRW<[WLat30, MCD], (instregex "STCKC$")>;
1497def : InstRW<[WLat1, LSU2, FXb, Cracked], (instregex "STPT$")>;
1498
1499//===----------------------------------------------------------------------===//
1500// System: CPU-Related Instructions
1501//===----------------------------------------------------------------------===//
1502
1503def : InstRW<[WLat30, MCD], (instregex "STAP$")>;
1504def : InstRW<[WLat30, MCD], (instregex "STIDP$")>;
1505def : InstRW<[WLat30, WLat30, MCD], (instregex "STSI$")>;
1506def : InstRW<[WLat30, WLat30, MCD], (instregex "STFL(E)?$")>;
1507def : InstRW<[WLat30, MCD], (instregex "ECAG$")>;
1508def : InstRW<[WLat30, WLat30, MCD], (instregex "ECTG$")>;
1509def : InstRW<[WLat30, MCD], (instregex "PTF$")>;
1510def : InstRW<[WLat30, MCD], (instregex "PCKMO$")>;
1511
1512//===----------------------------------------------------------------------===//
1513// System: Miscellaneous Instructions
1514//===----------------------------------------------------------------------===//
1515
1516def : InstRW<[WLat30, MCD], (instregex "SVC$")>;
1517def : InstRW<[WLat1, FXb, GroupAlone], (instregex "MC$")>;
1518def : InstRW<[WLat30, MCD], (instregex "DIAG$")>;
1519def : InstRW<[WLat1, FXb, NormalGr], (instregex "TRAC(E|G)$")>;
1520def : InstRW<[WLat30, MCD], (instregex "TRAP(2|4)$")>;
1521def : InstRW<[WLat30, MCD], (instregex "SIG(P|A)$")>;
1522def : InstRW<[WLat30, MCD], (instregex "SIE$")>;
1523
1524//===----------------------------------------------------------------------===//
1525// System: CPU-Measurement Facility Instructions
1526//===----------------------------------------------------------------------===//
1527
1528def : InstRW<[WLat1, FXb, NormalGr], (instregex "LPP$")>;
1529def : InstRW<[WLat30, WLat30, MCD], (instregex "ECPGA$")>;
1530def : InstRW<[WLat30, WLat30, MCD], (instregex "E(C|P)CTR$")>;
1531def : InstRW<[WLat30, MCD], (instregex "LCCTL$")>;
1532def : InstRW<[WLat30, MCD], (instregex "L(P|S)CTL$")>;
1533def : InstRW<[WLat30, MCD], (instregex "Q(S|CTR)I$")>;
1534def : InstRW<[WLat30, MCD], (instregex "S(C|P)CTR$")>;
1535
1536//===----------------------------------------------------------------------===//
1537// System: I/O Instructions
1538//===----------------------------------------------------------------------===//
1539
1540def : InstRW<[WLat30, MCD], (instregex "(C|H|R|X)SCH$")>;
1541def : InstRW<[WLat30, MCD], (instregex "(M|S|ST|T)SCH$")>;
1542def : InstRW<[WLat30, MCD], (instregex "RCHP$")>;
1543def : InstRW<[WLat30, MCD], (instregex "SCHM$")>;
1544def : InstRW<[WLat30, MCD], (instregex "STC(PS|RW)$")>;
1545def : InstRW<[WLat30, MCD], (instregex "TPI$")>;
1546def : InstRW<[WLat30, MCD], (instregex "SAL$")>;
1547
1548}
1549
1550