1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2000-2003
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
6 * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
7 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
8 */
9
10 #include <common.h>
11 #include <asm/immap.h>
12 #include <asm/io.h>
13
14 DECLARE_GLOBAL_DATA_PTR;
15
checkboard(void)16 int checkboard(void)
17 {
18 puts("Board: ");
19 puts("Freescale M52277 EVB\n");
20 return 0;
21 };
22
dram_init(void)23 int dram_init(void)
24 {
25 u32 dramsize;
26
27 #ifdef CONFIG_CF_SBF
28 /*
29 * Serial Boot: The dram is already initialized in start.S
30 * only require to return DRAM size
31 */
32 dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000;
33 #else
34 sdramc_t *sdram = (sdramc_t *)(MMAP_SDRAM);
35 gpio_t *gpio = (gpio_t *)(MMAP_GPIO);
36 u32 i;
37
38 dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000;
39
40 for (i = 0x13; i < 0x20; i++) {
41 if (dramsize == (1 << i))
42 break;
43 }
44 i--;
45
46 out_8(&gpio->mscr_sdram, CONFIG_SYS_SDRAM_DRV_STRENGTH);
47
48 out_be32(&sdram->sdcs0, CONFIG_SYS_SDRAM_BASE | i);
49
50 out_be32(&sdram->sdcfg1, CONFIG_SYS_SDRAM_CFG1);
51 out_be32(&sdram->sdcfg2, CONFIG_SYS_SDRAM_CFG2);
52
53 /* Issue PALL */
54 out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 2);
55 __asm__("nop");
56
57 /* Issue LEMR */
58 out_be32(&sdram->sdmr, CONFIG_SYS_SDRAM_MODE);
59 __asm__("nop");
60 out_be32(&sdram->sdmr, CONFIG_SYS_SDRAM_EMOD);
61 __asm__("nop");
62
63 udelay(1000);
64
65 /* Issue PALL */
66 out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 2);
67 __asm__("nop");
68
69 /* Perform two refresh cycles */
70 out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 4);
71 __asm__("nop");
72 out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 4);
73 __asm__("nop");
74
75 out_be32(&sdram->sdcr,
76 (CONFIG_SYS_SDRAM_CTRL & ~0x80000000) | 0x10000c00);
77
78 udelay(100);
79 #endif
80 gd->ram_size = dramsize;
81
82 return 0;
83 };
84
testdram(void)85 int testdram(void)
86 {
87 /* TODO: XXX XXX XXX */
88 printf("DRAM test not implemented!\n");
89
90 return (0);
91 }
92