1 // clang-format off
2 // Generated file (from: space_to_batch_v1_2.mod.py). Do not edit
CreateModel_nhwc(Model * model)3 void CreateModel_nhwc(Model *model) {
4 OperandType type0(Type::BOOL, {});
5 OperandType type1(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
6 OperandType type2(Type::TENSOR_INT32, {2, 2});
7 OperandType type3(Type::TENSOR_FLOAT32, {4, 1, 1, 2});
8 OperandType type4(Type::TENSOR_INT32, {2});
9 // Phase 1, operands
10 auto op1 = model->addOperand(&type1);
11 auto param = model->addOperand(&type4);
12 auto paddings = model->addOperand(&type2);
13 auto layout = model->addOperand(&type0);
14 auto op4 = model->addOperand(&type3);
15 // Phase 2, operations
16 static int32_t param_init[] = {2, 2};
17 model->setOperandValue(param, param_init, sizeof(int32_t) * 2);
18 static int32_t paddings_init[] = {0, 0, 0, 0};
19 model->setOperandValue(paddings, paddings_init, sizeof(int32_t) * 4);
20 static bool8 layout_init[] = {false};
21 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
22 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op1, param, paddings, layout}, {op4});
23 // Phase 3, inputs and outputs
24 model->identifyInputsAndOutputs(
25 {op1},
26 {op4});
27 assert(model->isValid());
28 }
29
is_ignored_nhwc(int i)30 inline bool is_ignored_nhwc(int i) {
31 static std::set<int> ignore = {};
32 return ignore.find(i) != ignore.end();
33 }
34
CreateModel_nhwc_relaxed(Model * model)35 void CreateModel_nhwc_relaxed(Model *model) {
36 OperandType type0(Type::BOOL, {});
37 OperandType type1(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
38 OperandType type2(Type::TENSOR_INT32, {2, 2});
39 OperandType type3(Type::TENSOR_FLOAT32, {4, 1, 1, 2});
40 OperandType type4(Type::TENSOR_INT32, {2});
41 // Phase 1, operands
42 auto op1 = model->addOperand(&type1);
43 auto param = model->addOperand(&type4);
44 auto paddings = model->addOperand(&type2);
45 auto layout = model->addOperand(&type0);
46 auto op4 = model->addOperand(&type3);
47 // Phase 2, operations
48 static int32_t param_init[] = {2, 2};
49 model->setOperandValue(param, param_init, sizeof(int32_t) * 2);
50 static int32_t paddings_init[] = {0, 0, 0, 0};
51 model->setOperandValue(paddings, paddings_init, sizeof(int32_t) * 4);
52 static bool8 layout_init[] = {false};
53 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
54 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op1, param, paddings, layout}, {op4});
55 // Phase 3, inputs and outputs
56 model->identifyInputsAndOutputs(
57 {op1},
58 {op4});
59 // Phase 4: set relaxed execution
60 model->relaxComputationFloat32toFloat16(true);
61 assert(model->isValid());
62 }
63
is_ignored_nhwc_relaxed(int i)64 inline bool is_ignored_nhwc_relaxed(int i) {
65 static std::set<int> ignore = {};
66 return ignore.find(i) != ignore.end();
67 }
68
CreateModel_nhwc_float16(Model * model)69 void CreateModel_nhwc_float16(Model *model) {
70 OperandType type0(Type::BOOL, {});
71 OperandType type11(Type::TENSOR_FLOAT16, {1, 2, 2, 2});
72 OperandType type12(Type::TENSOR_FLOAT16, {4, 1, 1, 2});
73 OperandType type2(Type::TENSOR_INT32, {2, 2});
74 OperandType type4(Type::TENSOR_INT32, {2});
75 // Phase 1, operands
76 auto op1 = model->addOperand(&type11);
77 auto param = model->addOperand(&type4);
78 auto paddings = model->addOperand(&type2);
79 auto layout = model->addOperand(&type0);
80 auto op4 = model->addOperand(&type12);
81 // Phase 2, operations
82 static int32_t param_init[] = {2, 2};
83 model->setOperandValue(param, param_init, sizeof(int32_t) * 2);
84 static int32_t paddings_init[] = {0, 0, 0, 0};
85 model->setOperandValue(paddings, paddings_init, sizeof(int32_t) * 4);
86 static bool8 layout_init[] = {false};
87 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
88 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op1, param, paddings, layout}, {op4});
89 // Phase 3, inputs and outputs
90 model->identifyInputsAndOutputs(
91 {op1},
92 {op4});
93 assert(model->isValid());
94 }
95
is_ignored_nhwc_float16(int i)96 inline bool is_ignored_nhwc_float16(int i) {
97 static std::set<int> ignore = {};
98 return ignore.find(i) != ignore.end();
99 }
100
CreateModel_nhwc_quant8(Model * model)101 void CreateModel_nhwc_quant8(Model *model) {
102 OperandType type0(Type::BOOL, {});
103 OperandType type13(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.1f, 0);
104 OperandType type14(Type::TENSOR_QUANT8_ASYMM, {4, 1, 1, 2}, 0.1f, 0);
105 OperandType type2(Type::TENSOR_INT32, {2, 2});
106 OperandType type4(Type::TENSOR_INT32, {2});
107 // Phase 1, operands
108 auto op1 = model->addOperand(&type13);
109 auto param = model->addOperand(&type4);
110 auto paddings = model->addOperand(&type2);
111 auto layout = model->addOperand(&type0);
112 auto op4 = model->addOperand(&type14);
113 // Phase 2, operations
114 static int32_t param_init[] = {2, 2};
115 model->setOperandValue(param, param_init, sizeof(int32_t) * 2);
116 static int32_t paddings_init[] = {0, 0, 0, 0};
117 model->setOperandValue(paddings, paddings_init, sizeof(int32_t) * 4);
118 static bool8 layout_init[] = {false};
119 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
120 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op1, param, paddings, layout}, {op4});
121 // Phase 3, inputs and outputs
122 model->identifyInputsAndOutputs(
123 {op1},
124 {op4});
125 assert(model->isValid());
126 }
127
is_ignored_nhwc_quant8(int i)128 inline bool is_ignored_nhwc_quant8(int i) {
129 static std::set<int> ignore = {};
130 return ignore.find(i) != ignore.end();
131 }
132
CreateModel_nchw(Model * model)133 void CreateModel_nchw(Model *model) {
134 OperandType type0(Type::BOOL, {});
135 OperandType type1(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
136 OperandType type15(Type::TENSOR_FLOAT32, {4, 2, 1, 1});
137 OperandType type2(Type::TENSOR_INT32, {2, 2});
138 OperandType type4(Type::TENSOR_INT32, {2});
139 // Phase 1, operands
140 auto op1 = model->addOperand(&type1);
141 auto param = model->addOperand(&type4);
142 auto paddings = model->addOperand(&type2);
143 auto layout = model->addOperand(&type0);
144 auto op4 = model->addOperand(&type15);
145 // Phase 2, operations
146 static int32_t param_init[] = {2, 2};
147 model->setOperandValue(param, param_init, sizeof(int32_t) * 2);
148 static int32_t paddings_init[] = {0, 0, 0, 0};
149 model->setOperandValue(paddings, paddings_init, sizeof(int32_t) * 4);
150 static bool8 layout_init[] = {true};
151 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
152 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op1, param, paddings, layout}, {op4});
153 // Phase 3, inputs and outputs
154 model->identifyInputsAndOutputs(
155 {op1},
156 {op4});
157 assert(model->isValid());
158 }
159
is_ignored_nchw(int i)160 inline bool is_ignored_nchw(int i) {
161 static std::set<int> ignore = {};
162 return ignore.find(i) != ignore.end();
163 }
164
CreateModel_nchw_relaxed(Model * model)165 void CreateModel_nchw_relaxed(Model *model) {
166 OperandType type0(Type::BOOL, {});
167 OperandType type1(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
168 OperandType type15(Type::TENSOR_FLOAT32, {4, 2, 1, 1});
169 OperandType type2(Type::TENSOR_INT32, {2, 2});
170 OperandType type4(Type::TENSOR_INT32, {2});
171 // Phase 1, operands
172 auto op1 = model->addOperand(&type1);
173 auto param = model->addOperand(&type4);
174 auto paddings = model->addOperand(&type2);
175 auto layout = model->addOperand(&type0);
176 auto op4 = model->addOperand(&type15);
177 // Phase 2, operations
178 static int32_t param_init[] = {2, 2};
179 model->setOperandValue(param, param_init, sizeof(int32_t) * 2);
180 static int32_t paddings_init[] = {0, 0, 0, 0};
181 model->setOperandValue(paddings, paddings_init, sizeof(int32_t) * 4);
182 static bool8 layout_init[] = {true};
183 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
184 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op1, param, paddings, layout}, {op4});
185 // Phase 3, inputs and outputs
186 model->identifyInputsAndOutputs(
187 {op1},
188 {op4});
189 // Phase 4: set relaxed execution
190 model->relaxComputationFloat32toFloat16(true);
191 assert(model->isValid());
192 }
193
is_ignored_nchw_relaxed(int i)194 inline bool is_ignored_nchw_relaxed(int i) {
195 static std::set<int> ignore = {};
196 return ignore.find(i) != ignore.end();
197 }
198
CreateModel_nchw_float16(Model * model)199 void CreateModel_nchw_float16(Model *model) {
200 OperandType type0(Type::BOOL, {});
201 OperandType type11(Type::TENSOR_FLOAT16, {1, 2, 2, 2});
202 OperandType type16(Type::TENSOR_FLOAT16, {4, 2, 1, 1});
203 OperandType type2(Type::TENSOR_INT32, {2, 2});
204 OperandType type4(Type::TENSOR_INT32, {2});
205 // Phase 1, operands
206 auto op1 = model->addOperand(&type11);
207 auto param = model->addOperand(&type4);
208 auto paddings = model->addOperand(&type2);
209 auto layout = model->addOperand(&type0);
210 auto op4 = model->addOperand(&type16);
211 // Phase 2, operations
212 static int32_t param_init[] = {2, 2};
213 model->setOperandValue(param, param_init, sizeof(int32_t) * 2);
214 static int32_t paddings_init[] = {0, 0, 0, 0};
215 model->setOperandValue(paddings, paddings_init, sizeof(int32_t) * 4);
216 static bool8 layout_init[] = {true};
217 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
218 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op1, param, paddings, layout}, {op4});
219 // Phase 3, inputs and outputs
220 model->identifyInputsAndOutputs(
221 {op1},
222 {op4});
223 assert(model->isValid());
224 }
225
is_ignored_nchw_float16(int i)226 inline bool is_ignored_nchw_float16(int i) {
227 static std::set<int> ignore = {};
228 return ignore.find(i) != ignore.end();
229 }
230
CreateModel_nchw_quant8(Model * model)231 void CreateModel_nchw_quant8(Model *model) {
232 OperandType type0(Type::BOOL, {});
233 OperandType type13(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.1f, 0);
234 OperandType type17(Type::TENSOR_QUANT8_ASYMM, {4, 2, 1, 1}, 0.1f, 0);
235 OperandType type2(Type::TENSOR_INT32, {2, 2});
236 OperandType type4(Type::TENSOR_INT32, {2});
237 // Phase 1, operands
238 auto op1 = model->addOperand(&type13);
239 auto param = model->addOperand(&type4);
240 auto paddings = model->addOperand(&type2);
241 auto layout = model->addOperand(&type0);
242 auto op4 = model->addOperand(&type17);
243 // Phase 2, operations
244 static int32_t param_init[] = {2, 2};
245 model->setOperandValue(param, param_init, sizeof(int32_t) * 2);
246 static int32_t paddings_init[] = {0, 0, 0, 0};
247 model->setOperandValue(paddings, paddings_init, sizeof(int32_t) * 4);
248 static bool8 layout_init[] = {true};
249 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
250 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op1, param, paddings, layout}, {op4});
251 // Phase 3, inputs and outputs
252 model->identifyInputsAndOutputs(
253 {op1},
254 {op4});
255 assert(model->isValid());
256 }
257
is_ignored_nchw_quant8(int i)258 inline bool is_ignored_nchw_quant8(int i) {
259 static std::set<int> ignore = {};
260 return ignore.find(i) != ignore.end();
261 }
262
CreateModel_dynamic_output_shape_nhwc(Model * model)263 void CreateModel_dynamic_output_shape_nhwc(Model *model) {
264 OperandType type0(Type::BOOL, {});
265 OperandType type1(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
266 OperandType type18(Type::TENSOR_FLOAT32, {0, 0, 0, 0});
267 OperandType type2(Type::TENSOR_INT32, {2, 2});
268 OperandType type4(Type::TENSOR_INT32, {2});
269 // Phase 1, operands
270 auto op1 = model->addOperand(&type1);
271 auto param = model->addOperand(&type4);
272 auto paddings = model->addOperand(&type2);
273 auto layout = model->addOperand(&type0);
274 auto op4 = model->addOperand(&type18);
275 // Phase 2, operations
276 static int32_t param_init[] = {2, 2};
277 model->setOperandValue(param, param_init, sizeof(int32_t) * 2);
278 static int32_t paddings_init[] = {0, 0, 0, 0};
279 model->setOperandValue(paddings, paddings_init, sizeof(int32_t) * 4);
280 static bool8 layout_init[] = {false};
281 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
282 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op1, param, paddings, layout}, {op4});
283 // Phase 3, inputs and outputs
284 model->identifyInputsAndOutputs(
285 {op1},
286 {op4});
287 assert(model->isValid());
288 }
289
is_ignored_dynamic_output_shape_nhwc(int i)290 inline bool is_ignored_dynamic_output_shape_nhwc(int i) {
291 static std::set<int> ignore = {};
292 return ignore.find(i) != ignore.end();
293 }
294
CreateModel_dynamic_output_shape_nhwc_relaxed(Model * model)295 void CreateModel_dynamic_output_shape_nhwc_relaxed(Model *model) {
296 OperandType type0(Type::BOOL, {});
297 OperandType type1(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
298 OperandType type18(Type::TENSOR_FLOAT32, {0, 0, 0, 0});
299 OperandType type2(Type::TENSOR_INT32, {2, 2});
300 OperandType type4(Type::TENSOR_INT32, {2});
301 // Phase 1, operands
302 auto op1 = model->addOperand(&type1);
303 auto param = model->addOperand(&type4);
304 auto paddings = model->addOperand(&type2);
305 auto layout = model->addOperand(&type0);
306 auto op4 = model->addOperand(&type18);
307 // Phase 2, operations
308 static int32_t param_init[] = {2, 2};
309 model->setOperandValue(param, param_init, sizeof(int32_t) * 2);
310 static int32_t paddings_init[] = {0, 0, 0, 0};
311 model->setOperandValue(paddings, paddings_init, sizeof(int32_t) * 4);
312 static bool8 layout_init[] = {false};
313 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
314 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op1, param, paddings, layout}, {op4});
315 // Phase 3, inputs and outputs
316 model->identifyInputsAndOutputs(
317 {op1},
318 {op4});
319 // Phase 4: set relaxed execution
320 model->relaxComputationFloat32toFloat16(true);
321 assert(model->isValid());
322 }
323
is_ignored_dynamic_output_shape_nhwc_relaxed(int i)324 inline bool is_ignored_dynamic_output_shape_nhwc_relaxed(int i) {
325 static std::set<int> ignore = {};
326 return ignore.find(i) != ignore.end();
327 }
328
CreateModel_dynamic_output_shape_nhwc_float16(Model * model)329 void CreateModel_dynamic_output_shape_nhwc_float16(Model *model) {
330 OperandType type0(Type::BOOL, {});
331 OperandType type11(Type::TENSOR_FLOAT16, {1, 2, 2, 2});
332 OperandType type19(Type::TENSOR_FLOAT16, {0, 0, 0, 0});
333 OperandType type2(Type::TENSOR_INT32, {2, 2});
334 OperandType type4(Type::TENSOR_INT32, {2});
335 // Phase 1, operands
336 auto op1 = model->addOperand(&type11);
337 auto param = model->addOperand(&type4);
338 auto paddings = model->addOperand(&type2);
339 auto layout = model->addOperand(&type0);
340 auto op4 = model->addOperand(&type19);
341 // Phase 2, operations
342 static int32_t param_init[] = {2, 2};
343 model->setOperandValue(param, param_init, sizeof(int32_t) * 2);
344 static int32_t paddings_init[] = {0, 0, 0, 0};
345 model->setOperandValue(paddings, paddings_init, sizeof(int32_t) * 4);
346 static bool8 layout_init[] = {false};
347 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
348 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op1, param, paddings, layout}, {op4});
349 // Phase 3, inputs and outputs
350 model->identifyInputsAndOutputs(
351 {op1},
352 {op4});
353 assert(model->isValid());
354 }
355
is_ignored_dynamic_output_shape_nhwc_float16(int i)356 inline bool is_ignored_dynamic_output_shape_nhwc_float16(int i) {
357 static std::set<int> ignore = {};
358 return ignore.find(i) != ignore.end();
359 }
360
CreateModel_dynamic_output_shape_nhwc_quant8(Model * model)361 void CreateModel_dynamic_output_shape_nhwc_quant8(Model *model) {
362 OperandType type0(Type::BOOL, {});
363 OperandType type13(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.1f, 0);
364 OperandType type2(Type::TENSOR_INT32, {2, 2});
365 OperandType type20(Type::TENSOR_QUANT8_ASYMM, {0, 0, 0, 0}, 0.1f, 0);
366 OperandType type4(Type::TENSOR_INT32, {2});
367 // Phase 1, operands
368 auto op1 = model->addOperand(&type13);
369 auto param = model->addOperand(&type4);
370 auto paddings = model->addOperand(&type2);
371 auto layout = model->addOperand(&type0);
372 auto op4 = model->addOperand(&type20);
373 // Phase 2, operations
374 static int32_t param_init[] = {2, 2};
375 model->setOperandValue(param, param_init, sizeof(int32_t) * 2);
376 static int32_t paddings_init[] = {0, 0, 0, 0};
377 model->setOperandValue(paddings, paddings_init, sizeof(int32_t) * 4);
378 static bool8 layout_init[] = {false};
379 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
380 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op1, param, paddings, layout}, {op4});
381 // Phase 3, inputs and outputs
382 model->identifyInputsAndOutputs(
383 {op1},
384 {op4});
385 assert(model->isValid());
386 }
387
is_ignored_dynamic_output_shape_nhwc_quant8(int i)388 inline bool is_ignored_dynamic_output_shape_nhwc_quant8(int i) {
389 static std::set<int> ignore = {};
390 return ignore.find(i) != ignore.end();
391 }
392
CreateModel_dynamic_output_shape_nchw(Model * model)393 void CreateModel_dynamic_output_shape_nchw(Model *model) {
394 OperandType type0(Type::BOOL, {});
395 OperandType type1(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
396 OperandType type18(Type::TENSOR_FLOAT32, {0, 0, 0, 0});
397 OperandType type2(Type::TENSOR_INT32, {2, 2});
398 OperandType type4(Type::TENSOR_INT32, {2});
399 // Phase 1, operands
400 auto op1 = model->addOperand(&type1);
401 auto param = model->addOperand(&type4);
402 auto paddings = model->addOperand(&type2);
403 auto layout = model->addOperand(&type0);
404 auto op4 = model->addOperand(&type18);
405 // Phase 2, operations
406 static int32_t param_init[] = {2, 2};
407 model->setOperandValue(param, param_init, sizeof(int32_t) * 2);
408 static int32_t paddings_init[] = {0, 0, 0, 0};
409 model->setOperandValue(paddings, paddings_init, sizeof(int32_t) * 4);
410 static bool8 layout_init[] = {true};
411 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
412 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op1, param, paddings, layout}, {op4});
413 // Phase 3, inputs and outputs
414 model->identifyInputsAndOutputs(
415 {op1},
416 {op4});
417 assert(model->isValid());
418 }
419
is_ignored_dynamic_output_shape_nchw(int i)420 inline bool is_ignored_dynamic_output_shape_nchw(int i) {
421 static std::set<int> ignore = {};
422 return ignore.find(i) != ignore.end();
423 }
424
CreateModel_dynamic_output_shape_nchw_relaxed(Model * model)425 void CreateModel_dynamic_output_shape_nchw_relaxed(Model *model) {
426 OperandType type0(Type::BOOL, {});
427 OperandType type1(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
428 OperandType type18(Type::TENSOR_FLOAT32, {0, 0, 0, 0});
429 OperandType type2(Type::TENSOR_INT32, {2, 2});
430 OperandType type4(Type::TENSOR_INT32, {2});
431 // Phase 1, operands
432 auto op1 = model->addOperand(&type1);
433 auto param = model->addOperand(&type4);
434 auto paddings = model->addOperand(&type2);
435 auto layout = model->addOperand(&type0);
436 auto op4 = model->addOperand(&type18);
437 // Phase 2, operations
438 static int32_t param_init[] = {2, 2};
439 model->setOperandValue(param, param_init, sizeof(int32_t) * 2);
440 static int32_t paddings_init[] = {0, 0, 0, 0};
441 model->setOperandValue(paddings, paddings_init, sizeof(int32_t) * 4);
442 static bool8 layout_init[] = {true};
443 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
444 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op1, param, paddings, layout}, {op4});
445 // Phase 3, inputs and outputs
446 model->identifyInputsAndOutputs(
447 {op1},
448 {op4});
449 // Phase 4: set relaxed execution
450 model->relaxComputationFloat32toFloat16(true);
451 assert(model->isValid());
452 }
453
is_ignored_dynamic_output_shape_nchw_relaxed(int i)454 inline bool is_ignored_dynamic_output_shape_nchw_relaxed(int i) {
455 static std::set<int> ignore = {};
456 return ignore.find(i) != ignore.end();
457 }
458
CreateModel_dynamic_output_shape_nchw_float16(Model * model)459 void CreateModel_dynamic_output_shape_nchw_float16(Model *model) {
460 OperandType type0(Type::BOOL, {});
461 OperandType type11(Type::TENSOR_FLOAT16, {1, 2, 2, 2});
462 OperandType type19(Type::TENSOR_FLOAT16, {0, 0, 0, 0});
463 OperandType type2(Type::TENSOR_INT32, {2, 2});
464 OperandType type4(Type::TENSOR_INT32, {2});
465 // Phase 1, operands
466 auto op1 = model->addOperand(&type11);
467 auto param = model->addOperand(&type4);
468 auto paddings = model->addOperand(&type2);
469 auto layout = model->addOperand(&type0);
470 auto op4 = model->addOperand(&type19);
471 // Phase 2, operations
472 static int32_t param_init[] = {2, 2};
473 model->setOperandValue(param, param_init, sizeof(int32_t) * 2);
474 static int32_t paddings_init[] = {0, 0, 0, 0};
475 model->setOperandValue(paddings, paddings_init, sizeof(int32_t) * 4);
476 static bool8 layout_init[] = {true};
477 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
478 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op1, param, paddings, layout}, {op4});
479 // Phase 3, inputs and outputs
480 model->identifyInputsAndOutputs(
481 {op1},
482 {op4});
483 assert(model->isValid());
484 }
485
is_ignored_dynamic_output_shape_nchw_float16(int i)486 inline bool is_ignored_dynamic_output_shape_nchw_float16(int i) {
487 static std::set<int> ignore = {};
488 return ignore.find(i) != ignore.end();
489 }
490
CreateModel_dynamic_output_shape_nchw_quant8(Model * model)491 void CreateModel_dynamic_output_shape_nchw_quant8(Model *model) {
492 OperandType type0(Type::BOOL, {});
493 OperandType type13(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.1f, 0);
494 OperandType type2(Type::TENSOR_INT32, {2, 2});
495 OperandType type20(Type::TENSOR_QUANT8_ASYMM, {0, 0, 0, 0}, 0.1f, 0);
496 OperandType type4(Type::TENSOR_INT32, {2});
497 // Phase 1, operands
498 auto op1 = model->addOperand(&type13);
499 auto param = model->addOperand(&type4);
500 auto paddings = model->addOperand(&type2);
501 auto layout = model->addOperand(&type0);
502 auto op4 = model->addOperand(&type20);
503 // Phase 2, operations
504 static int32_t param_init[] = {2, 2};
505 model->setOperandValue(param, param_init, sizeof(int32_t) * 2);
506 static int32_t paddings_init[] = {0, 0, 0, 0};
507 model->setOperandValue(paddings, paddings_init, sizeof(int32_t) * 4);
508 static bool8 layout_init[] = {true};
509 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
510 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op1, param, paddings, layout}, {op4});
511 // Phase 3, inputs and outputs
512 model->identifyInputsAndOutputs(
513 {op1},
514 {op4});
515 assert(model->isValid());
516 }
517
is_ignored_dynamic_output_shape_nchw_quant8(int i)518 inline bool is_ignored_dynamic_output_shape_nchw_quant8(int i) {
519 static std::set<int> ignore = {};
520 return ignore.find(i) != ignore.end();
521 }
522
CreateModel_nhwc_2(Model * model)523 void CreateModel_nhwc_2(Model *model) {
524 OperandType type0(Type::BOOL, {});
525 OperandType type2(Type::TENSOR_INT32, {2, 2});
526 OperandType type4(Type::TENSOR_INT32, {2});
527 OperandType type5(Type::TENSOR_FLOAT32, {1, 4, 4, 1});
528 OperandType type6(Type::TENSOR_FLOAT32, {4, 2, 2, 1});
529 // Phase 1, operands
530 auto op11 = model->addOperand(&type5);
531 auto param1 = model->addOperand(&type4);
532 auto paddings = model->addOperand(&type2);
533 auto layout = model->addOperand(&type0);
534 auto op41 = model->addOperand(&type6);
535 // Phase 2, operations
536 static int32_t param1_init[] = {2, 2};
537 model->setOperandValue(param1, param1_init, sizeof(int32_t) * 2);
538 static int32_t paddings_init[] = {0, 0, 0, 0};
539 model->setOperandValue(paddings, paddings_init, sizeof(int32_t) * 4);
540 static bool8 layout_init[] = {false};
541 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
542 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op11, param1, paddings, layout}, {op41});
543 // Phase 3, inputs and outputs
544 model->identifyInputsAndOutputs(
545 {op11},
546 {op41});
547 assert(model->isValid());
548 }
549
is_ignored_nhwc_2(int i)550 inline bool is_ignored_nhwc_2(int i) {
551 static std::set<int> ignore = {};
552 return ignore.find(i) != ignore.end();
553 }
554
CreateModel_nhwc_relaxed_2(Model * model)555 void CreateModel_nhwc_relaxed_2(Model *model) {
556 OperandType type0(Type::BOOL, {});
557 OperandType type2(Type::TENSOR_INT32, {2, 2});
558 OperandType type4(Type::TENSOR_INT32, {2});
559 OperandType type5(Type::TENSOR_FLOAT32, {1, 4, 4, 1});
560 OperandType type6(Type::TENSOR_FLOAT32, {4, 2, 2, 1});
561 // Phase 1, operands
562 auto op11 = model->addOperand(&type5);
563 auto param1 = model->addOperand(&type4);
564 auto paddings = model->addOperand(&type2);
565 auto layout = model->addOperand(&type0);
566 auto op41 = model->addOperand(&type6);
567 // Phase 2, operations
568 static int32_t param1_init[] = {2, 2};
569 model->setOperandValue(param1, param1_init, sizeof(int32_t) * 2);
570 static int32_t paddings_init[] = {0, 0, 0, 0};
571 model->setOperandValue(paddings, paddings_init, sizeof(int32_t) * 4);
572 static bool8 layout_init[] = {false};
573 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
574 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op11, param1, paddings, layout}, {op41});
575 // Phase 3, inputs and outputs
576 model->identifyInputsAndOutputs(
577 {op11},
578 {op41});
579 // Phase 4: set relaxed execution
580 model->relaxComputationFloat32toFloat16(true);
581 assert(model->isValid());
582 }
583
is_ignored_nhwc_relaxed_2(int i)584 inline bool is_ignored_nhwc_relaxed_2(int i) {
585 static std::set<int> ignore = {};
586 return ignore.find(i) != ignore.end();
587 }
588
CreateModel_nhwc_float16_2(Model * model)589 void CreateModel_nhwc_float16_2(Model *model) {
590 OperandType type0(Type::BOOL, {});
591 OperandType type2(Type::TENSOR_INT32, {2, 2});
592 OperandType type21(Type::TENSOR_FLOAT16, {1, 4, 4, 1});
593 OperandType type22(Type::TENSOR_FLOAT16, {4, 2, 2, 1});
594 OperandType type4(Type::TENSOR_INT32, {2});
595 // Phase 1, operands
596 auto op11 = model->addOperand(&type21);
597 auto param1 = model->addOperand(&type4);
598 auto paddings = model->addOperand(&type2);
599 auto layout = model->addOperand(&type0);
600 auto op41 = model->addOperand(&type22);
601 // Phase 2, operations
602 static int32_t param1_init[] = {2, 2};
603 model->setOperandValue(param1, param1_init, sizeof(int32_t) * 2);
604 static int32_t paddings_init[] = {0, 0, 0, 0};
605 model->setOperandValue(paddings, paddings_init, sizeof(int32_t) * 4);
606 static bool8 layout_init[] = {false};
607 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
608 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op11, param1, paddings, layout}, {op41});
609 // Phase 3, inputs and outputs
610 model->identifyInputsAndOutputs(
611 {op11},
612 {op41});
613 assert(model->isValid());
614 }
615
is_ignored_nhwc_float16_2(int i)616 inline bool is_ignored_nhwc_float16_2(int i) {
617 static std::set<int> ignore = {};
618 return ignore.find(i) != ignore.end();
619 }
620
CreateModel_nhwc_quant8_2(Model * model)621 void CreateModel_nhwc_quant8_2(Model *model) {
622 OperandType type0(Type::BOOL, {});
623 OperandType type2(Type::TENSOR_INT32, {2, 2});
624 OperandType type23(Type::TENSOR_QUANT8_ASYMM, {1, 4, 4, 1}, 0.5f, 0);
625 OperandType type24(Type::TENSOR_QUANT8_ASYMM, {4, 2, 2, 1}, 0.5f, 0);
626 OperandType type4(Type::TENSOR_INT32, {2});
627 // Phase 1, operands
628 auto op11 = model->addOperand(&type23);
629 auto param1 = model->addOperand(&type4);
630 auto paddings = model->addOperand(&type2);
631 auto layout = model->addOperand(&type0);
632 auto op41 = model->addOperand(&type24);
633 // Phase 2, operations
634 static int32_t param1_init[] = {2, 2};
635 model->setOperandValue(param1, param1_init, sizeof(int32_t) * 2);
636 static int32_t paddings_init[] = {0, 0, 0, 0};
637 model->setOperandValue(paddings, paddings_init, sizeof(int32_t) * 4);
638 static bool8 layout_init[] = {false};
639 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
640 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op11, param1, paddings, layout}, {op41});
641 // Phase 3, inputs and outputs
642 model->identifyInputsAndOutputs(
643 {op11},
644 {op41});
645 assert(model->isValid());
646 }
647
is_ignored_nhwc_quant8_2(int i)648 inline bool is_ignored_nhwc_quant8_2(int i) {
649 static std::set<int> ignore = {};
650 return ignore.find(i) != ignore.end();
651 }
652
CreateModel_nchw_2(Model * model)653 void CreateModel_nchw_2(Model *model) {
654 OperandType type0(Type::BOOL, {});
655 OperandType type2(Type::TENSOR_INT32, {2, 2});
656 OperandType type25(Type::TENSOR_FLOAT32, {1, 1, 4, 4});
657 OperandType type26(Type::TENSOR_FLOAT32, {4, 1, 2, 2});
658 OperandType type4(Type::TENSOR_INT32, {2});
659 // Phase 1, operands
660 auto op11 = model->addOperand(&type25);
661 auto param1 = model->addOperand(&type4);
662 auto paddings = model->addOperand(&type2);
663 auto layout = model->addOperand(&type0);
664 auto op41 = model->addOperand(&type26);
665 // Phase 2, operations
666 static int32_t param1_init[] = {2, 2};
667 model->setOperandValue(param1, param1_init, sizeof(int32_t) * 2);
668 static int32_t paddings_init[] = {0, 0, 0, 0};
669 model->setOperandValue(paddings, paddings_init, sizeof(int32_t) * 4);
670 static bool8 layout_init[] = {true};
671 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
672 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op11, param1, paddings, layout}, {op41});
673 // Phase 3, inputs and outputs
674 model->identifyInputsAndOutputs(
675 {op11},
676 {op41});
677 assert(model->isValid());
678 }
679
is_ignored_nchw_2(int i)680 inline bool is_ignored_nchw_2(int i) {
681 static std::set<int> ignore = {};
682 return ignore.find(i) != ignore.end();
683 }
684
CreateModel_nchw_relaxed_2(Model * model)685 void CreateModel_nchw_relaxed_2(Model *model) {
686 OperandType type0(Type::BOOL, {});
687 OperandType type2(Type::TENSOR_INT32, {2, 2});
688 OperandType type25(Type::TENSOR_FLOAT32, {1, 1, 4, 4});
689 OperandType type26(Type::TENSOR_FLOAT32, {4, 1, 2, 2});
690 OperandType type4(Type::TENSOR_INT32, {2});
691 // Phase 1, operands
692 auto op11 = model->addOperand(&type25);
693 auto param1 = model->addOperand(&type4);
694 auto paddings = model->addOperand(&type2);
695 auto layout = model->addOperand(&type0);
696 auto op41 = model->addOperand(&type26);
697 // Phase 2, operations
698 static int32_t param1_init[] = {2, 2};
699 model->setOperandValue(param1, param1_init, sizeof(int32_t) * 2);
700 static int32_t paddings_init[] = {0, 0, 0, 0};
701 model->setOperandValue(paddings, paddings_init, sizeof(int32_t) * 4);
702 static bool8 layout_init[] = {true};
703 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
704 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op11, param1, paddings, layout}, {op41});
705 // Phase 3, inputs and outputs
706 model->identifyInputsAndOutputs(
707 {op11},
708 {op41});
709 // Phase 4: set relaxed execution
710 model->relaxComputationFloat32toFloat16(true);
711 assert(model->isValid());
712 }
713
is_ignored_nchw_relaxed_2(int i)714 inline bool is_ignored_nchw_relaxed_2(int i) {
715 static std::set<int> ignore = {};
716 return ignore.find(i) != ignore.end();
717 }
718
CreateModel_nchw_float16_2(Model * model)719 void CreateModel_nchw_float16_2(Model *model) {
720 OperandType type0(Type::BOOL, {});
721 OperandType type2(Type::TENSOR_INT32, {2, 2});
722 OperandType type27(Type::TENSOR_FLOAT16, {1, 1, 4, 4});
723 OperandType type28(Type::TENSOR_FLOAT16, {4, 1, 2, 2});
724 OperandType type4(Type::TENSOR_INT32, {2});
725 // Phase 1, operands
726 auto op11 = model->addOperand(&type27);
727 auto param1 = model->addOperand(&type4);
728 auto paddings = model->addOperand(&type2);
729 auto layout = model->addOperand(&type0);
730 auto op41 = model->addOperand(&type28);
731 // Phase 2, operations
732 static int32_t param1_init[] = {2, 2};
733 model->setOperandValue(param1, param1_init, sizeof(int32_t) * 2);
734 static int32_t paddings_init[] = {0, 0, 0, 0};
735 model->setOperandValue(paddings, paddings_init, sizeof(int32_t) * 4);
736 static bool8 layout_init[] = {true};
737 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
738 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op11, param1, paddings, layout}, {op41});
739 // Phase 3, inputs and outputs
740 model->identifyInputsAndOutputs(
741 {op11},
742 {op41});
743 assert(model->isValid());
744 }
745
is_ignored_nchw_float16_2(int i)746 inline bool is_ignored_nchw_float16_2(int i) {
747 static std::set<int> ignore = {};
748 return ignore.find(i) != ignore.end();
749 }
750
CreateModel_nchw_quant8_2(Model * model)751 void CreateModel_nchw_quant8_2(Model *model) {
752 OperandType type0(Type::BOOL, {});
753 OperandType type2(Type::TENSOR_INT32, {2, 2});
754 OperandType type29(Type::TENSOR_QUANT8_ASYMM, {1, 1, 4, 4}, 0.5f, 0);
755 OperandType type30(Type::TENSOR_QUANT8_ASYMM, {4, 1, 2, 2}, 0.5f, 0);
756 OperandType type4(Type::TENSOR_INT32, {2});
757 // Phase 1, operands
758 auto op11 = model->addOperand(&type29);
759 auto param1 = model->addOperand(&type4);
760 auto paddings = model->addOperand(&type2);
761 auto layout = model->addOperand(&type0);
762 auto op41 = model->addOperand(&type30);
763 // Phase 2, operations
764 static int32_t param1_init[] = {2, 2};
765 model->setOperandValue(param1, param1_init, sizeof(int32_t) * 2);
766 static int32_t paddings_init[] = {0, 0, 0, 0};
767 model->setOperandValue(paddings, paddings_init, sizeof(int32_t) * 4);
768 static bool8 layout_init[] = {true};
769 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
770 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op11, param1, paddings, layout}, {op41});
771 // Phase 3, inputs and outputs
772 model->identifyInputsAndOutputs(
773 {op11},
774 {op41});
775 assert(model->isValid());
776 }
777
is_ignored_nchw_quant8_2(int i)778 inline bool is_ignored_nchw_quant8_2(int i) {
779 static std::set<int> ignore = {};
780 return ignore.find(i) != ignore.end();
781 }
782
CreateModel_dynamic_output_shape_nhwc_2(Model * model)783 void CreateModel_dynamic_output_shape_nhwc_2(Model *model) {
784 OperandType type0(Type::BOOL, {});
785 OperandType type18(Type::TENSOR_FLOAT32, {0, 0, 0, 0});
786 OperandType type2(Type::TENSOR_INT32, {2, 2});
787 OperandType type4(Type::TENSOR_INT32, {2});
788 OperandType type5(Type::TENSOR_FLOAT32, {1, 4, 4, 1});
789 // Phase 1, operands
790 auto op11 = model->addOperand(&type5);
791 auto param1 = model->addOperand(&type4);
792 auto paddings = model->addOperand(&type2);
793 auto layout = model->addOperand(&type0);
794 auto op41 = model->addOperand(&type18);
795 // Phase 2, operations
796 static int32_t param1_init[] = {2, 2};
797 model->setOperandValue(param1, param1_init, sizeof(int32_t) * 2);
798 static int32_t paddings_init[] = {0, 0, 0, 0};
799 model->setOperandValue(paddings, paddings_init, sizeof(int32_t) * 4);
800 static bool8 layout_init[] = {false};
801 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
802 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op11, param1, paddings, layout}, {op41});
803 // Phase 3, inputs and outputs
804 model->identifyInputsAndOutputs(
805 {op11},
806 {op41});
807 assert(model->isValid());
808 }
809
is_ignored_dynamic_output_shape_nhwc_2(int i)810 inline bool is_ignored_dynamic_output_shape_nhwc_2(int i) {
811 static std::set<int> ignore = {};
812 return ignore.find(i) != ignore.end();
813 }
814
CreateModel_dynamic_output_shape_nhwc_relaxed_2(Model * model)815 void CreateModel_dynamic_output_shape_nhwc_relaxed_2(Model *model) {
816 OperandType type0(Type::BOOL, {});
817 OperandType type18(Type::TENSOR_FLOAT32, {0, 0, 0, 0});
818 OperandType type2(Type::TENSOR_INT32, {2, 2});
819 OperandType type4(Type::TENSOR_INT32, {2});
820 OperandType type5(Type::TENSOR_FLOAT32, {1, 4, 4, 1});
821 // Phase 1, operands
822 auto op11 = model->addOperand(&type5);
823 auto param1 = model->addOperand(&type4);
824 auto paddings = model->addOperand(&type2);
825 auto layout = model->addOperand(&type0);
826 auto op41 = model->addOperand(&type18);
827 // Phase 2, operations
828 static int32_t param1_init[] = {2, 2};
829 model->setOperandValue(param1, param1_init, sizeof(int32_t) * 2);
830 static int32_t paddings_init[] = {0, 0, 0, 0};
831 model->setOperandValue(paddings, paddings_init, sizeof(int32_t) * 4);
832 static bool8 layout_init[] = {false};
833 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
834 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op11, param1, paddings, layout}, {op41});
835 // Phase 3, inputs and outputs
836 model->identifyInputsAndOutputs(
837 {op11},
838 {op41});
839 // Phase 4: set relaxed execution
840 model->relaxComputationFloat32toFloat16(true);
841 assert(model->isValid());
842 }
843
is_ignored_dynamic_output_shape_nhwc_relaxed_2(int i)844 inline bool is_ignored_dynamic_output_shape_nhwc_relaxed_2(int i) {
845 static std::set<int> ignore = {};
846 return ignore.find(i) != ignore.end();
847 }
848
CreateModel_dynamic_output_shape_nhwc_float16_2(Model * model)849 void CreateModel_dynamic_output_shape_nhwc_float16_2(Model *model) {
850 OperandType type0(Type::BOOL, {});
851 OperandType type19(Type::TENSOR_FLOAT16, {0, 0, 0, 0});
852 OperandType type2(Type::TENSOR_INT32, {2, 2});
853 OperandType type21(Type::TENSOR_FLOAT16, {1, 4, 4, 1});
854 OperandType type4(Type::TENSOR_INT32, {2});
855 // Phase 1, operands
856 auto op11 = model->addOperand(&type21);
857 auto param1 = model->addOperand(&type4);
858 auto paddings = model->addOperand(&type2);
859 auto layout = model->addOperand(&type0);
860 auto op41 = model->addOperand(&type19);
861 // Phase 2, operations
862 static int32_t param1_init[] = {2, 2};
863 model->setOperandValue(param1, param1_init, sizeof(int32_t) * 2);
864 static int32_t paddings_init[] = {0, 0, 0, 0};
865 model->setOperandValue(paddings, paddings_init, sizeof(int32_t) * 4);
866 static bool8 layout_init[] = {false};
867 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
868 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op11, param1, paddings, layout}, {op41});
869 // Phase 3, inputs and outputs
870 model->identifyInputsAndOutputs(
871 {op11},
872 {op41});
873 assert(model->isValid());
874 }
875
is_ignored_dynamic_output_shape_nhwc_float16_2(int i)876 inline bool is_ignored_dynamic_output_shape_nhwc_float16_2(int i) {
877 static std::set<int> ignore = {};
878 return ignore.find(i) != ignore.end();
879 }
880
CreateModel_dynamic_output_shape_nhwc_quant8_2(Model * model)881 void CreateModel_dynamic_output_shape_nhwc_quant8_2(Model *model) {
882 OperandType type0(Type::BOOL, {});
883 OperandType type2(Type::TENSOR_INT32, {2, 2});
884 OperandType type23(Type::TENSOR_QUANT8_ASYMM, {1, 4, 4, 1}, 0.5f, 0);
885 OperandType type31(Type::TENSOR_QUANT8_ASYMM, {0, 0, 0, 0}, 0.5f, 0);
886 OperandType type4(Type::TENSOR_INT32, {2});
887 // Phase 1, operands
888 auto op11 = model->addOperand(&type23);
889 auto param1 = model->addOperand(&type4);
890 auto paddings = model->addOperand(&type2);
891 auto layout = model->addOperand(&type0);
892 auto op41 = model->addOperand(&type31);
893 // Phase 2, operations
894 static int32_t param1_init[] = {2, 2};
895 model->setOperandValue(param1, param1_init, sizeof(int32_t) * 2);
896 static int32_t paddings_init[] = {0, 0, 0, 0};
897 model->setOperandValue(paddings, paddings_init, sizeof(int32_t) * 4);
898 static bool8 layout_init[] = {false};
899 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
900 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op11, param1, paddings, layout}, {op41});
901 // Phase 3, inputs and outputs
902 model->identifyInputsAndOutputs(
903 {op11},
904 {op41});
905 assert(model->isValid());
906 }
907
is_ignored_dynamic_output_shape_nhwc_quant8_2(int i)908 inline bool is_ignored_dynamic_output_shape_nhwc_quant8_2(int i) {
909 static std::set<int> ignore = {};
910 return ignore.find(i) != ignore.end();
911 }
912
CreateModel_dynamic_output_shape_nchw_2(Model * model)913 void CreateModel_dynamic_output_shape_nchw_2(Model *model) {
914 OperandType type0(Type::BOOL, {});
915 OperandType type18(Type::TENSOR_FLOAT32, {0, 0, 0, 0});
916 OperandType type2(Type::TENSOR_INT32, {2, 2});
917 OperandType type25(Type::TENSOR_FLOAT32, {1, 1, 4, 4});
918 OperandType type4(Type::TENSOR_INT32, {2});
919 // Phase 1, operands
920 auto op11 = model->addOperand(&type25);
921 auto param1 = model->addOperand(&type4);
922 auto paddings = model->addOperand(&type2);
923 auto layout = model->addOperand(&type0);
924 auto op41 = model->addOperand(&type18);
925 // Phase 2, operations
926 static int32_t param1_init[] = {2, 2};
927 model->setOperandValue(param1, param1_init, sizeof(int32_t) * 2);
928 static int32_t paddings_init[] = {0, 0, 0, 0};
929 model->setOperandValue(paddings, paddings_init, sizeof(int32_t) * 4);
930 static bool8 layout_init[] = {true};
931 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
932 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op11, param1, paddings, layout}, {op41});
933 // Phase 3, inputs and outputs
934 model->identifyInputsAndOutputs(
935 {op11},
936 {op41});
937 assert(model->isValid());
938 }
939
is_ignored_dynamic_output_shape_nchw_2(int i)940 inline bool is_ignored_dynamic_output_shape_nchw_2(int i) {
941 static std::set<int> ignore = {};
942 return ignore.find(i) != ignore.end();
943 }
944
CreateModel_dynamic_output_shape_nchw_relaxed_2(Model * model)945 void CreateModel_dynamic_output_shape_nchw_relaxed_2(Model *model) {
946 OperandType type0(Type::BOOL, {});
947 OperandType type18(Type::TENSOR_FLOAT32, {0, 0, 0, 0});
948 OperandType type2(Type::TENSOR_INT32, {2, 2});
949 OperandType type25(Type::TENSOR_FLOAT32, {1, 1, 4, 4});
950 OperandType type4(Type::TENSOR_INT32, {2});
951 // Phase 1, operands
952 auto op11 = model->addOperand(&type25);
953 auto param1 = model->addOperand(&type4);
954 auto paddings = model->addOperand(&type2);
955 auto layout = model->addOperand(&type0);
956 auto op41 = model->addOperand(&type18);
957 // Phase 2, operations
958 static int32_t param1_init[] = {2, 2};
959 model->setOperandValue(param1, param1_init, sizeof(int32_t) * 2);
960 static int32_t paddings_init[] = {0, 0, 0, 0};
961 model->setOperandValue(paddings, paddings_init, sizeof(int32_t) * 4);
962 static bool8 layout_init[] = {true};
963 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
964 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op11, param1, paddings, layout}, {op41});
965 // Phase 3, inputs and outputs
966 model->identifyInputsAndOutputs(
967 {op11},
968 {op41});
969 // Phase 4: set relaxed execution
970 model->relaxComputationFloat32toFloat16(true);
971 assert(model->isValid());
972 }
973
is_ignored_dynamic_output_shape_nchw_relaxed_2(int i)974 inline bool is_ignored_dynamic_output_shape_nchw_relaxed_2(int i) {
975 static std::set<int> ignore = {};
976 return ignore.find(i) != ignore.end();
977 }
978
CreateModel_dynamic_output_shape_nchw_float16_2(Model * model)979 void CreateModel_dynamic_output_shape_nchw_float16_2(Model *model) {
980 OperandType type0(Type::BOOL, {});
981 OperandType type19(Type::TENSOR_FLOAT16, {0, 0, 0, 0});
982 OperandType type2(Type::TENSOR_INT32, {2, 2});
983 OperandType type27(Type::TENSOR_FLOAT16, {1, 1, 4, 4});
984 OperandType type4(Type::TENSOR_INT32, {2});
985 // Phase 1, operands
986 auto op11 = model->addOperand(&type27);
987 auto param1 = model->addOperand(&type4);
988 auto paddings = model->addOperand(&type2);
989 auto layout = model->addOperand(&type0);
990 auto op41 = model->addOperand(&type19);
991 // Phase 2, operations
992 static int32_t param1_init[] = {2, 2};
993 model->setOperandValue(param1, param1_init, sizeof(int32_t) * 2);
994 static int32_t paddings_init[] = {0, 0, 0, 0};
995 model->setOperandValue(paddings, paddings_init, sizeof(int32_t) * 4);
996 static bool8 layout_init[] = {true};
997 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
998 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op11, param1, paddings, layout}, {op41});
999 // Phase 3, inputs and outputs
1000 model->identifyInputsAndOutputs(
1001 {op11},
1002 {op41});
1003 assert(model->isValid());
1004 }
1005
is_ignored_dynamic_output_shape_nchw_float16_2(int i)1006 inline bool is_ignored_dynamic_output_shape_nchw_float16_2(int i) {
1007 static std::set<int> ignore = {};
1008 return ignore.find(i) != ignore.end();
1009 }
1010
CreateModel_dynamic_output_shape_nchw_quant8_2(Model * model)1011 void CreateModel_dynamic_output_shape_nchw_quant8_2(Model *model) {
1012 OperandType type0(Type::BOOL, {});
1013 OperandType type2(Type::TENSOR_INT32, {2, 2});
1014 OperandType type29(Type::TENSOR_QUANT8_ASYMM, {1, 1, 4, 4}, 0.5f, 0);
1015 OperandType type31(Type::TENSOR_QUANT8_ASYMM, {0, 0, 0, 0}, 0.5f, 0);
1016 OperandType type4(Type::TENSOR_INT32, {2});
1017 // Phase 1, operands
1018 auto op11 = model->addOperand(&type29);
1019 auto param1 = model->addOperand(&type4);
1020 auto paddings = model->addOperand(&type2);
1021 auto layout = model->addOperand(&type0);
1022 auto op41 = model->addOperand(&type31);
1023 // Phase 2, operations
1024 static int32_t param1_init[] = {2, 2};
1025 model->setOperandValue(param1, param1_init, sizeof(int32_t) * 2);
1026 static int32_t paddings_init[] = {0, 0, 0, 0};
1027 model->setOperandValue(paddings, paddings_init, sizeof(int32_t) * 4);
1028 static bool8 layout_init[] = {true};
1029 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
1030 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op11, param1, paddings, layout}, {op41});
1031 // Phase 3, inputs and outputs
1032 model->identifyInputsAndOutputs(
1033 {op11},
1034 {op41});
1035 assert(model->isValid());
1036 }
1037
is_ignored_dynamic_output_shape_nchw_quant8_2(int i)1038 inline bool is_ignored_dynamic_output_shape_nchw_quant8_2(int i) {
1039 static std::set<int> ignore = {};
1040 return ignore.find(i) != ignore.end();
1041 }
1042
CreateModel_nhwc_3(Model * model)1043 void CreateModel_nhwc_3(Model *model) {
1044 OperandType type0(Type::BOOL, {});
1045 OperandType type2(Type::TENSOR_INT32, {2, 2});
1046 OperandType type4(Type::TENSOR_INT32, {2});
1047 OperandType type7(Type::TENSOR_FLOAT32, {1, 5, 2, 1});
1048 OperandType type8(Type::TENSOR_FLOAT32, {6, 2, 2, 1});
1049 // Phase 1, operands
1050 auto op12 = model->addOperand(&type7);
1051 auto param2 = model->addOperand(&type4);
1052 auto paddings1 = model->addOperand(&type2);
1053 auto layout = model->addOperand(&type0);
1054 auto op42 = model->addOperand(&type8);
1055 // Phase 2, operations
1056 static int32_t param2_init[] = {3, 2};
1057 model->setOperandValue(param2, param2_init, sizeof(int32_t) * 2);
1058 static int32_t paddings1_init[] = {1, 0, 2, 0};
1059 model->setOperandValue(paddings1, paddings1_init, sizeof(int32_t) * 4);
1060 static bool8 layout_init[] = {false};
1061 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
1062 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op12, param2, paddings1, layout}, {op42});
1063 // Phase 3, inputs and outputs
1064 model->identifyInputsAndOutputs(
1065 {op12},
1066 {op42});
1067 assert(model->isValid());
1068 }
1069
is_ignored_nhwc_3(int i)1070 inline bool is_ignored_nhwc_3(int i) {
1071 static std::set<int> ignore = {};
1072 return ignore.find(i) != ignore.end();
1073 }
1074
CreateModel_nhwc_relaxed_3(Model * model)1075 void CreateModel_nhwc_relaxed_3(Model *model) {
1076 OperandType type0(Type::BOOL, {});
1077 OperandType type2(Type::TENSOR_INT32, {2, 2});
1078 OperandType type4(Type::TENSOR_INT32, {2});
1079 OperandType type7(Type::TENSOR_FLOAT32, {1, 5, 2, 1});
1080 OperandType type8(Type::TENSOR_FLOAT32, {6, 2, 2, 1});
1081 // Phase 1, operands
1082 auto op12 = model->addOperand(&type7);
1083 auto param2 = model->addOperand(&type4);
1084 auto paddings1 = model->addOperand(&type2);
1085 auto layout = model->addOperand(&type0);
1086 auto op42 = model->addOperand(&type8);
1087 // Phase 2, operations
1088 static int32_t param2_init[] = {3, 2};
1089 model->setOperandValue(param2, param2_init, sizeof(int32_t) * 2);
1090 static int32_t paddings1_init[] = {1, 0, 2, 0};
1091 model->setOperandValue(paddings1, paddings1_init, sizeof(int32_t) * 4);
1092 static bool8 layout_init[] = {false};
1093 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
1094 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op12, param2, paddings1, layout}, {op42});
1095 // Phase 3, inputs and outputs
1096 model->identifyInputsAndOutputs(
1097 {op12},
1098 {op42});
1099 // Phase 4: set relaxed execution
1100 model->relaxComputationFloat32toFloat16(true);
1101 assert(model->isValid());
1102 }
1103
is_ignored_nhwc_relaxed_3(int i)1104 inline bool is_ignored_nhwc_relaxed_3(int i) {
1105 static std::set<int> ignore = {};
1106 return ignore.find(i) != ignore.end();
1107 }
1108
CreateModel_nhwc_float16_3(Model * model)1109 void CreateModel_nhwc_float16_3(Model *model) {
1110 OperandType type0(Type::BOOL, {});
1111 OperandType type2(Type::TENSOR_INT32, {2, 2});
1112 OperandType type32(Type::TENSOR_FLOAT16, {1, 5, 2, 1});
1113 OperandType type33(Type::TENSOR_FLOAT16, {6, 2, 2, 1});
1114 OperandType type4(Type::TENSOR_INT32, {2});
1115 // Phase 1, operands
1116 auto op12 = model->addOperand(&type32);
1117 auto param2 = model->addOperand(&type4);
1118 auto paddings1 = model->addOperand(&type2);
1119 auto layout = model->addOperand(&type0);
1120 auto op42 = model->addOperand(&type33);
1121 // Phase 2, operations
1122 static int32_t param2_init[] = {3, 2};
1123 model->setOperandValue(param2, param2_init, sizeof(int32_t) * 2);
1124 static int32_t paddings1_init[] = {1, 0, 2, 0};
1125 model->setOperandValue(paddings1, paddings1_init, sizeof(int32_t) * 4);
1126 static bool8 layout_init[] = {false};
1127 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
1128 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op12, param2, paddings1, layout}, {op42});
1129 // Phase 3, inputs and outputs
1130 model->identifyInputsAndOutputs(
1131 {op12},
1132 {op42});
1133 assert(model->isValid());
1134 }
1135
is_ignored_nhwc_float16_3(int i)1136 inline bool is_ignored_nhwc_float16_3(int i) {
1137 static std::set<int> ignore = {};
1138 return ignore.find(i) != ignore.end();
1139 }
1140
CreateModel_nhwc_quant8_3(Model * model)1141 void CreateModel_nhwc_quant8_3(Model *model) {
1142 OperandType type0(Type::BOOL, {});
1143 OperandType type2(Type::TENSOR_INT32, {2, 2});
1144 OperandType type34(Type::TENSOR_QUANT8_ASYMM, {1, 5, 2, 1}, 0.5f, 128);
1145 OperandType type35(Type::TENSOR_QUANT8_ASYMM, {6, 2, 2, 1}, 0.5f, 128);
1146 OperandType type4(Type::TENSOR_INT32, {2});
1147 // Phase 1, operands
1148 auto op12 = model->addOperand(&type34);
1149 auto param2 = model->addOperand(&type4);
1150 auto paddings1 = model->addOperand(&type2);
1151 auto layout = model->addOperand(&type0);
1152 auto op42 = model->addOperand(&type35);
1153 // Phase 2, operations
1154 static int32_t param2_init[] = {3, 2};
1155 model->setOperandValue(param2, param2_init, sizeof(int32_t) * 2);
1156 static int32_t paddings1_init[] = {1, 0, 2, 0};
1157 model->setOperandValue(paddings1, paddings1_init, sizeof(int32_t) * 4);
1158 static bool8 layout_init[] = {false};
1159 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
1160 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op12, param2, paddings1, layout}, {op42});
1161 // Phase 3, inputs and outputs
1162 model->identifyInputsAndOutputs(
1163 {op12},
1164 {op42});
1165 assert(model->isValid());
1166 }
1167
is_ignored_nhwc_quant8_3(int i)1168 inline bool is_ignored_nhwc_quant8_3(int i) {
1169 static std::set<int> ignore = {};
1170 return ignore.find(i) != ignore.end();
1171 }
1172
CreateModel_nchw_3(Model * model)1173 void CreateModel_nchw_3(Model *model) {
1174 OperandType type0(Type::BOOL, {});
1175 OperandType type2(Type::TENSOR_INT32, {2, 2});
1176 OperandType type36(Type::TENSOR_FLOAT32, {1, 1, 5, 2});
1177 OperandType type37(Type::TENSOR_FLOAT32, {6, 1, 2, 2});
1178 OperandType type4(Type::TENSOR_INT32, {2});
1179 // Phase 1, operands
1180 auto op12 = model->addOperand(&type36);
1181 auto param2 = model->addOperand(&type4);
1182 auto paddings1 = model->addOperand(&type2);
1183 auto layout = model->addOperand(&type0);
1184 auto op42 = model->addOperand(&type37);
1185 // Phase 2, operations
1186 static int32_t param2_init[] = {3, 2};
1187 model->setOperandValue(param2, param2_init, sizeof(int32_t) * 2);
1188 static int32_t paddings1_init[] = {1, 0, 2, 0};
1189 model->setOperandValue(paddings1, paddings1_init, sizeof(int32_t) * 4);
1190 static bool8 layout_init[] = {true};
1191 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
1192 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op12, param2, paddings1, layout}, {op42});
1193 // Phase 3, inputs and outputs
1194 model->identifyInputsAndOutputs(
1195 {op12},
1196 {op42});
1197 assert(model->isValid());
1198 }
1199
is_ignored_nchw_3(int i)1200 inline bool is_ignored_nchw_3(int i) {
1201 static std::set<int> ignore = {};
1202 return ignore.find(i) != ignore.end();
1203 }
1204
CreateModel_nchw_relaxed_3(Model * model)1205 void CreateModel_nchw_relaxed_3(Model *model) {
1206 OperandType type0(Type::BOOL, {});
1207 OperandType type2(Type::TENSOR_INT32, {2, 2});
1208 OperandType type36(Type::TENSOR_FLOAT32, {1, 1, 5, 2});
1209 OperandType type37(Type::TENSOR_FLOAT32, {6, 1, 2, 2});
1210 OperandType type4(Type::TENSOR_INT32, {2});
1211 // Phase 1, operands
1212 auto op12 = model->addOperand(&type36);
1213 auto param2 = model->addOperand(&type4);
1214 auto paddings1 = model->addOperand(&type2);
1215 auto layout = model->addOperand(&type0);
1216 auto op42 = model->addOperand(&type37);
1217 // Phase 2, operations
1218 static int32_t param2_init[] = {3, 2};
1219 model->setOperandValue(param2, param2_init, sizeof(int32_t) * 2);
1220 static int32_t paddings1_init[] = {1, 0, 2, 0};
1221 model->setOperandValue(paddings1, paddings1_init, sizeof(int32_t) * 4);
1222 static bool8 layout_init[] = {true};
1223 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
1224 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op12, param2, paddings1, layout}, {op42});
1225 // Phase 3, inputs and outputs
1226 model->identifyInputsAndOutputs(
1227 {op12},
1228 {op42});
1229 // Phase 4: set relaxed execution
1230 model->relaxComputationFloat32toFloat16(true);
1231 assert(model->isValid());
1232 }
1233
is_ignored_nchw_relaxed_3(int i)1234 inline bool is_ignored_nchw_relaxed_3(int i) {
1235 static std::set<int> ignore = {};
1236 return ignore.find(i) != ignore.end();
1237 }
1238
CreateModel_nchw_float16_3(Model * model)1239 void CreateModel_nchw_float16_3(Model *model) {
1240 OperandType type0(Type::BOOL, {});
1241 OperandType type2(Type::TENSOR_INT32, {2, 2});
1242 OperandType type38(Type::TENSOR_FLOAT16, {1, 1, 5, 2});
1243 OperandType type39(Type::TENSOR_FLOAT16, {6, 1, 2, 2});
1244 OperandType type4(Type::TENSOR_INT32, {2});
1245 // Phase 1, operands
1246 auto op12 = model->addOperand(&type38);
1247 auto param2 = model->addOperand(&type4);
1248 auto paddings1 = model->addOperand(&type2);
1249 auto layout = model->addOperand(&type0);
1250 auto op42 = model->addOperand(&type39);
1251 // Phase 2, operations
1252 static int32_t param2_init[] = {3, 2};
1253 model->setOperandValue(param2, param2_init, sizeof(int32_t) * 2);
1254 static int32_t paddings1_init[] = {1, 0, 2, 0};
1255 model->setOperandValue(paddings1, paddings1_init, sizeof(int32_t) * 4);
1256 static bool8 layout_init[] = {true};
1257 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
1258 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op12, param2, paddings1, layout}, {op42});
1259 // Phase 3, inputs and outputs
1260 model->identifyInputsAndOutputs(
1261 {op12},
1262 {op42});
1263 assert(model->isValid());
1264 }
1265
is_ignored_nchw_float16_3(int i)1266 inline bool is_ignored_nchw_float16_3(int i) {
1267 static std::set<int> ignore = {};
1268 return ignore.find(i) != ignore.end();
1269 }
1270
CreateModel_nchw_quant8_3(Model * model)1271 void CreateModel_nchw_quant8_3(Model *model) {
1272 OperandType type0(Type::BOOL, {});
1273 OperandType type2(Type::TENSOR_INT32, {2, 2});
1274 OperandType type4(Type::TENSOR_INT32, {2});
1275 OperandType type40(Type::TENSOR_QUANT8_ASYMM, {1, 1, 5, 2}, 0.5f, 128);
1276 OperandType type41(Type::TENSOR_QUANT8_ASYMM, {6, 1, 2, 2}, 0.5f, 128);
1277 // Phase 1, operands
1278 auto op12 = model->addOperand(&type40);
1279 auto param2 = model->addOperand(&type4);
1280 auto paddings1 = model->addOperand(&type2);
1281 auto layout = model->addOperand(&type0);
1282 auto op42 = model->addOperand(&type41);
1283 // Phase 2, operations
1284 static int32_t param2_init[] = {3, 2};
1285 model->setOperandValue(param2, param2_init, sizeof(int32_t) * 2);
1286 static int32_t paddings1_init[] = {1, 0, 2, 0};
1287 model->setOperandValue(paddings1, paddings1_init, sizeof(int32_t) * 4);
1288 static bool8 layout_init[] = {true};
1289 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
1290 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op12, param2, paddings1, layout}, {op42});
1291 // Phase 3, inputs and outputs
1292 model->identifyInputsAndOutputs(
1293 {op12},
1294 {op42});
1295 assert(model->isValid());
1296 }
1297
is_ignored_nchw_quant8_3(int i)1298 inline bool is_ignored_nchw_quant8_3(int i) {
1299 static std::set<int> ignore = {};
1300 return ignore.find(i) != ignore.end();
1301 }
1302
CreateModel_dynamic_output_shape_nhwc_3(Model * model)1303 void CreateModel_dynamic_output_shape_nhwc_3(Model *model) {
1304 OperandType type0(Type::BOOL, {});
1305 OperandType type18(Type::TENSOR_FLOAT32, {0, 0, 0, 0});
1306 OperandType type2(Type::TENSOR_INT32, {2, 2});
1307 OperandType type4(Type::TENSOR_INT32, {2});
1308 OperandType type7(Type::TENSOR_FLOAT32, {1, 5, 2, 1});
1309 // Phase 1, operands
1310 auto op12 = model->addOperand(&type7);
1311 auto param2 = model->addOperand(&type4);
1312 auto paddings1 = model->addOperand(&type2);
1313 auto layout = model->addOperand(&type0);
1314 auto op42 = model->addOperand(&type18);
1315 // Phase 2, operations
1316 static int32_t param2_init[] = {3, 2};
1317 model->setOperandValue(param2, param2_init, sizeof(int32_t) * 2);
1318 static int32_t paddings1_init[] = {1, 0, 2, 0};
1319 model->setOperandValue(paddings1, paddings1_init, sizeof(int32_t) * 4);
1320 static bool8 layout_init[] = {false};
1321 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
1322 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op12, param2, paddings1, layout}, {op42});
1323 // Phase 3, inputs and outputs
1324 model->identifyInputsAndOutputs(
1325 {op12},
1326 {op42});
1327 assert(model->isValid());
1328 }
1329
is_ignored_dynamic_output_shape_nhwc_3(int i)1330 inline bool is_ignored_dynamic_output_shape_nhwc_3(int i) {
1331 static std::set<int> ignore = {};
1332 return ignore.find(i) != ignore.end();
1333 }
1334
CreateModel_dynamic_output_shape_nhwc_relaxed_3(Model * model)1335 void CreateModel_dynamic_output_shape_nhwc_relaxed_3(Model *model) {
1336 OperandType type0(Type::BOOL, {});
1337 OperandType type18(Type::TENSOR_FLOAT32, {0, 0, 0, 0});
1338 OperandType type2(Type::TENSOR_INT32, {2, 2});
1339 OperandType type4(Type::TENSOR_INT32, {2});
1340 OperandType type7(Type::TENSOR_FLOAT32, {1, 5, 2, 1});
1341 // Phase 1, operands
1342 auto op12 = model->addOperand(&type7);
1343 auto param2 = model->addOperand(&type4);
1344 auto paddings1 = model->addOperand(&type2);
1345 auto layout = model->addOperand(&type0);
1346 auto op42 = model->addOperand(&type18);
1347 // Phase 2, operations
1348 static int32_t param2_init[] = {3, 2};
1349 model->setOperandValue(param2, param2_init, sizeof(int32_t) * 2);
1350 static int32_t paddings1_init[] = {1, 0, 2, 0};
1351 model->setOperandValue(paddings1, paddings1_init, sizeof(int32_t) * 4);
1352 static bool8 layout_init[] = {false};
1353 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
1354 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op12, param2, paddings1, layout}, {op42});
1355 // Phase 3, inputs and outputs
1356 model->identifyInputsAndOutputs(
1357 {op12},
1358 {op42});
1359 // Phase 4: set relaxed execution
1360 model->relaxComputationFloat32toFloat16(true);
1361 assert(model->isValid());
1362 }
1363
is_ignored_dynamic_output_shape_nhwc_relaxed_3(int i)1364 inline bool is_ignored_dynamic_output_shape_nhwc_relaxed_3(int i) {
1365 static std::set<int> ignore = {};
1366 return ignore.find(i) != ignore.end();
1367 }
1368
CreateModel_dynamic_output_shape_nhwc_float16_3(Model * model)1369 void CreateModel_dynamic_output_shape_nhwc_float16_3(Model *model) {
1370 OperandType type0(Type::BOOL, {});
1371 OperandType type19(Type::TENSOR_FLOAT16, {0, 0, 0, 0});
1372 OperandType type2(Type::TENSOR_INT32, {2, 2});
1373 OperandType type32(Type::TENSOR_FLOAT16, {1, 5, 2, 1});
1374 OperandType type4(Type::TENSOR_INT32, {2});
1375 // Phase 1, operands
1376 auto op12 = model->addOperand(&type32);
1377 auto param2 = model->addOperand(&type4);
1378 auto paddings1 = model->addOperand(&type2);
1379 auto layout = model->addOperand(&type0);
1380 auto op42 = model->addOperand(&type19);
1381 // Phase 2, operations
1382 static int32_t param2_init[] = {3, 2};
1383 model->setOperandValue(param2, param2_init, sizeof(int32_t) * 2);
1384 static int32_t paddings1_init[] = {1, 0, 2, 0};
1385 model->setOperandValue(paddings1, paddings1_init, sizeof(int32_t) * 4);
1386 static bool8 layout_init[] = {false};
1387 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
1388 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op12, param2, paddings1, layout}, {op42});
1389 // Phase 3, inputs and outputs
1390 model->identifyInputsAndOutputs(
1391 {op12},
1392 {op42});
1393 assert(model->isValid());
1394 }
1395
is_ignored_dynamic_output_shape_nhwc_float16_3(int i)1396 inline bool is_ignored_dynamic_output_shape_nhwc_float16_3(int i) {
1397 static std::set<int> ignore = {};
1398 return ignore.find(i) != ignore.end();
1399 }
1400
CreateModel_dynamic_output_shape_nhwc_quant8_3(Model * model)1401 void CreateModel_dynamic_output_shape_nhwc_quant8_3(Model *model) {
1402 OperandType type0(Type::BOOL, {});
1403 OperandType type2(Type::TENSOR_INT32, {2, 2});
1404 OperandType type34(Type::TENSOR_QUANT8_ASYMM, {1, 5, 2, 1}, 0.5f, 128);
1405 OperandType type4(Type::TENSOR_INT32, {2});
1406 OperandType type42(Type::TENSOR_QUANT8_ASYMM, {0, 0, 0, 0}, 0.5f, 128);
1407 // Phase 1, operands
1408 auto op12 = model->addOperand(&type34);
1409 auto param2 = model->addOperand(&type4);
1410 auto paddings1 = model->addOperand(&type2);
1411 auto layout = model->addOperand(&type0);
1412 auto op42 = model->addOperand(&type42);
1413 // Phase 2, operations
1414 static int32_t param2_init[] = {3, 2};
1415 model->setOperandValue(param2, param2_init, sizeof(int32_t) * 2);
1416 static int32_t paddings1_init[] = {1, 0, 2, 0};
1417 model->setOperandValue(paddings1, paddings1_init, sizeof(int32_t) * 4);
1418 static bool8 layout_init[] = {false};
1419 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
1420 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op12, param2, paddings1, layout}, {op42});
1421 // Phase 3, inputs and outputs
1422 model->identifyInputsAndOutputs(
1423 {op12},
1424 {op42});
1425 assert(model->isValid());
1426 }
1427
is_ignored_dynamic_output_shape_nhwc_quant8_3(int i)1428 inline bool is_ignored_dynamic_output_shape_nhwc_quant8_3(int i) {
1429 static std::set<int> ignore = {};
1430 return ignore.find(i) != ignore.end();
1431 }
1432
CreateModel_dynamic_output_shape_nchw_3(Model * model)1433 void CreateModel_dynamic_output_shape_nchw_3(Model *model) {
1434 OperandType type0(Type::BOOL, {});
1435 OperandType type18(Type::TENSOR_FLOAT32, {0, 0, 0, 0});
1436 OperandType type2(Type::TENSOR_INT32, {2, 2});
1437 OperandType type36(Type::TENSOR_FLOAT32, {1, 1, 5, 2});
1438 OperandType type4(Type::TENSOR_INT32, {2});
1439 // Phase 1, operands
1440 auto op12 = model->addOperand(&type36);
1441 auto param2 = model->addOperand(&type4);
1442 auto paddings1 = model->addOperand(&type2);
1443 auto layout = model->addOperand(&type0);
1444 auto op42 = model->addOperand(&type18);
1445 // Phase 2, operations
1446 static int32_t param2_init[] = {3, 2};
1447 model->setOperandValue(param2, param2_init, sizeof(int32_t) * 2);
1448 static int32_t paddings1_init[] = {1, 0, 2, 0};
1449 model->setOperandValue(paddings1, paddings1_init, sizeof(int32_t) * 4);
1450 static bool8 layout_init[] = {true};
1451 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
1452 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op12, param2, paddings1, layout}, {op42});
1453 // Phase 3, inputs and outputs
1454 model->identifyInputsAndOutputs(
1455 {op12},
1456 {op42});
1457 assert(model->isValid());
1458 }
1459
is_ignored_dynamic_output_shape_nchw_3(int i)1460 inline bool is_ignored_dynamic_output_shape_nchw_3(int i) {
1461 static std::set<int> ignore = {};
1462 return ignore.find(i) != ignore.end();
1463 }
1464
CreateModel_dynamic_output_shape_nchw_relaxed_3(Model * model)1465 void CreateModel_dynamic_output_shape_nchw_relaxed_3(Model *model) {
1466 OperandType type0(Type::BOOL, {});
1467 OperandType type18(Type::TENSOR_FLOAT32, {0, 0, 0, 0});
1468 OperandType type2(Type::TENSOR_INT32, {2, 2});
1469 OperandType type36(Type::TENSOR_FLOAT32, {1, 1, 5, 2});
1470 OperandType type4(Type::TENSOR_INT32, {2});
1471 // Phase 1, operands
1472 auto op12 = model->addOperand(&type36);
1473 auto param2 = model->addOperand(&type4);
1474 auto paddings1 = model->addOperand(&type2);
1475 auto layout = model->addOperand(&type0);
1476 auto op42 = model->addOperand(&type18);
1477 // Phase 2, operations
1478 static int32_t param2_init[] = {3, 2};
1479 model->setOperandValue(param2, param2_init, sizeof(int32_t) * 2);
1480 static int32_t paddings1_init[] = {1, 0, 2, 0};
1481 model->setOperandValue(paddings1, paddings1_init, sizeof(int32_t) * 4);
1482 static bool8 layout_init[] = {true};
1483 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
1484 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op12, param2, paddings1, layout}, {op42});
1485 // Phase 3, inputs and outputs
1486 model->identifyInputsAndOutputs(
1487 {op12},
1488 {op42});
1489 // Phase 4: set relaxed execution
1490 model->relaxComputationFloat32toFloat16(true);
1491 assert(model->isValid());
1492 }
1493
is_ignored_dynamic_output_shape_nchw_relaxed_3(int i)1494 inline bool is_ignored_dynamic_output_shape_nchw_relaxed_3(int i) {
1495 static std::set<int> ignore = {};
1496 return ignore.find(i) != ignore.end();
1497 }
1498
CreateModel_dynamic_output_shape_nchw_float16_3(Model * model)1499 void CreateModel_dynamic_output_shape_nchw_float16_3(Model *model) {
1500 OperandType type0(Type::BOOL, {});
1501 OperandType type19(Type::TENSOR_FLOAT16, {0, 0, 0, 0});
1502 OperandType type2(Type::TENSOR_INT32, {2, 2});
1503 OperandType type38(Type::TENSOR_FLOAT16, {1, 1, 5, 2});
1504 OperandType type4(Type::TENSOR_INT32, {2});
1505 // Phase 1, operands
1506 auto op12 = model->addOperand(&type38);
1507 auto param2 = model->addOperand(&type4);
1508 auto paddings1 = model->addOperand(&type2);
1509 auto layout = model->addOperand(&type0);
1510 auto op42 = model->addOperand(&type19);
1511 // Phase 2, operations
1512 static int32_t param2_init[] = {3, 2};
1513 model->setOperandValue(param2, param2_init, sizeof(int32_t) * 2);
1514 static int32_t paddings1_init[] = {1, 0, 2, 0};
1515 model->setOperandValue(paddings1, paddings1_init, sizeof(int32_t) * 4);
1516 static bool8 layout_init[] = {true};
1517 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
1518 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op12, param2, paddings1, layout}, {op42});
1519 // Phase 3, inputs and outputs
1520 model->identifyInputsAndOutputs(
1521 {op12},
1522 {op42});
1523 assert(model->isValid());
1524 }
1525
is_ignored_dynamic_output_shape_nchw_float16_3(int i)1526 inline bool is_ignored_dynamic_output_shape_nchw_float16_3(int i) {
1527 static std::set<int> ignore = {};
1528 return ignore.find(i) != ignore.end();
1529 }
1530
CreateModel_dynamic_output_shape_nchw_quant8_3(Model * model)1531 void CreateModel_dynamic_output_shape_nchw_quant8_3(Model *model) {
1532 OperandType type0(Type::BOOL, {});
1533 OperandType type2(Type::TENSOR_INT32, {2, 2});
1534 OperandType type4(Type::TENSOR_INT32, {2});
1535 OperandType type40(Type::TENSOR_QUANT8_ASYMM, {1, 1, 5, 2}, 0.5f, 128);
1536 OperandType type42(Type::TENSOR_QUANT8_ASYMM, {0, 0, 0, 0}, 0.5f, 128);
1537 // Phase 1, operands
1538 auto op12 = model->addOperand(&type40);
1539 auto param2 = model->addOperand(&type4);
1540 auto paddings1 = model->addOperand(&type2);
1541 auto layout = model->addOperand(&type0);
1542 auto op42 = model->addOperand(&type42);
1543 // Phase 2, operations
1544 static int32_t param2_init[] = {3, 2};
1545 model->setOperandValue(param2, param2_init, sizeof(int32_t) * 2);
1546 static int32_t paddings1_init[] = {1, 0, 2, 0};
1547 model->setOperandValue(paddings1, paddings1_init, sizeof(int32_t) * 4);
1548 static bool8 layout_init[] = {true};
1549 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
1550 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op12, param2, paddings1, layout}, {op42});
1551 // Phase 3, inputs and outputs
1552 model->identifyInputsAndOutputs(
1553 {op12},
1554 {op42});
1555 assert(model->isValid());
1556 }
1557
is_ignored_dynamic_output_shape_nchw_quant8_3(int i)1558 inline bool is_ignored_dynamic_output_shape_nchw_quant8_3(int i) {
1559 static std::set<int> ignore = {};
1560 return ignore.find(i) != ignore.end();
1561 }
1562
CreateModel_nhwc_4(Model * model)1563 void CreateModel_nhwc_4(Model *model) {
1564 OperandType type0(Type::BOOL, {});
1565 OperandType type10(Type::TENSOR_FLOAT32, {6, 2, 4, 1});
1566 OperandType type2(Type::TENSOR_INT32, {2, 2});
1567 OperandType type4(Type::TENSOR_INT32, {2});
1568 OperandType type9(Type::TENSOR_FLOAT32, {1, 4, 2, 1});
1569 // Phase 1, operands
1570 auto op13 = model->addOperand(&type9);
1571 auto param3 = model->addOperand(&type4);
1572 auto paddings2 = model->addOperand(&type2);
1573 auto layout = model->addOperand(&type0);
1574 auto op43 = model->addOperand(&type10);
1575 // Phase 2, operations
1576 static int32_t param3_init[] = {3, 2};
1577 model->setOperandValue(param3, param3_init, sizeof(int32_t) * 2);
1578 static int32_t paddings2_init[] = {1, 1, 2, 4};
1579 model->setOperandValue(paddings2, paddings2_init, sizeof(int32_t) * 4);
1580 static bool8 layout_init[] = {false};
1581 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
1582 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op13, param3, paddings2, layout}, {op43});
1583 // Phase 3, inputs and outputs
1584 model->identifyInputsAndOutputs(
1585 {op13},
1586 {op43});
1587 assert(model->isValid());
1588 }
1589
is_ignored_nhwc_4(int i)1590 inline bool is_ignored_nhwc_4(int i) {
1591 static std::set<int> ignore = {};
1592 return ignore.find(i) != ignore.end();
1593 }
1594
CreateModel_nhwc_relaxed_4(Model * model)1595 void CreateModel_nhwc_relaxed_4(Model *model) {
1596 OperandType type0(Type::BOOL, {});
1597 OperandType type10(Type::TENSOR_FLOAT32, {6, 2, 4, 1});
1598 OperandType type2(Type::TENSOR_INT32, {2, 2});
1599 OperandType type4(Type::TENSOR_INT32, {2});
1600 OperandType type9(Type::TENSOR_FLOAT32, {1, 4, 2, 1});
1601 // Phase 1, operands
1602 auto op13 = model->addOperand(&type9);
1603 auto param3 = model->addOperand(&type4);
1604 auto paddings2 = model->addOperand(&type2);
1605 auto layout = model->addOperand(&type0);
1606 auto op43 = model->addOperand(&type10);
1607 // Phase 2, operations
1608 static int32_t param3_init[] = {3, 2};
1609 model->setOperandValue(param3, param3_init, sizeof(int32_t) * 2);
1610 static int32_t paddings2_init[] = {1, 1, 2, 4};
1611 model->setOperandValue(paddings2, paddings2_init, sizeof(int32_t) * 4);
1612 static bool8 layout_init[] = {false};
1613 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
1614 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op13, param3, paddings2, layout}, {op43});
1615 // Phase 3, inputs and outputs
1616 model->identifyInputsAndOutputs(
1617 {op13},
1618 {op43});
1619 // Phase 4: set relaxed execution
1620 model->relaxComputationFloat32toFloat16(true);
1621 assert(model->isValid());
1622 }
1623
is_ignored_nhwc_relaxed_4(int i)1624 inline bool is_ignored_nhwc_relaxed_4(int i) {
1625 static std::set<int> ignore = {};
1626 return ignore.find(i) != ignore.end();
1627 }
1628
CreateModel_nhwc_float16_4(Model * model)1629 void CreateModel_nhwc_float16_4(Model *model) {
1630 OperandType type0(Type::BOOL, {});
1631 OperandType type2(Type::TENSOR_INT32, {2, 2});
1632 OperandType type4(Type::TENSOR_INT32, {2});
1633 OperandType type43(Type::TENSOR_FLOAT16, {1, 4, 2, 1});
1634 OperandType type44(Type::TENSOR_FLOAT16, {6, 2, 4, 1});
1635 // Phase 1, operands
1636 auto op13 = model->addOperand(&type43);
1637 auto param3 = model->addOperand(&type4);
1638 auto paddings2 = model->addOperand(&type2);
1639 auto layout = model->addOperand(&type0);
1640 auto op43 = model->addOperand(&type44);
1641 // Phase 2, operations
1642 static int32_t param3_init[] = {3, 2};
1643 model->setOperandValue(param3, param3_init, sizeof(int32_t) * 2);
1644 static int32_t paddings2_init[] = {1, 1, 2, 4};
1645 model->setOperandValue(paddings2, paddings2_init, sizeof(int32_t) * 4);
1646 static bool8 layout_init[] = {false};
1647 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
1648 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op13, param3, paddings2, layout}, {op43});
1649 // Phase 3, inputs and outputs
1650 model->identifyInputsAndOutputs(
1651 {op13},
1652 {op43});
1653 assert(model->isValid());
1654 }
1655
is_ignored_nhwc_float16_4(int i)1656 inline bool is_ignored_nhwc_float16_4(int i) {
1657 static std::set<int> ignore = {};
1658 return ignore.find(i) != ignore.end();
1659 }
1660
CreateModel_nhwc_quant8_4(Model * model)1661 void CreateModel_nhwc_quant8_4(Model *model) {
1662 OperandType type0(Type::BOOL, {});
1663 OperandType type2(Type::TENSOR_INT32, {2, 2});
1664 OperandType type4(Type::TENSOR_INT32, {2});
1665 OperandType type45(Type::TENSOR_QUANT8_ASYMM, {1, 4, 2, 1}, 0.25f, 128);
1666 OperandType type46(Type::TENSOR_QUANT8_ASYMM, {6, 2, 4, 1}, 0.25f, 128);
1667 // Phase 1, operands
1668 auto op13 = model->addOperand(&type45);
1669 auto param3 = model->addOperand(&type4);
1670 auto paddings2 = model->addOperand(&type2);
1671 auto layout = model->addOperand(&type0);
1672 auto op43 = model->addOperand(&type46);
1673 // Phase 2, operations
1674 static int32_t param3_init[] = {3, 2};
1675 model->setOperandValue(param3, param3_init, sizeof(int32_t) * 2);
1676 static int32_t paddings2_init[] = {1, 1, 2, 4};
1677 model->setOperandValue(paddings2, paddings2_init, sizeof(int32_t) * 4);
1678 static bool8 layout_init[] = {false};
1679 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
1680 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op13, param3, paddings2, layout}, {op43});
1681 // Phase 3, inputs and outputs
1682 model->identifyInputsAndOutputs(
1683 {op13},
1684 {op43});
1685 assert(model->isValid());
1686 }
1687
is_ignored_nhwc_quant8_4(int i)1688 inline bool is_ignored_nhwc_quant8_4(int i) {
1689 static std::set<int> ignore = {};
1690 return ignore.find(i) != ignore.end();
1691 }
1692
CreateModel_nchw_4(Model * model)1693 void CreateModel_nchw_4(Model *model) {
1694 OperandType type0(Type::BOOL, {});
1695 OperandType type2(Type::TENSOR_INT32, {2, 2});
1696 OperandType type4(Type::TENSOR_INT32, {2});
1697 OperandType type47(Type::TENSOR_FLOAT32, {1, 1, 4, 2});
1698 OperandType type48(Type::TENSOR_FLOAT32, {6, 1, 2, 4});
1699 // Phase 1, operands
1700 auto op13 = model->addOperand(&type47);
1701 auto param3 = model->addOperand(&type4);
1702 auto paddings2 = model->addOperand(&type2);
1703 auto layout = model->addOperand(&type0);
1704 auto op43 = model->addOperand(&type48);
1705 // Phase 2, operations
1706 static int32_t param3_init[] = {3, 2};
1707 model->setOperandValue(param3, param3_init, sizeof(int32_t) * 2);
1708 static int32_t paddings2_init[] = {1, 1, 2, 4};
1709 model->setOperandValue(paddings2, paddings2_init, sizeof(int32_t) * 4);
1710 static bool8 layout_init[] = {true};
1711 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
1712 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op13, param3, paddings2, layout}, {op43});
1713 // Phase 3, inputs and outputs
1714 model->identifyInputsAndOutputs(
1715 {op13},
1716 {op43});
1717 assert(model->isValid());
1718 }
1719
is_ignored_nchw_4(int i)1720 inline bool is_ignored_nchw_4(int i) {
1721 static std::set<int> ignore = {};
1722 return ignore.find(i) != ignore.end();
1723 }
1724
CreateModel_nchw_relaxed_4(Model * model)1725 void CreateModel_nchw_relaxed_4(Model *model) {
1726 OperandType type0(Type::BOOL, {});
1727 OperandType type2(Type::TENSOR_INT32, {2, 2});
1728 OperandType type4(Type::TENSOR_INT32, {2});
1729 OperandType type47(Type::TENSOR_FLOAT32, {1, 1, 4, 2});
1730 OperandType type48(Type::TENSOR_FLOAT32, {6, 1, 2, 4});
1731 // Phase 1, operands
1732 auto op13 = model->addOperand(&type47);
1733 auto param3 = model->addOperand(&type4);
1734 auto paddings2 = model->addOperand(&type2);
1735 auto layout = model->addOperand(&type0);
1736 auto op43 = model->addOperand(&type48);
1737 // Phase 2, operations
1738 static int32_t param3_init[] = {3, 2};
1739 model->setOperandValue(param3, param3_init, sizeof(int32_t) * 2);
1740 static int32_t paddings2_init[] = {1, 1, 2, 4};
1741 model->setOperandValue(paddings2, paddings2_init, sizeof(int32_t) * 4);
1742 static bool8 layout_init[] = {true};
1743 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
1744 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op13, param3, paddings2, layout}, {op43});
1745 // Phase 3, inputs and outputs
1746 model->identifyInputsAndOutputs(
1747 {op13},
1748 {op43});
1749 // Phase 4: set relaxed execution
1750 model->relaxComputationFloat32toFloat16(true);
1751 assert(model->isValid());
1752 }
1753
is_ignored_nchw_relaxed_4(int i)1754 inline bool is_ignored_nchw_relaxed_4(int i) {
1755 static std::set<int> ignore = {};
1756 return ignore.find(i) != ignore.end();
1757 }
1758
CreateModel_nchw_float16_4(Model * model)1759 void CreateModel_nchw_float16_4(Model *model) {
1760 OperandType type0(Type::BOOL, {});
1761 OperandType type2(Type::TENSOR_INT32, {2, 2});
1762 OperandType type4(Type::TENSOR_INT32, {2});
1763 OperandType type49(Type::TENSOR_FLOAT16, {1, 1, 4, 2});
1764 OperandType type50(Type::TENSOR_FLOAT16, {6, 1, 2, 4});
1765 // Phase 1, operands
1766 auto op13 = model->addOperand(&type49);
1767 auto param3 = model->addOperand(&type4);
1768 auto paddings2 = model->addOperand(&type2);
1769 auto layout = model->addOperand(&type0);
1770 auto op43 = model->addOperand(&type50);
1771 // Phase 2, operations
1772 static int32_t param3_init[] = {3, 2};
1773 model->setOperandValue(param3, param3_init, sizeof(int32_t) * 2);
1774 static int32_t paddings2_init[] = {1, 1, 2, 4};
1775 model->setOperandValue(paddings2, paddings2_init, sizeof(int32_t) * 4);
1776 static bool8 layout_init[] = {true};
1777 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
1778 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op13, param3, paddings2, layout}, {op43});
1779 // Phase 3, inputs and outputs
1780 model->identifyInputsAndOutputs(
1781 {op13},
1782 {op43});
1783 assert(model->isValid());
1784 }
1785
is_ignored_nchw_float16_4(int i)1786 inline bool is_ignored_nchw_float16_4(int i) {
1787 static std::set<int> ignore = {};
1788 return ignore.find(i) != ignore.end();
1789 }
1790
CreateModel_nchw_quant8_4(Model * model)1791 void CreateModel_nchw_quant8_4(Model *model) {
1792 OperandType type0(Type::BOOL, {});
1793 OperandType type2(Type::TENSOR_INT32, {2, 2});
1794 OperandType type4(Type::TENSOR_INT32, {2});
1795 OperandType type51(Type::TENSOR_QUANT8_ASYMM, {1, 1, 4, 2}, 0.25f, 128);
1796 OperandType type52(Type::TENSOR_QUANT8_ASYMM, {6, 1, 2, 4}, 0.25f, 128);
1797 // Phase 1, operands
1798 auto op13 = model->addOperand(&type51);
1799 auto param3 = model->addOperand(&type4);
1800 auto paddings2 = model->addOperand(&type2);
1801 auto layout = model->addOperand(&type0);
1802 auto op43 = model->addOperand(&type52);
1803 // Phase 2, operations
1804 static int32_t param3_init[] = {3, 2};
1805 model->setOperandValue(param3, param3_init, sizeof(int32_t) * 2);
1806 static int32_t paddings2_init[] = {1, 1, 2, 4};
1807 model->setOperandValue(paddings2, paddings2_init, sizeof(int32_t) * 4);
1808 static bool8 layout_init[] = {true};
1809 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
1810 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op13, param3, paddings2, layout}, {op43});
1811 // Phase 3, inputs and outputs
1812 model->identifyInputsAndOutputs(
1813 {op13},
1814 {op43});
1815 assert(model->isValid());
1816 }
1817
is_ignored_nchw_quant8_4(int i)1818 inline bool is_ignored_nchw_quant8_4(int i) {
1819 static std::set<int> ignore = {};
1820 return ignore.find(i) != ignore.end();
1821 }
1822
CreateModel_dynamic_output_shape_nhwc_4(Model * model)1823 void CreateModel_dynamic_output_shape_nhwc_4(Model *model) {
1824 OperandType type0(Type::BOOL, {});
1825 OperandType type18(Type::TENSOR_FLOAT32, {0, 0, 0, 0});
1826 OperandType type2(Type::TENSOR_INT32, {2, 2});
1827 OperandType type4(Type::TENSOR_INT32, {2});
1828 OperandType type9(Type::TENSOR_FLOAT32, {1, 4, 2, 1});
1829 // Phase 1, operands
1830 auto op13 = model->addOperand(&type9);
1831 auto param3 = model->addOperand(&type4);
1832 auto paddings2 = model->addOperand(&type2);
1833 auto layout = model->addOperand(&type0);
1834 auto op43 = model->addOperand(&type18);
1835 // Phase 2, operations
1836 static int32_t param3_init[] = {3, 2};
1837 model->setOperandValue(param3, param3_init, sizeof(int32_t) * 2);
1838 static int32_t paddings2_init[] = {1, 1, 2, 4};
1839 model->setOperandValue(paddings2, paddings2_init, sizeof(int32_t) * 4);
1840 static bool8 layout_init[] = {false};
1841 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
1842 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op13, param3, paddings2, layout}, {op43});
1843 // Phase 3, inputs and outputs
1844 model->identifyInputsAndOutputs(
1845 {op13},
1846 {op43});
1847 assert(model->isValid());
1848 }
1849
is_ignored_dynamic_output_shape_nhwc_4(int i)1850 inline bool is_ignored_dynamic_output_shape_nhwc_4(int i) {
1851 static std::set<int> ignore = {};
1852 return ignore.find(i) != ignore.end();
1853 }
1854
CreateModel_dynamic_output_shape_nhwc_relaxed_4(Model * model)1855 void CreateModel_dynamic_output_shape_nhwc_relaxed_4(Model *model) {
1856 OperandType type0(Type::BOOL, {});
1857 OperandType type18(Type::TENSOR_FLOAT32, {0, 0, 0, 0});
1858 OperandType type2(Type::TENSOR_INT32, {2, 2});
1859 OperandType type4(Type::TENSOR_INT32, {2});
1860 OperandType type9(Type::TENSOR_FLOAT32, {1, 4, 2, 1});
1861 // Phase 1, operands
1862 auto op13 = model->addOperand(&type9);
1863 auto param3 = model->addOperand(&type4);
1864 auto paddings2 = model->addOperand(&type2);
1865 auto layout = model->addOperand(&type0);
1866 auto op43 = model->addOperand(&type18);
1867 // Phase 2, operations
1868 static int32_t param3_init[] = {3, 2};
1869 model->setOperandValue(param3, param3_init, sizeof(int32_t) * 2);
1870 static int32_t paddings2_init[] = {1, 1, 2, 4};
1871 model->setOperandValue(paddings2, paddings2_init, sizeof(int32_t) * 4);
1872 static bool8 layout_init[] = {false};
1873 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
1874 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op13, param3, paddings2, layout}, {op43});
1875 // Phase 3, inputs and outputs
1876 model->identifyInputsAndOutputs(
1877 {op13},
1878 {op43});
1879 // Phase 4: set relaxed execution
1880 model->relaxComputationFloat32toFloat16(true);
1881 assert(model->isValid());
1882 }
1883
is_ignored_dynamic_output_shape_nhwc_relaxed_4(int i)1884 inline bool is_ignored_dynamic_output_shape_nhwc_relaxed_4(int i) {
1885 static std::set<int> ignore = {};
1886 return ignore.find(i) != ignore.end();
1887 }
1888
CreateModel_dynamic_output_shape_nhwc_float16_4(Model * model)1889 void CreateModel_dynamic_output_shape_nhwc_float16_4(Model *model) {
1890 OperandType type0(Type::BOOL, {});
1891 OperandType type19(Type::TENSOR_FLOAT16, {0, 0, 0, 0});
1892 OperandType type2(Type::TENSOR_INT32, {2, 2});
1893 OperandType type4(Type::TENSOR_INT32, {2});
1894 OperandType type43(Type::TENSOR_FLOAT16, {1, 4, 2, 1});
1895 // Phase 1, operands
1896 auto op13 = model->addOperand(&type43);
1897 auto param3 = model->addOperand(&type4);
1898 auto paddings2 = model->addOperand(&type2);
1899 auto layout = model->addOperand(&type0);
1900 auto op43 = model->addOperand(&type19);
1901 // Phase 2, operations
1902 static int32_t param3_init[] = {3, 2};
1903 model->setOperandValue(param3, param3_init, sizeof(int32_t) * 2);
1904 static int32_t paddings2_init[] = {1, 1, 2, 4};
1905 model->setOperandValue(paddings2, paddings2_init, sizeof(int32_t) * 4);
1906 static bool8 layout_init[] = {false};
1907 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
1908 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op13, param3, paddings2, layout}, {op43});
1909 // Phase 3, inputs and outputs
1910 model->identifyInputsAndOutputs(
1911 {op13},
1912 {op43});
1913 assert(model->isValid());
1914 }
1915
is_ignored_dynamic_output_shape_nhwc_float16_4(int i)1916 inline bool is_ignored_dynamic_output_shape_nhwc_float16_4(int i) {
1917 static std::set<int> ignore = {};
1918 return ignore.find(i) != ignore.end();
1919 }
1920
CreateModel_dynamic_output_shape_nhwc_quant8_4(Model * model)1921 void CreateModel_dynamic_output_shape_nhwc_quant8_4(Model *model) {
1922 OperandType type0(Type::BOOL, {});
1923 OperandType type2(Type::TENSOR_INT32, {2, 2});
1924 OperandType type4(Type::TENSOR_INT32, {2});
1925 OperandType type45(Type::TENSOR_QUANT8_ASYMM, {1, 4, 2, 1}, 0.25f, 128);
1926 OperandType type53(Type::TENSOR_QUANT8_ASYMM, {0, 0, 0, 0}, 0.25f, 128);
1927 // Phase 1, operands
1928 auto op13 = model->addOperand(&type45);
1929 auto param3 = model->addOperand(&type4);
1930 auto paddings2 = model->addOperand(&type2);
1931 auto layout = model->addOperand(&type0);
1932 auto op43 = model->addOperand(&type53);
1933 // Phase 2, operations
1934 static int32_t param3_init[] = {3, 2};
1935 model->setOperandValue(param3, param3_init, sizeof(int32_t) * 2);
1936 static int32_t paddings2_init[] = {1, 1, 2, 4};
1937 model->setOperandValue(paddings2, paddings2_init, sizeof(int32_t) * 4);
1938 static bool8 layout_init[] = {false};
1939 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
1940 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op13, param3, paddings2, layout}, {op43});
1941 // Phase 3, inputs and outputs
1942 model->identifyInputsAndOutputs(
1943 {op13},
1944 {op43});
1945 assert(model->isValid());
1946 }
1947
is_ignored_dynamic_output_shape_nhwc_quant8_4(int i)1948 inline bool is_ignored_dynamic_output_shape_nhwc_quant8_4(int i) {
1949 static std::set<int> ignore = {};
1950 return ignore.find(i) != ignore.end();
1951 }
1952
CreateModel_dynamic_output_shape_nchw_4(Model * model)1953 void CreateModel_dynamic_output_shape_nchw_4(Model *model) {
1954 OperandType type0(Type::BOOL, {});
1955 OperandType type18(Type::TENSOR_FLOAT32, {0, 0, 0, 0});
1956 OperandType type2(Type::TENSOR_INT32, {2, 2});
1957 OperandType type4(Type::TENSOR_INT32, {2});
1958 OperandType type47(Type::TENSOR_FLOAT32, {1, 1, 4, 2});
1959 // Phase 1, operands
1960 auto op13 = model->addOperand(&type47);
1961 auto param3 = model->addOperand(&type4);
1962 auto paddings2 = model->addOperand(&type2);
1963 auto layout = model->addOperand(&type0);
1964 auto op43 = model->addOperand(&type18);
1965 // Phase 2, operations
1966 static int32_t param3_init[] = {3, 2};
1967 model->setOperandValue(param3, param3_init, sizeof(int32_t) * 2);
1968 static int32_t paddings2_init[] = {1, 1, 2, 4};
1969 model->setOperandValue(paddings2, paddings2_init, sizeof(int32_t) * 4);
1970 static bool8 layout_init[] = {true};
1971 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
1972 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op13, param3, paddings2, layout}, {op43});
1973 // Phase 3, inputs and outputs
1974 model->identifyInputsAndOutputs(
1975 {op13},
1976 {op43});
1977 assert(model->isValid());
1978 }
1979
is_ignored_dynamic_output_shape_nchw_4(int i)1980 inline bool is_ignored_dynamic_output_shape_nchw_4(int i) {
1981 static std::set<int> ignore = {};
1982 return ignore.find(i) != ignore.end();
1983 }
1984
CreateModel_dynamic_output_shape_nchw_relaxed_4(Model * model)1985 void CreateModel_dynamic_output_shape_nchw_relaxed_4(Model *model) {
1986 OperandType type0(Type::BOOL, {});
1987 OperandType type18(Type::TENSOR_FLOAT32, {0, 0, 0, 0});
1988 OperandType type2(Type::TENSOR_INT32, {2, 2});
1989 OperandType type4(Type::TENSOR_INT32, {2});
1990 OperandType type47(Type::TENSOR_FLOAT32, {1, 1, 4, 2});
1991 // Phase 1, operands
1992 auto op13 = model->addOperand(&type47);
1993 auto param3 = model->addOperand(&type4);
1994 auto paddings2 = model->addOperand(&type2);
1995 auto layout = model->addOperand(&type0);
1996 auto op43 = model->addOperand(&type18);
1997 // Phase 2, operations
1998 static int32_t param3_init[] = {3, 2};
1999 model->setOperandValue(param3, param3_init, sizeof(int32_t) * 2);
2000 static int32_t paddings2_init[] = {1, 1, 2, 4};
2001 model->setOperandValue(paddings2, paddings2_init, sizeof(int32_t) * 4);
2002 static bool8 layout_init[] = {true};
2003 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
2004 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op13, param3, paddings2, layout}, {op43});
2005 // Phase 3, inputs and outputs
2006 model->identifyInputsAndOutputs(
2007 {op13},
2008 {op43});
2009 // Phase 4: set relaxed execution
2010 model->relaxComputationFloat32toFloat16(true);
2011 assert(model->isValid());
2012 }
2013
is_ignored_dynamic_output_shape_nchw_relaxed_4(int i)2014 inline bool is_ignored_dynamic_output_shape_nchw_relaxed_4(int i) {
2015 static std::set<int> ignore = {};
2016 return ignore.find(i) != ignore.end();
2017 }
2018
CreateModel_dynamic_output_shape_nchw_float16_4(Model * model)2019 void CreateModel_dynamic_output_shape_nchw_float16_4(Model *model) {
2020 OperandType type0(Type::BOOL, {});
2021 OperandType type19(Type::TENSOR_FLOAT16, {0, 0, 0, 0});
2022 OperandType type2(Type::TENSOR_INT32, {2, 2});
2023 OperandType type4(Type::TENSOR_INT32, {2});
2024 OperandType type49(Type::TENSOR_FLOAT16, {1, 1, 4, 2});
2025 // Phase 1, operands
2026 auto op13 = model->addOperand(&type49);
2027 auto param3 = model->addOperand(&type4);
2028 auto paddings2 = model->addOperand(&type2);
2029 auto layout = model->addOperand(&type0);
2030 auto op43 = model->addOperand(&type19);
2031 // Phase 2, operations
2032 static int32_t param3_init[] = {3, 2};
2033 model->setOperandValue(param3, param3_init, sizeof(int32_t) * 2);
2034 static int32_t paddings2_init[] = {1, 1, 2, 4};
2035 model->setOperandValue(paddings2, paddings2_init, sizeof(int32_t) * 4);
2036 static bool8 layout_init[] = {true};
2037 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
2038 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op13, param3, paddings2, layout}, {op43});
2039 // Phase 3, inputs and outputs
2040 model->identifyInputsAndOutputs(
2041 {op13},
2042 {op43});
2043 assert(model->isValid());
2044 }
2045
is_ignored_dynamic_output_shape_nchw_float16_4(int i)2046 inline bool is_ignored_dynamic_output_shape_nchw_float16_4(int i) {
2047 static std::set<int> ignore = {};
2048 return ignore.find(i) != ignore.end();
2049 }
2050
CreateModel_dynamic_output_shape_nchw_quant8_4(Model * model)2051 void CreateModel_dynamic_output_shape_nchw_quant8_4(Model *model) {
2052 OperandType type0(Type::BOOL, {});
2053 OperandType type2(Type::TENSOR_INT32, {2, 2});
2054 OperandType type4(Type::TENSOR_INT32, {2});
2055 OperandType type51(Type::TENSOR_QUANT8_ASYMM, {1, 1, 4, 2}, 0.25f, 128);
2056 OperandType type53(Type::TENSOR_QUANT8_ASYMM, {0, 0, 0, 0}, 0.25f, 128);
2057 // Phase 1, operands
2058 auto op13 = model->addOperand(&type51);
2059 auto param3 = model->addOperand(&type4);
2060 auto paddings2 = model->addOperand(&type2);
2061 auto layout = model->addOperand(&type0);
2062 auto op43 = model->addOperand(&type53);
2063 // Phase 2, operations
2064 static int32_t param3_init[] = {3, 2};
2065 model->setOperandValue(param3, param3_init, sizeof(int32_t) * 2);
2066 static int32_t paddings2_init[] = {1, 1, 2, 4};
2067 model->setOperandValue(paddings2, paddings2_init, sizeof(int32_t) * 4);
2068 static bool8 layout_init[] = {true};
2069 model->setOperandValue(layout, layout_init, sizeof(bool8) * 1);
2070 model->addOperation(ANEURALNETWORKS_SPACE_TO_BATCH_ND, {op13, param3, paddings2, layout}, {op43});
2071 // Phase 3, inputs and outputs
2072 model->identifyInputsAndOutputs(
2073 {op13},
2074 {op43});
2075 assert(model->isValid());
2076 }
2077
is_ignored_dynamic_output_shape_nchw_quant8_4(int i)2078 inline bool is_ignored_dynamic_output_shape_nchw_quant8_4(int i) {
2079 static std::set<int> ignore = {};
2080 return ignore.find(i) != ignore.end();
2081 }
2082
2083