1# Copyright (C) 2016 Intel Corporation.   All Rights Reserved.
2#
3# Permission is hereby granted, free of charge, to any person obtaining a
4# copy of this software and associated documentation files (the "Software"),
5# to deal in the Software without restriction, including without limitation
6# the rights to use, copy, modify, merge, publish, distribute, sublicense,
7# and/or sell copies of the Software, and to permit persons to whom the
8# Software is furnished to do so, subject to the following conditions:
9#
10# The above copyright notice and this permission notice (including the next
11# paragraph) shall be included in all copies or substantial portions of the
12# Software.
13#
14# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
20# IN THE SOFTWARE.
21#
22# Provides definitions for events.
23
24enum GroupType
25{
26    APIClearRenderTarget,
27    APIDraw,
28    APIDrawWakeAllThreads,
29    APIDrawIndexed,
30    APIDispatch,
31    APIStoreTiles,
32    APIGetDrawContext,
33    APISync,
34    APIWaitForIdle,
35    FEProcessDraw,
36    FEProcessDrawIndexed,
37    FEFetchShader,
38    FEVertexShader,
39    FEHullShader,
40    FETessellation,
41    FEDomainShader,
42    FEGeometryShader,
43    FEStreamout,
44    FEPAAssemble,
45    FEBinPoints,
46    FEBinLines,
47    FEBinTriangles,
48    FETriangleSetup,
49    FEViewportCull,
50    FEGuardbandClip,
51    FEClipPoints,
52    FEClipLines,
53    FEClipTriangles,
54    FECullZeroAreaAndBackface,
55    FECullBetweenCenters,
56    FEProcessStoreTiles,
57    FEProcessInvalidateTiles,
58    WorkerWorkOnFifoBE,
59    WorkerFoundWork,
60    BELoadTiles,
61    BEDispatch,
62    BEClear,
63    BERasterizeLine,
64    BERasterizeTriangle,
65    BETriangleSetup,
66    BEStepSetup,
67    BECullZeroArea,
68    BEEmptyTriangle,
69    BETrivialAccept,
70    BETrivialReject,
71    BERasterizePartial,
72    BEPixelBackend,
73    BESetup,
74    BEBarycentric,
75    BEEarlyDepthTest,
76    BEPixelShader,
77    BESingleSampleBackend,
78    BEPixelRateBackend,
79    BESampleRateBackend,
80    BENullBackend,
81    BELateDepthTest,
82    BEOutputMerger,
83    BEStoreTiles,
84    BEEndTile,
85    WorkerWaitForThreadEvent,
86};
87
88event Start
89{
90    GroupType type;
91    uint32_t id;
92};
93
94event End
95{
96    GroupType type;
97    uint32_t count;
98};
99
100event ThreadStartApiEvent
101{
102};
103
104event ThreadStartWorkerEvent
105{
106};
107
108event DrawInstancedEvent
109{
110    uint32_t drawId;
111    uint32_t topology;
112    uint32_t numVertices;
113    int32_t  startVertex;
114    uint32_t numInstances;
115    uint32_t startInstance;
116};
117
118event DrawIndexedInstancedEvent
119{
120    uint32_t drawId;
121    uint32_t topology;
122    uint32_t numIndices;
123    int32_t  indexOffset;
124    int32_t  baseVertex;
125    uint32_t numInstances;
126    uint32_t startInstance;
127};
128
129event DispatchEvent
130{
131    uint32_t drawId;
132    uint32_t threadGroupCountX;
133    uint32_t threadGroupCountY;
134    uint32_t threadGroupCountZ;
135};
136
137event FrameEndEvent
138{
139    uint32_t frameId;
140    uint32_t nextDrawId;
141};
142
143///@brief API Stat: Split draw event for DrawInstanced. In certain cases, Rasty can split draws up into smaller draws.
144event DrawInstancedSplitEvent
145{
146    uint32_t drawId;
147};
148
149///@brief API Stat: Split draw event for DrawIndexedInstanced.
150event DrawIndexedInstancedSplitEvent
151{
152    uint32_t drawId;
153};
154
155///@brief API Stat: Synchonization event.
156event SwrSyncEvent
157{
158    uint32_t drawId;
159};
160
161///@brief API Stat: Invalidate hot tiles (i.e. tile cache)
162event SwrInvalidateTilesEvent
163{
164    uint32_t drawId;
165};
166
167///@brief API Stat: Invalidate and discard hot tiles within pixel region
168event SwrDiscardRectEvent
169{
170    uint32_t drawId;
171};
172
173///@brief API Stat: Flush tiles out to memory that is typically owned by driver (e.g. Flush RT cache)
174event SwrStoreTilesEvent
175{
176    uint32_t drawId;
177};
178
179event FrontendStatsEvent
180{
181    uint32_t drawId;
182    uint64_t IaVertices;
183    uint64_t IaPrimitives;
184    uint64_t VsInvocations;
185    uint64_t HsInvocations;
186    uint64_t DsInvocations;
187    uint64_t GsInvocations;
188    uint64_t GsPrimitives;
189    uint64_t CInvocations;
190    uint64_t CPrimitives;
191    uint64_t SoPrimStorageNeeded0;
192    uint64_t SoPrimStorageNeeded1;
193    uint64_t SoPrimStorageNeeded2;
194    uint64_t SoPrimStorageNeeded3;
195    uint64_t SoNumPrimsWritten0;
196    uint64_t SoNumPrimsWritten1;
197    uint64_t SoNumPrimsWritten2;
198    uint64_t SoNumPrimsWritten3;
199};
200
201event BackendStatsEvent
202{
203    uint32_t drawId;
204    uint64_t DepthPassCount;
205    uint64_t PsInvocations;
206    uint64_t CsInvocations;
207
208};
209
210event EarlyDepthStencilInfoSingleSample
211{
212    uint64_t depthPassMask;
213    uint64_t stencilPassMask;
214    uint64_t coverageMask;
215};
216
217event EarlyDepthStencilInfoSampleRate
218{
219    uint64_t depthPassMask;
220    uint64_t stencilPassMask;
221    uint64_t coverageMask;
222};
223
224event EarlyDepthStencilInfoNullPS
225{
226    uint64_t depthPassMask;
227    uint64_t stencilPassMask;
228    uint64_t coverageMask;
229};
230
231event LateDepthStencilInfoSingleSample
232{
233    uint64_t depthPassMask;
234    uint64_t stencilPassMask;
235    uint64_t coverageMask;
236};
237
238event LateDepthStencilInfoSampleRate
239{
240    uint64_t depthPassMask;
241    uint64_t stencilPassMask;
242    uint64_t coverageMask;
243};
244
245event LateDepthStencilInfoNullPS
246{
247    uint64_t depthPassMask;
248    uint64_t stencilPassMask;
249    uint64_t coverageMask;
250};
251
252event EarlyDepthInfoPixelRate
253{
254    uint64_t depthPassCount;
255    uint64_t activeLanes;
256};
257
258
259event LateDepthInfoPixelRate
260{
261    uint64_t depthPassCount;
262    uint64_t activeLanes;
263};
264
265
266event BackendDrawEndEvent
267{
268    uint32_t drawId;
269};
270
271event FrontendDrawEndEvent
272{
273    uint32_t drawId;
274};
275
276event EarlyZSingleSample
277{
278    uint32_t drawId;
279    uint64_t passCount;
280    uint64_t failCount;
281};
282
283event LateZSingleSample
284{
285    uint32_t drawId;
286    uint64_t passCount;
287    uint64_t failCount;
288};
289
290event EarlyStencilSingleSample
291{
292    uint32_t drawId;
293    uint64_t passCount;
294    uint64_t failCount;
295};
296
297event LateStencilSingleSample
298{
299    uint32_t drawId;
300    uint64_t passCount;
301    uint64_t failCount;
302};
303
304event EarlyZSampleRate
305{
306    uint32_t drawId;
307    uint64_t passCount;
308    uint64_t failCount;
309};
310
311event LateZSampleRate
312{
313    uint32_t drawId;
314    uint64_t passCount;
315    uint64_t failCount;
316};
317
318event EarlyStencilSampleRate
319{
320    uint32_t drawId;
321    uint64_t passCount;
322    uint64_t failCount;
323};
324
325event LateStencilSampleRate
326{
327    uint32_t drawId;
328    uint64_t passCount;
329    uint64_t failCount;
330};
331
332event EarlyZNullPS
333{
334    uint32_t drawId;
335    uint64_t passCount;
336    uint64_t failCount;
337};
338
339event EarlyStencilNullPS
340{
341    uint32_t drawId;
342    uint64_t passCount;
343    uint64_t failCount;
344};
345
346event EarlyZPixelRate
347{
348    uint32_t drawId;
349    uint64_t passCount;
350    uint64_t failCount;
351};
352
353event LateZPixelRate
354{
355    uint32_t drawId;
356    uint64_t passCount;
357    uint64_t failCount;
358};
359
360
361event EarlyOmZ
362{
363    uint32_t drawId;
364    uint64_t passCount;
365    uint64_t failCount;
366};
367
368event EarlyOmStencil
369{
370    uint32_t drawId;
371    uint64_t passCount;
372    uint64_t failCount;
373};
374
375event LateOmZ
376{
377    uint32_t drawId;
378    uint64_t passCount;
379    uint64_t failCount;
380};
381
382event LateOmStencil
383{
384    uint32_t drawId;
385    uint64_t passCount;
386    uint64_t failCount;
387};
388
389event GSPrimInfo
390{
391    uint64_t inputPrimCount;
392    uint64_t primGeneratedCount;
393    uint64_t vertsInput;
394};
395
396event GSInputPrims
397{
398    uint32_t drawId;
399    uint64_t inputPrimCount;
400};
401
402event GSPrimsGen
403{
404    uint32_t drawId;
405    uint64_t primGeneratedCount;
406};
407
408event GSVertsInput
409{
410    uint32_t drawId;
411    uint64_t vertsInput;
412};
413
414event ClipVertexCount
415{
416    uint64_t vertsPerPrim;
417    uint64_t primMask;
418};
419
420//REMOVE AND REPLACE
421event FlushVertClip
422{
423    uint32_t drawId;
424};
425
426event VertsClipped
427{
428    uint32_t drawId;
429    uint64_t clipCount;
430};
431
432event TessPrimCount
433{
434    uint64_t primCount;
435};
436
437//REMOVE AND REPLACE
438event TessPrimFlush
439{
440    uint32_t drawId;
441};
442
443event TessPrims
444{
445    uint32_t drawId;
446    uint64_t primCount;
447};
448