| /art/runtime/interpreter/mterp/mips64/ |
| D | main.S | 19 #define AT $$at /* assembler temp */ macro
207 sll AT, \reg, 7
208 daddu AT, rIBASE, AT
209 jic AT, 0
222 dlsa AT, \vreg, rFP, 2
223 lw \reg, 0(AT)
228 dlsa AT, \vreg, rFP, 2
229 lwu \reg, 0(AT)
234 dlsa AT, \vreg, rFP, 2
235 lwc1 \reg, 0(AT)
[all …]
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| /art/runtime/interpreter/mterp/mips/ |
| D | main.S | 85 #define AT $$at /* assembler temp */ macro
204 sll AT, rs, sa; \
205 addu rd, AT, rt; \
329 EAS2(AT, rFP, rix); \
330 l.s rd, (AT); \
342 sll AT, rix, 2; \
343 addu t8, rFP, AT; \
345 addu t8, rREFS, AT; \
359 sll AT, rix, 2; \
360 addu t8, rFP, AT; \
[all …]
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| /art/compiler/optimizing/ |
| D | code_generator_mips.cc | 653 DCHECK_NE(temp1_, AT); in EmitNativeCode()
711 Register tmp = AT; // Value in memory. in EmitNativeCode()
1164 __ MoveFromFpuHigh(AT, f1); in EmitSwap()
1168 __ Move(r2_h, AT); in EmitSwap()
1866 Register card = AT; in MarkGCCard()
1909 blocked_core_registers_[AT] = true; in SetupBlockedRegisters()
2344 __ Sltiu(AT, dst_low, low); in HandleBinaryOp()
2349 __ Sltu(AT, dst_low, TMP); in HandleBinaryOp()
2362 __ Addu(dst_high, dst_high, AT); in HandleBinaryOp()
2575 __ Nor(AT, ZERO, rhs_reg); in HandleShift()
[all …]
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| D | code_generator_mips64.cc | 609 DCHECK_NE(temp1_, AT); in EmitNativeCode()
663 GpuRegister tmp = AT; // Value in memory. in EmitNativeCode()
1249 GpuRegister gpr = AT; in MoveLocation()
1488 GpuRegister card = AT; in MarkGCCard()
1681 EmitPcRelativeAddressPlaceholderHigh(info_high, AT, info_low); in LoadBootImageAddress()
1682 __ Daddiu(reg, AT, /* imm16= */ 0x5678); in LoadBootImageAddress()
1686 EmitPcRelativeAddressPlaceholderHigh(info_high, AT, info_low); in LoadBootImageAddress()
1688 __ Lwu(reg, AT, /* imm16= */ 0x5678); in LoadBootImageAddress()
1712 EmitPcRelativeAddressPlaceholderHigh(info_high, AT, info_low); in AllocateInstanceForIntrinsic()
1713 __ Daddiu(argument, AT, /* imm16= */ 0x5678); in AllocateInstanceForIntrinsic()
[all …]
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| D | code_generator_vector_mips64.cc | 1335 __ Dlsa(AT, index_reg, base, scale); in VecAddress()
1337 __ Daddu(AT, base, index_reg); in VecAddress()
1339 *adjusted_base = AT; in VecAddress()
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| D | code_generator_vector_mips.cc | 1337 __ Lsa(AT, index_reg, base, scale); in VecAddress()
1339 __ Addu(AT, base, index_reg); in VecAddress()
1341 *adjusted_base = AT; in VecAddress()
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| /art/runtime/arch/mips/ |
| D | registers_mips.h | 29 AT = 1, // Assembler temporary. enumerator
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| D | callee_save_frame_mips.h | 58 (1 << art::mips::AT) | (1 << art::mips::V0) | (1 << art::mips::V1) |
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| /art/runtime/arch/mips64/ |
| D | registers_mips64.h | 29 AT = 1, // Assembler temporary. enumerator
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| D | callee_save_frame_mips64.h | 44 (1 << art::mips64::AT) | (1 << art::mips64::V0) | (1 << art::mips64::V1) |
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| /art/compiler/jni/quick/mips64/ |
| D | calling_convention_mips64.cc | 178 return Mips64ManagedRegister::FromGpuRegister(AT); in ReturnScratchRegister()
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| /art/compiler/jni/quick/mips/ |
| D | calling_convention_mips.cc | 334 return MipsManagedRegister::FromCoreRegister(AT); in ReturnScratchRegister()
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| /art/compiler/utils/mips/ |
| D | assembler_mips.h | 354 void ShiftAndAdd(Register dst, Register src_idx, Register src_base, int shamt, Register tmp = AT);
367 void AddUpper(Register rt, Register rs, uint16_t imm16, Register tmp = AT);
772 void Addiu32(Register rt, Register rs, int32_t value, Register rtmp = AT);
864 CHECK_NE(temp, AT); // Must not use AT as temp, so as not to overwrite the adjusted base.
875 temp = AT;
1018 CHECK_NE(reg, AT);
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| D | assembler_mips32r5_test.cc | 92 registers_.push_back(new mips::Register(mips::AT)); in SetUpHelpers()
125 secondary_register_names_.emplace(mips::Register(mips::AT), "at"); in SetUpHelpers()
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| D | assembler_mips32r6_test.cc | 105 registers_.push_back(new mips::Register(mips::AT)); in SetUpHelpers()
138 secondary_register_names_.emplace(mips::Register(mips::AT), "at"); in SetUpHelpers()
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| /art/compiler/utils/mips64/ |
| D | managed_register_mips64_test.cc | 39 reg = Mips64ManagedRegister::FromGpuRegister(AT); in TEST()
44 EXPECT_EQ(AT, reg.AsGpuRegister()); in TEST()
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