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Searched refs:F20 (Results 1 – 9 of 9) sorted by relevance

/art/runtime/arch/mips/
Dregisters_mips.h89 F20 = 20, enumerator
Dcallee_save_frame_mips.h71 (1 << art::mips::F20) | (1 << art::mips::F21) | (1 << art::mips::F22) | (1 << art::mips::F23) |
80 (1 << art::mips::F20) | (1 << art::mips::F21) | (1 << art::mips::F22) | (1 << art::mips::F23) |
/art/runtime/arch/mips64/
Dregisters_mips64.h90 F20 = 20, enumerator
Dcontext_mips64.cc106 fprs_[F20] = nullptr; in SmashCallerSaves()
Dcallee_save_frame_mips64.h69 (1 << art::mips64::F18) | (1 << art::mips64::F19) | (1 << art::mips64::F20) |
/art/compiler/utils/mips64/
Dmanaged_register_mips64_test.cc133 reg = Mips64ManagedRegister::FromFpuRegister(F20); in TEST()
140 EXPECT_EQ(F20, reg.AsFpuRegister()); in TEST()
142 EXPECT_TRUE(reg.Equals(Mips64ManagedRegister::FromFpuRegister(F20))); in TEST()
/art/compiler/optimizing/
Dcode_generator_mips.h59 { F20, F22, F24, F26, F28, F30 };
/art/compiler/utils/mips/
Dassembler_mips32r5_test.cc177 fp_registers_.push_back(new mips::FRegister(mips::F20)); in SetUpHelpers()
Dassembler_mips32r6_test.cc190 fp_registers_.push_back(new mips::FRegister(mips::F20)); in SetUpHelpers()