Searched refs:F31 (Results 1 – 8 of 8) sorted by relevance
| /art/compiler/utils/mips64/ |
| D | managed_register_mips64_test.cc | 144 reg = Mips64ManagedRegister::FromFpuRegister(F31); in TEST()
151 EXPECT_EQ(F31, reg.AsFpuRegister()); in TEST()
153 EXPECT_TRUE(reg.Equals(Mips64ManagedRegister::FromFpuRegister(F31))); in TEST()
244 EXPECT_FALSE(reg_F0.Equals(Mips64ManagedRegister::FromFpuRegister(F31))); in TEST()
247 Mips64ManagedRegister reg_F31 = Mips64ManagedRegister::FromFpuRegister(F31); in TEST()
254 EXPECT_TRUE(reg_F31.Equals(Mips64ManagedRegister::FromFpuRegister(F31))); in TEST()
291 EXPECT_FALSE(reg.Overlaps(Mips64ManagedRegister::FromFpuRegister(F31))); in TEST()
309 EXPECT_FALSE(reg.Overlaps(Mips64ManagedRegister::FromFpuRegister(F31))); in TEST()
327 EXPECT_FALSE(reg.Overlaps(Mips64ManagedRegister::FromFpuRegister(F31))); in TEST()
333 reg = Mips64ManagedRegister::FromFpuRegister(F31); in TEST()
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| /art/runtime/arch/mips/ |
| D | registers_mips.h | 100 F31 = 31, enumerator
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| D | callee_save_frame_mips.h | 73 (1 << art::mips::F28) | (1 << art::mips::F29) | (1 << art::mips::F30) | (1u << art::mips::F31);
82 (1 << art::mips::F28) | (1 << art::mips::F29) | (1 << art::mips::F30) | (1u << art::mips::F31);
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| /art/runtime/arch/mips64/ |
| D | registers_mips64.h | 101 F31 = 31, enumerator
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| D | callee_save_frame_mips64.h | 61 (1 << art::mips64::F30) | (1 << art::mips64::F31);
73 (1 << art::mips64::F30) | (1 << art::mips64::F31);
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| /art/compiler/optimizing/ |
| D | code_generator_mips64.h | 57 { F24, F25, F26, F27, F28, F29, F30, F31 };
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| /art/compiler/utils/mips/ |
| D | assembler_mips32r5_test.cc | 188 fp_registers_.push_back(new mips::FRegister(mips::F31)); in SetUpHelpers()
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| D | assembler_mips32r6_test.cc | 201 fp_registers_.push_back(new mips::FRegister(mips::F31)); in SetUpHelpers()
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