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Searched refs:Ldrb (Results 1 – 6 of 6) sorted by relevance

/art/compiler/utils/arm/
Dassembler_arm_vixl.cc335 ___ Ldrb(dest, MemOperand(base, offset)); in LoadFromOffset() local
Djni_macro_assembler_arm_vixl.cc706 ___ Ldrb(dst, MemOperand(base, offset)); in Load() local
/art/compiler/utils/arm64/
Djni_macro_assembler_arm64.cc225 ___ Ldrb(reg_w(dest), MEM_OP(reg_x(base), offset)); in LoadWFromOffset() local
266 ___ Ldrb(reg_w(dest.AsOverlappingWRegister()), MEM_OP(reg_x(base), offset)); in Load() local
/art/compiler/optimizing/
Dintrinsics_arm64.cc1361 __ Ldrb(temp4, MemOperand(temp1.X(), c_char_size, PostIndex)); in VisitStringCompareTo() local
2022 __ Ldrb(tmp1, MemOperand(src_ptr, c_char_size, PostIndex)); in VisitStringGetCharsNoCheck() local
3008 __ Ldrb(array_elem, MemOperand(ptr, 1, PostIndex)); in GenerateCodeForCalculationCRC32ValueOfBytes() local
3062 __ Ldrb(array_elem, MemOperand(ptr)); in GenerateCodeForCalculationCRC32ValueOfBytes() local
Dintrinsics_arm_vixl.cc1419 __ Ldrb(temp_reg, MemOperand(temp1, c_char_size, PostIndex)); in GenerateStringCompareToLoop() local
2891 __ Ldrb(temp, MemOperand(src_ptr, c_char_size, PostIndex)); in VisitStringGetCharsNoCheck() local
Dcode_generator_arm_vixl.cc5834 __ Ldrb(cond, RegisterFrom(out_loc), mem_address); in LoadFromShiftedRegOffset() local
6015 __ Ldrb(RegisterFrom(out_loc), MemOperand(temp, RegisterFrom(index), vixl32::LSL, 0)); in VisitArrayGet() local
9421 __ Ldrb(ip, ldr_address); // Load the LDR (register) byte with "00 | imm2 | Rm", in CompileBakerReadBarrierThunk() local