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Searched refs:Selnez (Results 1 – 4 of 4) sorted by relevance

/art/compiler/optimizing/
Dcode_generator_mips.cc4032 __ Selnez(out_high, AT, out_low); in DivRemByPowerOfTwo() local
4047 __ Selnez(out_high, AT, out_low); in DivRemByPowerOfTwo() local
4066 __ Selnez(AT, AT, TMP); in DivRemByPowerOfTwo() local
6384 __ Selnez(dst.AsRegister<Register>(), false_src.AsRegister<Register>(), cond_reg); in GenConditionalMoveR6() local
6392 __ Selnez(dst.AsRegister<Register>(), true_src.AsRegister<Register>(), cond_reg); in GenConditionalMoveR6() local
6398 __ Selnez(TMP, false_src.AsRegister<Register>(), cond_reg); in GenConditionalMoveR6() local
6400 __ Selnez(AT, true_src.AsRegister<Register>(), cond_reg); in GenConditionalMoveR6() local
6416 __ Selnez(dst_lo, src_lo, cond_reg); in GenConditionalMoveR6() local
6417 __ Selnez(dst_hi, src_hi, cond_reg); in GenConditionalMoveR6() local
6430 __ Selnez(dst_lo, src_lo, cond_reg); in GenConditionalMoveR6() local
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Dcode_generator_mips64.cc4715 __ Selnez(dst.AsRegister<GpuRegister>(), false_src.AsRegister<GpuRegister>(), cond_reg); in GenConditionalMove() local
4723 __ Selnez(dst.AsRegister<GpuRegister>(), true_src.AsRegister<GpuRegister>(), cond_reg); in GenConditionalMove() local
4729 __ Selnez(TMP, false_src.AsRegister<GpuRegister>(), cond_reg); in GenConditionalMove() local
4731 __ Selnez(AT, true_src.AsRegister<GpuRegister>(), cond_reg); in GenConditionalMove() local
6895 __ Selnez(AT, rhs, AT); in GenerateMinMaxInt() local
6897 __ Selnez(out, lhs, AT); in GenerateMinMaxInt() local
6904 __ Selnez(AT, lhs, AT); in GenerateMinMaxInt() local
6906 __ Selnez(out, rhs, AT); in GenerateMinMaxInt() local
/art/compiler/utils/mips/
Dassembler_mips32r6_test.cc504 TEST_F(AssemblerMIPS32r6Test, Selnez) { in TEST_F() argument
505 DriverStr(RepeatRRR(&mips::MipsAssembler::Selnez, "selnez ${reg1}, ${reg2}, ${reg3}"), "selnez"); in TEST_F()
Dassembler_mips.h332 void Selnez(Register rd, Register rs, Register rt); // R6