Searched refs:V0 (Results 1 – 15 of 15) sorted by relevance
| /art/compiler/jni/quick/mips64/ |
| D | calling_convention_mips64.cc | 81 return Mips64ManagedRegister::FromGpuRegister(V0); in ReturnRegisterForShorty()
94 return Mips64ManagedRegister::FromGpuRegister(V0); in IntReturnRegister()
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| /art/runtime/arch/mips/ |
| D | registers_mips.h | 30 V0 = 2, // Values. enumerator
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| D | context_mips.cc | 83 gprs_[V0] = const_cast<uint32_t*>(&gZero); in SmashCallerSaves()
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| D | callee_save_frame_mips.h | 58 (1 << art::mips::AT) | (1 << art::mips::V0) | (1 << art::mips::V1) |
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| /art/runtime/arch/mips64/ |
| D | registers_mips64.h | 30 V0 = 2, // Values. enumerator
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| D | context_mips64.cc | 74 gprs_[V0] = const_cast<uintptr_t*>(&gZero); in SmashCallerSaves()
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| D | callee_save_frame_mips64.h | 44 (1 << art::mips64::AT) | (1 << art::mips64::V0) | (1 << art::mips64::V1) |
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| /art/compiler/jni/quick/mips/ |
| D | calling_convention_mips.cc | 96 return MipsManagedRegister::FromCoreRegister(V0); in ReturnRegisterForShorty()
109 return MipsManagedRegister::FromCoreRegister(V0); in IntReturnRegister()
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| /art/compiler/utils/mips/ |
| D | assembler_mips32r6_test.cc | 106 registers_.push_back(new mips::Register(mips::V0)); in SetUpHelpers()
139 secondary_register_names_.emplace(mips::Register(mips::V0), "v0"); in SetUpHelpers()
1553 __ Lw(mips::V0, mips::A0, 0x5678, &patcher_label1); in TEST_F()
1560 __ Sw(mips::V0, mips::A0, 0x5678, &patcher_label2); in TEST_F()
1567 __ Addiu(mips::V0, mips::A0, 0x5678, &patcher_label3); in TEST_F()
1569 __ Lw(mips::V0, mips::A0, 0x5678, &patcher_label4); in TEST_F()
1571 __ Sw(mips::V0, mips::A0, 0x5678, &patcher_label5); in TEST_F()
1572 __ Bltc(mips::V0, mips::V1, &label2); in TEST_F()
1654 __ LoadLabelAddress(mips::V0, mips::ZERO, &label); in TEST_F()
1670 __ LoadLabelAddress(mips::V0, mips::ZERO, &label); in TEST_F()
[all …]
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| D | assembler_mips32r5_test.cc | 93 registers_.push_back(new mips::Register(mips::V0)); in SetUpHelpers()
126 secondary_register_names_.emplace(mips::Register(mips::V0), "v0"); in SetUpHelpers()
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| /art/compiler/optimizing/ |
| D | code_generator_mips.h | 121 ? Location::RegisterPairLocation(V0, V1) in GetReturnLocation()
122 : Location::RegisterLocation(V0); in GetReturnLocation()
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| D | code_generator_mips64.h | 118 return Location::RegisterLocation(V0); in GetReturnLocation()
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| D | code_generator_mips64.cc | 64 return Location::RegisterLocation(V0); in Mips64ReturnLocation()
518 DCHECK((V0 <= ref_reg && ref_reg <= T2) || in EmitNativeCode()
617 DCHECK((V0 <= ref_reg && ref_reg <= T2) || in EmitNativeCode()
1056 ScratchRegisterScope ensure_scratch(this, TMP, V0, codegen_->GetNumberOfCoreRegisters()); in Exchange()
5162 if (reg >= V0 && reg <= T2) { // 13 consequtive regs. in GetBakerMarkThunkNumber()
5163 return reg - V0; in GetBakerMarkThunkNumber()
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| D | code_generator_mips.cc | 64 return Location::RegisterLocation(V0); in MipsReturnLocation()
68 return Location::RegisterPairLocation(V0, V1); in MipsReturnLocation()
561 DCHECK((V0 <= ref_reg && ref_reg <= T7) || in EmitNativeCode()
661 DCHECK((V0 <= ref_reg && ref_reg <= T7) || in EmitNativeCode()
1235 ScratchRegisterScope ensure_scratch(this, TMP, V0, codegen_->GetNumberOfCoreRegisters()); in Exchange()
6990 if (reg >= V0 && reg <= T7) { // 14 consequtive regs. in GetBakerMarkThunkNumber()
6991 return reg - V0; in GetBakerMarkThunkNumber()
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| /art/compiler/utils/mips64/ |
| D | managed_register_mips64_test.cc | 46 reg = Mips64ManagedRegister::FromGpuRegister(V0); in TEST()
51 EXPECT_EQ(V0, reg.AsGpuRegister()); in TEST()
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