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Searched refs:architectures (Results 1 – 9 of 9) sorted by relevance

/art/test/807-method-handle-and-mr/
Dinfo.txt2 respect to Marking Register (on architectures supporting MR).
/art/test/419-long-parameter/
Dinfo.txt2 on 32bits architectures. The move to hard float ABI makes it so that the
/art/tools/dexfuzz/src/dexfuzz/fuzzers/
DFuzzer.java277 Architecture[] architectures = new Architecture[2]; in checkForArchitectureSplit() local
283 architectures[archIdx] = executorList.get(0).getArchitecture(); in checkForArchitectureSplit()
285 if (executorList.get(execIdx).getArchitecture() != architectures[archIdx]) { in checkForArchitectureSplit()
294 if (architectures[0] == architectures[1]) { in checkForArchitectureSplit()
/art/test/484-checker-register-hints/smali/
DSmali.smali28 # for some architectures (for example x86), as other architectures may
93 # for some architectures (for example x86), as other architectures may
/art/tools/checker/
DREADME80 For convenience, several architectures can be specified as set after the
82 thereby avoiding to repeat the check lines if some, but not all architectures
/art/tools/dexfuzz/
DREADME109 not included in the count. If multiple architectures are being used
110 (ARM/ARM64), and the divergences align with different architectures,
/art/runtime/interpreter/mterp/
DREADME.txt39 oversized handler. On architectures with fixed-width instructions this
/art/tools/jfuzz/
DREADME.md8 or using various target architectures. Any difference between the outputs
/art/runtime/
DAndroid.bp17 // Keep the __jit_debug_register_code symbol as a unique symbol during ICF for architectures where
294 // shared between the x86 and x86_64 architectures.