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Searched refs:ref_reg (Results 1 – 6 of 6) sorted by relevance

/art/dex2oat/linker/arm/
Drelative_patcher_thumb2_test.cc328 void TestBakerFieldWide(uint32_t offset, uint32_t ref_reg);
329 void TestBakerFieldNarrow(uint32_t offset, uint32_t ref_reg);
674 void Thumb2RelativePatcherTest::TestBakerFieldWide(uint32_t offset, uint32_t ref_reg) { in TestBakerFieldWide() argument
682 uint32_t ldr = kLdrWInsn | offset | (base_reg << 16) | (ref_reg << 12); in TestBakerFieldWide()
704 uint32_t ldr = kLdrWInsn | offset | (base_reg << 16) | (ref_reg << 12); in TestBakerFieldWide()
769 void Thumb2RelativePatcherTest::TestBakerFieldNarrow(uint32_t offset, uint32_t ref_reg) { in TestBakerFieldNarrow() argument
780 uint32_t ldr = kLdrInsn | (offset << (6 - 2)) | (base_reg << 3) | ref_reg; in TestBakerFieldNarrow()
805 uint32_t ldr = kLdrInsn | (offset << (6 - 2)) | (base_reg << 3) | ref_reg; in TestBakerFieldNarrow()
873 uint32_t ref_reg; in TEST_F() member
883 TestBakerFieldWide(test_case.offset, test_case.ref_reg); in TEST_F()
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/art/dex2oat/linker/arm64/
Drelative_patcher_arm64_test.cc558 void TestBakerField(uint32_t offset, uint32_t ref_reg);
1008 void Arm64RelativePatcherTest::TestBakerField(uint32_t offset, uint32_t ref_reg) { in TestBakerField() argument
1022 uint32_t ldr = kLdrWInsn | (offset << (10 - 2)) | (base_reg << 5) | ref_reg; in TestBakerField()
1044 uint32_t ldr = kLdrWInsn | (offset << (10 - 2)) | (base_reg << 5) | ref_reg; in TestBakerField()
1098 uint32_t ref_reg; in TEST_F() member
1107 TestBakerField(test_case.offset, test_case.ref_reg); in TEST_F()
1267 uint32_t ref_reg = (base_reg == 2) ? 3u : 2u; in TEST_F() local
1268 return kLdrWLsl2Insn | (index_reg << 16) | (base_reg << 5) | ref_reg; in TEST_F()
/art/compiler/optimizing/
Dcode_generator_mips64.cc497 GpuRegister ref_reg = ref_.AsRegister<GpuRegister>(); in EmitNativeCode() local
499 DCHECK(!locations->GetLiveRegisters()->ContainsCoreRegister(ref_reg)) << ref_reg; in EmitNativeCode()
518 DCHECK((V0 <= ref_reg && ref_reg <= T2) || in EmitNativeCode()
519 (S2 <= ref_reg && ref_reg <= S7) || in EmitNativeCode()
520 (ref_reg == S8)) << ref_reg; in EmitNativeCode()
542 Thread::ReadBarrierMarkEntryPointsOffset<kMips64PointerSize>(ref_reg - 1); in EmitNativeCode()
592 GpuRegister ref_reg = ref_.AsRegister<GpuRegister>(); in EmitNativeCode() local
594 DCHECK(!locations->GetLiveRegisters()->ContainsCoreRegister(ref_reg)) << ref_reg; in EmitNativeCode()
611 __ Move(temp1_, ref_reg); in EmitNativeCode()
617 DCHECK((V0 <= ref_reg && ref_reg <= T2) || in EmitNativeCode()
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Dcode_generator_mips.cc540 Register ref_reg = ref_.AsRegister<Register>(); in EmitNativeCode() local
542 DCHECK(!locations->GetLiveRegisters()->ContainsCoreRegister(ref_reg)) << ref_reg; in EmitNativeCode()
561 DCHECK((V0 <= ref_reg && ref_reg <= T7) || in EmitNativeCode()
562 (S2 <= ref_reg && ref_reg <= S7) || in EmitNativeCode()
563 (ref_reg == FP)) << ref_reg; in EmitNativeCode()
585 Thread::ReadBarrierMarkEntryPointsOffset<kMipsPointerSize>(ref_reg - 1); in EmitNativeCode()
636 Register ref_reg = ref_.AsRegister<Register>(); in EmitNativeCode() local
638 DCHECK(!locations->GetLiveRegisters()->ContainsCoreRegister(ref_reg)) << ref_reg; in EmitNativeCode()
655 __ Move(temp1_, ref_reg); in EmitNativeCode()
661 DCHECK((V0 <= ref_reg && ref_reg <= T7) || in EmitNativeCode()
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Dcode_generator_arm_vixl.cc8451 vixl32::Register ref_reg = RegisterFrom(ref, DataType::Type::kReference); in GenerateFieldLoadWithBakerReadBarrier() local
8452 bool narrow = CanEmitNarrowLdr(ref_reg, src.GetBaseRegister(), src.GetOffsetImmediate()); in GenerateFieldLoadWithBakerReadBarrier()
8473 __ ldr(EncodingSize(narrow ? Narrow : Wide), ref_reg, src); in GenerateFieldLoadWithBakerReadBarrier()
8481 __ rsbs(EncodingSize(Narrow), ref_reg, ref_reg, Operand(0)); in GenerateFieldLoadWithBakerReadBarrier()
8483 __ rsb(EncodingSize(Wide), ref_reg, ref_reg, Operand(0)); in GenerateFieldLoadWithBakerReadBarrier()
8549 vixl32::Register ref_reg = RegisterFrom(ref, DataType::Type::kReference); in GenerateArrayLoadWithBakerReadBarrier() local
8569 __ ldr(ref_reg, MemOperand(data_reg, index_reg, vixl32::LSL, scale_factor)); in GenerateArrayLoadWithBakerReadBarrier()
8573 __ rsb(EncodingSize(Wide), ref_reg, ref_reg, Operand(0)); in GenerateArrayLoadWithBakerReadBarrier()
/art/compiler/utils/arm64/
Djni_macro_assembler_arm64.cc307 WRegister ref_reg = dst.AsOverlappingWRegister(); in LoadRef() local
308 asm_.MaybeUnpoisonHeapReference(reg_w(ref_reg)); in LoadRef()