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Searched refs:reg1 (Results 1 – 8 of 8) sorted by relevance

/art/runtime/interpreter/mterp/arm64/
Dmain.S316 .macro SAVE_TWO_REGS reg1, reg2, offset
317 stp \reg1, \reg2, [sp, #(\offset)]
318 .cfi_rel_offset \reg1, (\offset)
325 .macro RESTORE_TWO_REGS reg1, reg2, offset
326 ldp \reg1, \reg2, [sp, #(\offset)]
327 .cfi_restore \reg1
334 .macro SAVE_TWO_REGS_INCREASE_FRAME reg1, reg2, frame_adjustment
335 stp \reg1, \reg2, [sp, #-(\frame_adjustment)]!
337 .cfi_rel_offset \reg1, 0
344 .macro RESTORE_TWO_REGS_DECREASE_FRAME reg1, reg2, frame_adjustment
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/art/compiler/utils/
Dassembler_test.h194 for (auto reg1 : reg1_registers) { variable
199 (assembler_.get()->*f)(*reg1, *reg2, new_imm * multiplier + bias);
203 std::string reg1_string = (this->*GetName1)(*reg1);
249 for (auto reg1 : reg1_registers) { in RepeatTemplatedRegistersImmBits() local
255 (assembler_.get()->*f)(*reg1, *reg2, *reg3, new_imm + bias); in RepeatTemplatedRegistersImmBits()
259 std::string reg1_string = (this->*GetName1)(*reg1); in RepeatTemplatedRegistersImmBits()
311 for (auto reg1 : reg1_registers) { in RepeatTemplatedImmBitsRegisters() local
316 (assembler_.get()->*f)(new_imm, *reg1, *reg2); in RepeatTemplatedImmBitsRegisters()
320 std::string reg1_string = (this->*GetName1)(*reg1); in RepeatTemplatedImmBitsRegisters()
1319 for (auto reg1 : reg1_registers) { in RepeatTemplatedRegisters() local
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/art/runtime/interpreter/mterp/arm/
Dmain.S301 .macro GET_VREG_WIDE_BY_ADDR reg0, reg1, addr
302 ldmia \addr, {\reg0, \reg1}
304 .macro SET_VREG_WIDE_BY_ADDR reg0, reg1, addr
305 stmia \addr, {\reg0, \reg1}
/art/runtime/arch/arm64/
Dquick_entrypoints_arm64.S55 .macro SAVE_TWO_REGS reg1, reg2, offset
56 stp \reg1, \reg2, [sp, #(\offset)]
57 .cfi_rel_offset \reg1, (\offset)
61 .macro RESTORE_TWO_REGS reg1, reg2, offset
62 ldp \reg1, \reg2, [sp, #(\offset)]
63 .cfi_restore \reg1
67 .macro SAVE_TWO_REGS_INCREASE_FRAME reg1, reg2, frame_adjustment
68 stp \reg1, \reg2, [sp, #-(\frame_adjustment)]!
70 .cfi_rel_offset \reg1, 0
74 .macro RESTORE_TWO_REGS_DECREASE_FRAME reg1, reg2, frame_adjustment
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/art/compiler/utils/x86_64/
Dassembler_x86_64.h660 void cmpl(CpuRegister reg0, CpuRegister reg1);
665 void cmpq(CpuRegister reg0, CpuRegister reg1);
670 void testl(CpuRegister reg1, CpuRegister reg2);
674 void testq(CpuRegister reg1, CpuRegister reg2);
/art/compiler/utils/x86/
Dassembler_x86.h620 void cmpl(Register reg0, Register reg1);
626 void testl(Register reg1, Register reg2);
628 void testl(Register reg1, const Address& address);
/art/compiler/optimizing/
Dcode_generator_x86_64.h142 void Exchange64(CpuRegister reg1, CpuRegister reg2);
Dcode_generator_arm_vixl.cc4263 vixl32::Register reg1 = InputRegisterAt(rem, 0); in VisitRem() local
4273 __ Sdiv(temp, reg1, reg2); in VisitRem()
4274 __ Mls(out_reg, temp, reg2, reg1); in VisitRem()
4277 DCHECK(reg1.Is(calling_convention.GetRegisterAt(0))); in VisitRem()