| /art/runtime/arch/arm/ |
| D | jni_entrypoints_arm.S | 24 push {r0, r1, r2, r3, lr} @ spill regs
38 pop {r0, r1, r2, r3, lr} @ restore regs
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| /art/compiler/utils/arm/ |
| D | assembler_arm_vixl.cc | 384 void ArmVIXLAssembler::StoreRegisterList(RegList regs, size_t stack_offset) { in StoreRegisterList() argument
385 int number_of_regs = POPCOUNT(static_cast<uint32_t>(regs)); in StoreRegisterList()
392 DCHECK_EQ(regs & (1u << base.GetCode()), 0u); in StoreRegisterList()
395 ___ Stm(base, NO_WRITE_BACK, RegisterList(regs)); in StoreRegisterList()
397 for (uint32_t i : LowToHighBits(static_cast<uint32_t>(regs))) { in StoreRegisterList()
405 void ArmVIXLAssembler::LoadRegisterList(RegList regs, size_t stack_offset) { in LoadRegisterList() argument
406 int number_of_regs = POPCOUNT(static_cast<uint32_t>(regs)); in LoadRegisterList()
415 ___ Ldm(base, NO_WRITE_BACK, RegisterList(regs)); in LoadRegisterList()
417 for (uint32_t i : LowToHighBits(static_cast<uint32_t>(regs))) { in LoadRegisterList()
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| D | assembler_arm_vixl.h | 217 void LoadRegisterList(RegList regs, size_t stack_offset);
218 void StoreRegisterList(RegList regs, size_t stack_offset);
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| /art/runtime/arch/arm64/ |
| D | fault_handler_arm64.cc | 58 *out_method = reinterpret_cast<ArtMethod*>(sc->regs[0]); in GetMethodAndReturnPcAndSp()
86 sc->regs[30] = reinterpret_cast<uintptr_t>(info->si_addr); in Action()
142 sc->regs[30] = sc->pc + 4; in Action()
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| /art/runtime/ |
| D | stack_map.cc | 155 DexRegisterLocation* regs = map->data(); in DecodeDexRegisterMap() local
163 if (regs[reg + bit].GetKind() == DexRegisterLocation::Kind::kInvalid) { in DecodeDexRegisterMap()
164 regs[reg + bit] = GetDexRegisterCatalogEntry(dex_register_maps_.Get(map_index)); in DecodeDexRegisterMap()
175 DexRegisterLocation* regs = map->data(); in DecodeDexRegisterMap() local
177 if (regs[r].GetKind() == DexRegisterLocation::Kind::kInvalid) { in DecodeDexRegisterMap()
178 regs[r] = DexRegisterLocation::None(); in DecodeDexRegisterMap()
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| D | runtime_common.cc | 269 DumpRegister64(os, reg_name.c_str(), context.regs[i]); in Dump()
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| /art/runtime/interpreter/mterp/arm/ |
| D | other.S | 103 CLEAR_SHADOW_PAIR r9, r2, r3 @ Zero out the shadow regs
116 CLEAR_SHADOW_PAIR r3, r2, lr @ Zero out the shadow regs
129 CLEAR_SHADOW_PAIR r3, r2, lr @ Zero out the shadow regs
143 CLEAR_SHADOW_PAIR r3, r0, r2 @ Zero shadow regs
280 CLEAR_SHADOW_PAIR rINST, ip, lr @ Zero out the shadow regs
294 CLEAR_SHADOW_PAIR rINST, ip, lr @ Zero out the shadow regs
309 CLEAR_SHADOW_PAIR r2, r3, ip @ Zero out the shadow regs
322 CLEAR_SHADOW_PAIR rINST, ip, lr @ Zero out the shadow regs
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| D | arithmetic.S | 166 CLEAR_SHADOW_PAIR rINST, lr, ip @ Zero out the shadow regs
201 CLEAR_SHADOW_PAIR rINST, ip, lr @ Zero shadow regs
269 CLEAR_SHADOW_PAIR rINST, ip, lr @ Zero shadow regs
292 CLEAR_SHADOW_PAIR rINST, ip, lr @ Zero shadow regs
551 CLEAR_SHADOW_PAIR r0, lr, ip @ Zero out the shadow regs
785 CLEAR_SHADOW_PAIR r9, lr, ip @ Zero out the shadow regs
808 CLEAR_SHADOW_PAIR r9, lr, ip @ Zero out the shadow regs
847 CLEAR_SHADOW_PAIR r9, lr, ip @ Zero out the shadow regs
870 CLEAR_SHADOW_PAIR r9, lr, ip @ Zero out the shadow regs
921 CLEAR_SHADOW_PAIR r9, lr, ip @ Zero out the shadow regs
[all …]
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| D | main.S | 385 stmfd sp!, {r3-r10,fp,lr} @ save 10 regs, (r3 just to align 64)
737 ldmfd sp!, {r3-r10,fp,pc} @ restore 10 regs and return
748 ldmfd sp!, {r3-r10,fp,pc} @ restore 10 regs and return
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| D | object.S | 161 CLEAR_SHADOW_PAIR r2, ip, lr @ Zero out the shadow regs
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| D | array.S | 86 CLEAR_SHADOW_PAIR r9, lr, ip @ Zero out the shadow regs
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| /art/test/ |
| D | Android.bp | 477 "457-regs/regs_jni.cc",
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| /art/compiler/optimizing/ |
| D | code_generator_arm_vixl.cc | 1026 static uint32_t ComputeSRegisterListMask(const SRegisterList& regs) { in ComputeSRegisterListMask() argument
1028 for (uint32_t i = regs.GetFirstSRegister().GetCode(); in ComputeSRegisterListMask()
1029 i <= regs.GetLastSRegister().GetCode(); in ComputeSRegisterListMask()
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