Searched refs:ADD_D (Results 1 – 10 of 10) sorted by relevance
| /external/v8/src/compiler/mips/ |
| D | instruction-scheduler-mips.cc | 323 ADD_D = 4, enumerator
605 return Latency::MUL_D + Latency::ADD_D; in MaddSLatency()
613 return Latency::MUL_D + Latency::ADD_D; in MaddDLatency()
683 Latency::ADD_D + Latency::CVT_D_W; in CvtDUwLatency()
1695 return Latency::ADD_D; in GetInstructionLatency()
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| /external/v8/src/compiler/mips64/ |
| D | instruction-scheduler-mips64.cc | 354 ADD_D = 4, enumerator
1443 return Latency::ADD_D; in GetInstructionLatency()
1501 2 * Latency::CVT_D_L + Latency::ADD_D; in GetInstructionLatency()
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| /external/v8/src/mips/ |
| D | constants-mips.h | 627 ADD_D = ((0U << 3) + 0), enumerator
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| D | disasm-mips.cc | 1060 case ADD_D: in DecodeTypeRegisterRsType()
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| D | assembler-mips.cc | 2751 GenInstrRegister(COP1, D, ft, fs, fd, ADD_D); in add_d()
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| D | simulator-mips.cc | 2772 case ADD_D: in DecodeTypeRegisterDRsType()
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| /external/v8/src/mips64/ |
| D | constants-mips64.h | 657 ADD_D = ((0U << 3) + 0), enumerator
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| D | disasm-mips64.cc | 1133 case ADD_D: in DecodeTypeRegisterRsType()
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| D | assembler-mips64.cc | 3138 GenInstrRegister(COP1, S, ft, fs, fd, ADD_D); in add_s()
3143 GenInstrRegister(COP1, D, ft, fs, fd, ADD_D); in add_d()
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| D | simulator-mips64.cc | 3090 case ADD_D: in DecodeTypeRegisterDRsType()
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