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Searched refs:AHB_DIV_1 (Results 1 – 4 of 4) sorted by relevance

/external/u-boot/arch/arm/include/asm/arch-sunxi/
Dclock_sun4i.h118 #define AHB_DIV_1 0 macro
Dclock_sun6i.h194 #define AHB_DIV_1 0 macro
/external/u-boot/drivers/mtd/nand/
Dsunxi_nand_spl.c547 clrbits_le32(&ccm->nand0_clk_cfg, CCM_NAND_CTRL_ENABLE | AHB_DIV_1); in nand_deselect()
/external/u-boot/board/sunxi/
Dboard.c294 setbits_le32(&ccm->nand0_clk_cfg, CCM_NAND_CTRL_ENABLE | AHB_DIV_1); in nand_clock_setup()