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Searched refs:AHB_GATE_OFFSET_NAND0 (Results 1 – 7 of 7) sorted by relevance

/external/u-boot/arch/arm/include/asm/arch-sunxi/
Dclock_sun9i.h192 #define AHB_GATE_OFFSET_NAND0 13 macro
Dclock_sun8i_a83t.h203 #define AHB_GATE_OFFSET_NAND0 13 macro
Dclock_sun4i.h179 #define AHB_GATE_OFFSET_NAND0 13 macro
Dclock_sun6i.h307 #define AHB_GATE_OFFSET_NAND0 13 macro
/external/u-boot/board/sunxi/
Dboard.c289 setbits_le32(&ccm->ahb_gate0, (CLK_GATE_OPEN << AHB_GATE_OFFSET_NAND0)); in nand_clock_setup()
292 setbits_le32(&ccm->ahb_reset0_cfg, (1 << AHB_GATE_OFFSET_NAND0)); in nand_clock_setup()
/external/u-boot/drivers/mtd/nand/
Dsunxi_nand_spl.c541 clrbits_le32(&ccm->ahb_gate0, (CLK_GATE_OPEN << AHB_GATE_OFFSET_NAND0)); in nand_deselect()
Dsunxi_nand.c307 setbits_le32(&ccm->ahb_gate0, (1 << AHB_GATE_OFFSET_NAND0)); in sunxi_nfc_set_clk_rate()