| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/ |
| D | p8-scalar_vector_conversions.ll | 542 ; CHECK-DAG: andc [[ANDC:[0-9]+]], [[IMM7]]
543 ; CHECK-DAG: sldi [[SHL:[0-9]+]], [[ANDC]], 3
548 ; CHECK-DAG-LE: andc [[ANDC:[0-9]+]], [[IMM8]]
549 ; CHECK-DAG-LE: lvsl [[SHMSK:[0-9]+]], 0, [[ANDC]]
570 ; CHECK-DAG: andc [[ANDC:[0-9]+]], [[IMM7]]
571 ; CHECK-DAG: sldi [[SHL:[0-9]+]], [[ANDC]], 3
576 ; CHECK-DAG-LE: andc [[ANDC:[0-9]+]], [[IMM8]]
577 ; CHECK-DAG-LE: lvsl [[SHMSK:[0-9]+]], 0, [[ANDC]]
822 ; CHECK-DAG: andc [[ANDC:[0-9]+]], [[IMM3]]
823 ; CHECK-DAG: sldi [[SHL:[0-9]+]], [[ANDC]], 4
[all …]
|
| /external/llvm/test/CodeGen/PowerPC/ |
| D | p8-scalar_vector_conversions.ll | 686 ; CHECK-DAG: andc [[ANDC:[0-9]+]], [[IMM7]]
687 ; CHECK-DAG: sldi [[SHL:[0-9]+]], [[ANDC]], 3
692 ; CHECK-DAG-LE: andc [[ANDC:[0-9]+]], [[IMM8]]
693 ; CHECK-DAG-LE: lvsl [[SHMSK:[0-9]+]], 0, [[ANDC]]
720 ; CHECK-DAG: andc [[ANDC:[0-9]+]], [[IMM7]]
721 ; CHECK-DAG: sldi [[SHL:[0-9]+]], [[ANDC]], 3
726 ; CHECK-DAG-LE: andc [[ANDC:[0-9]+]], [[IMM8]]
727 ; CHECK-DAG-LE: lvsl [[SHMSK:[0-9]+]], 0, [[ANDC]]
1038 ; CHECK-DAG: andc [[ANDC:[0-9]+]], [[IMM3]]
1039 ; CHECK-DAG: sldi [[SHL:[0-9]+]], [[ANDC]], 4
[all …]
|
| /external/u-boot/doc/ |
| D | README.mxsimage | 117 ANDC.n u32_address u32_value
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/CellSPU/ |
| D | and_ops.ll | 72 ; ANDC instruction generation:
|
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 644 T = SDValue(CurDAG->getMachineNode(PPC::ANDC, dl, MVT::i32, T, Op), 0); in SelectSETCC()
|
| D | PPCISelLowering.cpp | 4822 BuildMI(BB, dl, TII->get(is64bit ? PPC::ANDC8 : PPC::ANDC), Tmp2Reg) in EmitPartwordAtomicBinary()
4947 BB = EmitPartwordAtomicBinary(MI, BB, true, PPC::ANDC); in EmitInstrWithCustomInserter()
4949 BB = EmitPartwordAtomicBinary(MI, BB, false, PPC::ANDC); in EmitInstrWithCustomInserter()
4951 BB = EmitAtomicBinary(MI, BB, false, PPC::ANDC); in EmitInstrWithCustomInserter()
5168 BuildMI(BB, dl, TII->get(PPC::ANDC),Tmp2Reg) in EmitInstrWithCustomInserter()
|
| D | PPCInstrInfo.td | 928 def ANDC : XForm_6<31, 60, (outs GPRC:$rA), (ins GPRC:$rS, GPRC:$rB),
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 1371 SDValue ANDC = TLO.DAG.getConstant(~KnownOne & NewMask, VT); in SimplifyDemandedBits() local
1373 Op.getOperand(0), ANDC)); in SimplifyDemandedBits()
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 594 SDValue ANDC = TLO.DAG.getConstant(~KnownOne & NewMask, dl, VT); in SimplifyDemandedBits() local
596 Op.getOperand(0), ANDC)); in SimplifyDemandedBits()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 700 SDValue ANDC = TLO.DAG.getConstant(~Known.One & NewMask, dl, VT); in SimplifyDemandedBits() local
702 Op.getOperand(0), ANDC)); in SimplifyDemandedBits()
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 2301 T = SDValue(CurDAG->getMachineNode(PPC::ANDC, dl, MVT::i32, T, Op), 0); in trySETCC()
|
| D | PPCInstrInfo.td | 2028 defm ANDC : XForm_6r<31, 60, (outs gprc:$rA), (ins gprc:$rS, gprc:$rB),
3108 (RLWINM (ANDC (NEG $in), $in), 1, 31, 31)>,
|
| D | PPCISelLowering.cpp | 8613 BuildMI(BB, dl, TII->get(is64bit ? PPC::ANDC8 : PPC::ANDC), Tmp2Reg) in EmitPartwordAtomicBinary()
9352 BuildMI(BB, dl, TII->get(PPC::ANDC),Tmp2Reg) in EmitInstrWithCustomInserter()
|
| /external/capstone/arch/PowerPC/ |
| D | PPCGenDisassemblerTables.inc | 1356 /* 5584 */ MCD_OPC_Decode, 68, 77, // Opcode: ANDC
|
| D | PPCGenAsmWriter.inc | 88 18556U, // ANDC
1361 0U, // ANDC
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.td | 2254 defm ANDC : XForm_6r<31, 60, (outs gprc:$rA), (ins gprc:$rS, gprc:$rB),
3392 (RLWINM (ANDC (NEG $in), $in), 1, 31, 31)>,
|
| D | PPCISelDAGToDAG.cpp | 3892 T = SDValue(CurDAG->getMachineNode(PPC::ANDC, dl, MVT::i32, T, Op), 0); in trySETCC()
|
| D | PPCISelLowering.cpp | 9911 BuildMI(BB, dl, TII->get(is64bit ? PPC::ANDC8 : PPC::ANDC), Tmp2Reg) in EmitPartwordAtomicBinary()
10722 BuildMI(BB, dl, TII->get(PPC::ANDC),Tmp2Reg) in EmitInstrWithCustomInserter()
|
| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| D | SPUInstrInfo.td | 1302 defm ANDC : AndComplement;
|