Home
last modified time | relevance | path

Searched refs:ARCH_DMA_MINALIGN (Results 1 – 25 of 99) sorted by relevance

1234

/external/u-boot/drivers/crypto/fsl/
Dfsl_blob.c33 if (!IS_ALIGNED((uintptr_t)key_mod, ARCH_DMA_MINALIGN) || in blob_decap()
34 !IS_ALIGNED((uintptr_t)src, ARCH_DMA_MINALIGN) || in blob_decap()
35 !IS_ALIGNED((uintptr_t)dst, ARCH_DMA_MINALIGN)) { in blob_decap()
47 size = ALIGN(16, ARCH_DMA_MINALIGN); in blob_decap()
51 size = ALIGN(BLOB_SIZE(len), ARCH_DMA_MINALIGN); in blob_decap()
61 size = ALIGN(sizeof(int) * MAX_CAAM_DESCSIZE, ARCH_DMA_MINALIGN); in blob_decap()
70 size = ALIGN(len, ARCH_DMA_MINALIGN); in blob_decap()
98 if (!IS_ALIGNED((uintptr_t)key_mod, ARCH_DMA_MINALIGN) || in blob_encap()
99 !IS_ALIGNED((uintptr_t)src, ARCH_DMA_MINALIGN) || in blob_encap()
100 !IS_ALIGNED((uintptr_t)dst, ARCH_DMA_MINALIGN)) { in blob_encap()
[all …]
Dfsl_hash.c174 if (!IS_ALIGNED((uintptr_t)pbuf, ARCH_DMA_MINALIGN) || in caam_hash()
175 !IS_ALIGNED((uintptr_t)pout, ARCH_DMA_MINALIGN)) { in caam_hash()
180 size = ALIGN(buf_len, ARCH_DMA_MINALIGN); in caam_hash()
188 size = ALIGN(sizeof(int) * MAX_CAAM_DESCSIZE, ARCH_DMA_MINALIGN); in caam_hash()
193 size = ALIGN(driver_hash[algo].digestsize, ARCH_DMA_MINALIGN); in caam_hash()
Djr.c113 jr->input_ring = (dma_addr_t *)memalign(ARCH_DMA_MINALIGN, in jr_init()
119 ARCH_DMA_MINALIGN); in jr_init()
121 (struct op_ring *)memalign(ARCH_DMA_MINALIGN, jr->op_size); in jr_init()
212 ~(ARCH_DMA_MINALIGN - 1); in jr_enqueue()
214 sizeof(struct jr_info), ARCH_DMA_MINALIGN); in jr_enqueue()
238 start = (unsigned long)&jr->input_ring[head] & ~(ARCH_DMA_MINALIGN - 1); in jr_enqueue()
240 sizeof(dma_addr_t), ARCH_DMA_MINALIGN); in jr_enqueue()
247 ~(ARCH_DMA_MINALIGN - 1); in jr_enqueue()
249 ARCH_DMA_MINALIGN); in jr_enqueue()
453 desc = memalign(ARCH_DMA_MINALIGN, sizeof(uint32_t) * 6); in instantiate_rng()
[all …]
/external/u-boot/arch/arm/mach-omap2/
Dsec-common.c58 static uint32_t secure_rom_call_args[5] __aligned(ARCH_DMA_MINALIGN) __section(".data");
87 roundup(sizeof(secure_rom_call_args), ARCH_DMA_MINALIGN)); in secure_rom_call()
117 rounddown((u32)*image, ARCH_DMA_MINALIGN), in secure_boot_verify_image()
118 roundup((u32)*image + *size, ARCH_DMA_MINALIGN)); in secure_boot_verify_image()
159 rounddown((u32)*image, ARCH_DMA_MINALIGN), in secure_boot_verify_image()
160 roundup((u32)*image + *size, ARCH_DMA_MINALIGN)); in secure_boot_verify_image()
289 static struct ppa_tee_load_info tee_info __aligned(ARCH_DMA_MINALIGN);
338 rounddown((u32)loadptr, ARCH_DMA_MINALIGN), in secure_tee_install()
339 roundup((u32)loadptr + tee_file_size, ARCH_DMA_MINALIGN)); in secure_tee_install()
342 roundup(sizeof(tee_info), ARCH_DMA_MINALIGN)); in secure_tee_install()
[all …]
/external/u-boot/include/
Dmemalign.h79 ALLOC_ALIGN_BUFFER_PAD(type, name, size, ARCH_DMA_MINALIGN, pad)
81 ALLOC_ALIGN_BUFFER(type, name, size, ARCH_DMA_MINALIGN)
94 DEFINE_ALIGN_BUFFER(type, name, size, ARCH_DMA_MINALIGN)
111 return memalign(ARCH_DMA_MINALIGN, ALIGN(size, ARCH_DMA_MINALIGN)); in malloc_cache_aligned()
/external/u-boot/arch/sandbox/include/asm/
Dcache.h18 #define ARCH_DMA_MINALIGN __BIGGEST_ALIGNMENT__ macro
20 #define ARCH_DMA_MINALIGN 16 macro
22 #define CONFIG_SYS_CACHELINE_SIZE ARCH_DMA_MINALIGN
/external/u-boot/arch/sh/include/asm/
Dcache.h17 #define ARCH_DMA_MINALIGN 32 macro
25 #ifndef ARCH_DMA_MINALIGN
26 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/external/u-boot/drivers/net/
Dfec_mxc.c60 #define RXDESC_PER_CACHELINE (ARCH_DMA_MINALIGN/sizeof(struct fec_bd))
63 #if ((ARCH_DMA_MINALIGN < 16) || (ARCH_DMA_MINALIGN % 16 != 0))
67 #if ((PKTALIGN < ARCH_DMA_MINALIGN) || \
68 (PKTALIGN % ARCH_DMA_MINALIGN != 0))
294 size = roundup(dsize, ARCH_DMA_MINALIGN); in fec_rbd_init()
328 ARCH_DMA_MINALIGN); in fec_tbd_init()
441 ARCH_DMA_MINALIGN); in fec_open()
681 end = roundup(addr + length, ARCH_DMA_MINALIGN); in fecmxc_send()
682 addr &= ~(ARCH_DMA_MINALIGN - 1); in fecmxc_send()
705 size = roundup(2 * sizeof(struct fec_bd), ARCH_DMA_MINALIGN); in fecmxc_send()
[all …]
Dsun8i_emac.c109 } __aligned(ARCH_DMA_MINALIGN);
114 char rxbuffer[RX_TOTAL_BUFSIZE] __aligned(ARCH_DMA_MINALIGN);
115 char txbuffer[TX_TOTAL_BUFSIZE] __aligned(ARCH_DMA_MINALIGN);
520 roundup(sizeof(*desc_p), ARCH_DMA_MINALIGN); in _sun8i_eth_recv()
542 ARCH_DMA_MINALIGN), in _sun8i_eth_recv()
544 ARCH_DMA_MINALIGN)); in _sun8i_eth_recv()
566 roundup(sizeof(*desc_p), ARCH_DMA_MINALIGN); in _sun8i_emac_eth_send()
570 roundup(len, ARCH_DMA_MINALIGN); in _sun8i_emac_eth_send()
720 roundup(sizeof(u32), ARCH_DMA_MINALIGN); in _sun8i_free_pkt()
Ddesignware.h118 } __aligned(ARCH_DMA_MINALIGN);
225 char txbuffs[TX_TOTAL_BUFSIZE] __aligned(ARCH_DMA_MINALIGN);
226 char rxbuffs[RX_TOTAL_BUFSIZE] __aligned(ARCH_DMA_MINALIGN);
Drtl8169.c291 #if ARCH_DMA_MINALIGN > 256
292 # define RTL8169_ALIGN ARCH_DMA_MINALIGN
306 #if RTL8169_DESC_SIZE < ARCH_DMA_MINALIGN
465 unsigned long start = (unsigned long)desc & ~(ARCH_DMA_MINALIGN - 1); in rtl_inval_rx_desc()
466 unsigned long end = ALIGN(start + sizeof(*desc), ARCH_DMA_MINALIGN); in rtl_inval_rx_desc()
482 unsigned long start = (unsigned long)desc & ~(ARCH_DMA_MINALIGN - 1); in rtl_inval_tx_desc()
483 unsigned long end = ALIGN(start + sizeof(*desc), ARCH_DMA_MINALIGN); in rtl_inval_tx_desc()
498 unsigned long start = (unsigned long)buf & ~(ARCH_DMA_MINALIGN - 1); in rtl_inval_buffer()
499 unsigned long end = ALIGN(start + size, ARCH_DMA_MINALIGN); in rtl_inval_buffer()
Dbcm-sf2-eth-gmac.c30 #define RX_BUF_SIZE_ALIGNED ALIGN(RX_BUF_SIZE, ARCH_DMA_MINALIGN)
31 #define TX_BUF_SIZE_ALIGNED ALIGN(TX_BUF_SIZE, ARCH_DMA_MINALIGN)
32 #define DESCP_SIZE_ALIGNED ALIGN(sizeof(dma64dd_t), ARCH_DMA_MINALIGN)
905 tmp = memalign(ARCH_DMA_MINALIGN, DESCP_SIZE_ALIGNED * TX_BUF_NUM); in gmac_add()
915 tmp = memalign(ARCH_DMA_MINALIGN, TX_BUF_SIZE_ALIGNED * TX_BUF_NUM); in gmac_add()
926 tmp = memalign(ARCH_DMA_MINALIGN, DESCP_SIZE_ALIGNED * RX_BUF_NUM); in gmac_add()
937 tmp = memalign(ARCH_DMA_MINALIGN, RX_BUF_SIZE_ALIGNED * RX_BUF_NUM); in gmac_add()
/external/u-boot/lib/
Dlinux_compat.c21 p = memalign(ARCH_DMA_MINALIGN, size); in kmalloc()
32 ret = memalign(ARCH_DMA_MINALIGN, sizeof(struct kmem_cache)); in get_mem()
40 return memalign(ARCH_DMA_MINALIGN, obj->sz); in kmem_cache_alloc()
/external/u-boot/common/
Dbouncebuf.c15 const ulong align_mask = ARCH_DMA_MINALIGN - 1; in addr_aligned()
39 state->len_aligned = roundup(len, ARCH_DMA_MINALIGN); in bounce_buffer_start()
43 state->bounce_buffer = memalign(ARCH_DMA_MINALIGN, in bounce_buffer_start()
/external/u-boot/arch/microblaze/include/asm/
Dcache.h16 #define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE macro
18 #define ARCH_DMA_MINALIGN 16 macro
/external/u-boot/arch/riscv/include/asm/
Dcache.h16 #define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE macro
18 #define ARCH_DMA_MINALIGN 32 macro
/external/u-boot/arch/mips/include/asm/
Dcache.h12 #define ARCH_DMA_MINALIGN (L1_CACHE_BYTES) macro
19 #define CONFIG_SYS_CACHELINE_SIZE ARCH_DMA_MINALIGN
/external/u-boot/arch/nds32/include/asm/
Dcache.h58 #define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE macro
60 #define ARCH_DMA_MINALIGN 32 macro
/external/u-boot/drivers/usb/host/
Dohci.h24 #if ARCH_DMA_MINALIGN > 16
25 #define ED_ALIGNMENT ARCH_DMA_MINALIGN
30 #if defined CONFIG_DM_USB && ARCH_DMA_MINALIGN > 32
31 #define TD_ALIGNMENT ARCH_DMA_MINALIGN
/external/u-boot/env/
Dsf.c113 saved_buffer = memalign(ARCH_DMA_MINALIGN, saved_size); in env_sf_save()
171 tmp_env1 = (env_t *)memalign(ARCH_DMA_MINALIGN, in env_sf_load()
173 tmp_env2 = (env_t *)memalign(ARCH_DMA_MINALIGN, in env_sf_load()
269 buf = (char *)memalign(ARCH_DMA_MINALIGN, CONFIG_ENV_SIZE); in env_sf_load()
/external/u-boot/drivers/spi/
Dmxs_spi.c220 if (length % ARCH_DMA_MINALIGN) in mxs_spi_xfer_dma()
221 cache_data_count = roundup(length, ARCH_DMA_MINALIGN); in mxs_spi_xfer_dma()
349 if (((uint32_t)data) & (ARCH_DMA_MINALIGN - 1)) in spi_xfer()
351 if (((uint32_t)len) & (ARCH_DMA_MINALIGN - 1)) in spi_xfer()
/external/u-boot/drivers/bootcount/
Dbootcount_ram.c40 ~(ARCH_DMA_MINALIGN - 1)) + ARCH_DMA_MINALIGN)); in bootcount_store()
/external/u-boot/drivers/usb/gadget/
Dci_udc.c32 #if ARCH_DMA_MINALIGN > 128
41 #define ILIST_ALIGN roundup(ARCH_DMA_MINALIGN, 32)
364 if (addr & (ARCH_DMA_MINALIGN - 1)) in ci_bounce()
368 if (req->length & (ARCH_DMA_MINALIGN - 1)) in ci_bounce()
382 ci_req->b_len = roundup(req->length, ARCH_DMA_MINALIGN); in ci_bounce()
383 ci_req->b_buf = memalign(ARCH_DMA_MINALIGN, ci_req->b_len); in ci_bounce()
395 aligned_used_len = roundup(req->length, ARCH_DMA_MINALIGN); in ci_bounce()
411 aligned_used_len = roundup(req->actual, ARCH_DMA_MINALIGN); in ci_debounce()
919 const int eplist_align = roundup(eplist_min_align, ARCH_DMA_MINALIGN); in ci_udc_probe()
921 const int eplist_sz = roundup(eplist_raw_sz, ARCH_DMA_MINALIGN); in ci_udc_probe()
/external/u-boot/arch/m68k/include/asm/
Dcache.h198 #define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE macro
200 #define ARCH_DMA_MINALIGN 16 macro
/external/u-boot/common/spl/
Dspl_fit.c113 return offset & ~(ARCH_DMA_MINALIGN - 1); in get_aligned_image_offset()
127 return offset & (ARCH_DMA_MINALIGN - 1); in get_aligned_image_overhead()
180 int align_len = ARCH_DMA_MINALIGN - 1; in spl_load_fit_image()
360 int base_offset, align_len = ARCH_DMA_MINALIGN - 1; in spl_load_simple_fit()

1234