Home
last modified time | relevance | path

Searched refs:ARMv6 (Results 1 – 25 of 42) sorted by relevance

12

/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Dload-combine.ll2 ; RUN: llc < %s -mtriple=armv6-unknown | FileCheck %s --check-prefix=CHECK-ARMv6
15 ; CHECK-ARMv6-LABEL: load_i32_by_i8_unaligned:
16 ; CHECK-ARMv6: ldrb{{.*}}r0
17 ; CHECK-ARMv6: ldrb{{.*}}r0
18 ; CHECK-ARMv6: ldrb{{.*}}r0
19 ; CHECK-ARMv6: ldrb{{.*}}r0
20 ; CHECK-ARMv6: orr
21 ; CHECK-ARMv6: bx lr
51 ; CHECK-ARMv6-LABEL: load_i32_by_i8_aligned:
52 ; CHECK-ARMv6: ldr r0, [r0]
[all …]
Dload-combine-big-endian.ll2 ; RUN: llc < %s -mtriple=armv6eb-unknown | FileCheck %s --check-prefix=CHECK-ARMv6
11 ; CHECK-ARMv6-LABEL: load_i32_by_i8_big_endian:
12 ; CHECK-ARMv6: ldr r0, [r0]
13 ; CHECK-ARMv6-NEXT: bx lr
48 ; CHECK-ARMv6-LABEL: load_i32_by_i8_bswap:
49 ; CHECK-ARMv6: ldr r0, [r0]
50 ; CHECK-ARMv6-NEXT: rev r0, r0
51 ; CHECK-ARMv6-NEXT: bx lr
81 ; CHECK-ARMv6-LABEL: load_i32_by_i16_by_i8_big_endian:
82 ; CHECK-ARMv6: ldr r0, [r0]
[all …]
D2013-05-31-char-shift-crash.ll6 ; ARMFastISel used to fail emitting sext/zext in pre-ARMv6.
Dfast-isel-ext.ll5 ; Can't test pre-ARMv6 Thumb because ARM FastISel currently only supports
Dnone-macho.ll83 ; *vfp variants used for ARMv6 iOS.
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/
Ddirective-arch_extension-idiv.s2 @ RUN: | FileCheck %s -check-prefix CHECK-ARMv6 -check-prefix CHECK-V6
27 @ CHECK-ARMv6: error: instruction requires: divide in ARM
30 @ CHECK-ARMv6: error: instruction requires: divide in ARM
44 @ CHECK-ARMv6: error: instruction requires: divide in ARM
49 @ CHECK-ARMv6: error: instruction requires: divide in ARM
Ddirective-arch_extension-mp.s2 @ RUN: | FileCheck %s -check-prefix CHECK-ARMv6 -check-prefix CHECK-V6
/external/llvm/test/MC/ARM/
Ddirective-arch_extension-idiv.s2 @ RUN: | FileCheck %s -check-prefix CHECK-ARMv6 -check-prefix CHECK-V6
27 @ CHECK-ARMv6: error: instruction requires: divide in ARM
30 @ CHECK-ARMv6: error: instruction requires: divide in ARM
44 @ CHECK-ARMv6: error: instruction requires: divide in ARM
49 @ CHECK-ARMv6: error: instruction requires: divide in ARM
Ddirective-arch_extension-mp.s2 @ RUN: | FileCheck %s -check-prefix CHECK-ARMv6 -check-prefix CHECK-V6
/external/libopus/m4/
Das-gcc-inline-assembly.m458 AC_MSG_CHECKING([if assembler supports ARMv6 media instructions on ARM])
69 AC_MSG_CHECKING([if assembler supports ARMv6 media instructions on ARM])
/external/libopus/celt/arm/
Darmopts_gnu.s32 @ Set the following to 1 if we have ARMv6 media instructions.
Darmopts.s.in31 ; Set the following to 1 if we have ARMv6 media instructions.
/external/lz4/contrib/debian/
Dchangelog5 * Improved: Performance on ARMv6 and ARMv7
/external/llvm/test/CodeGen/ARM/
D2013-05-31-char-shift-crash.ll6 ; ARMFastISel used to fail emitting sext/zext in pre-ARMv6.
Dfast-isel-ext.ll5 ; Can't test pre-ARMv6 Thumb because ARM FastISel currently only supports
Dnone-macho.ll83 ; *vfp variants used for ARMv6 iOS.
/external/llvm/lib/Target/ARM/
DARM.td388 def ARMv6 : Architecture<"armv6", "ARMv6", [HasV6Ops]>;
496 def ARMv6j : Architecture<"armv6j", "ARMv7a", [ARMv6]>;
541 def : Processor<"arm1136j-s", ARMV6Itineraries, [ARMv6]>;
542 def : Processor<"arm1136jf-s", ARMV6Itineraries, [ARMv6,
DARMSubtarget.h55 ARMv5tej, ARMv6, ARMv6k, ARMv6kz, ARMv6t2, ARMv6m, ARMv6sm, ARMv7a, ARMv7r, enumerator
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARM.td535 def ARMv6 : Architecture<"armv6", "ARMv6", [HasV6Ops,
699 def ARMv6j : Architecture<"armv6j", "ARMv7a", [ARMv6]>;
753 def : Processor<"arm1136j-s", ARMV6Itineraries, [ARMv6]>;
754 def : Processor<"arm1136jf-s", ARMV6Itineraries, [ARMv6,
DARMSubtarget.h94 ARMv6, enumerator
/external/libopus/
Dconfigure.ac226 [Use ARMv6 inline asm optimizations])
272 [Trying to force-enable ARMv6 media instructions...])
296 [Define if assembler supports ARMv6 media instructions])
299 [Define if binary requires ARMv6 media instruction support])
/external/swiftshader/third_party/LLVM/test/MC/ARM/
Dthumb-diagnostics.s20 @ CHECK-ERRORS-V5: error: instruction variant requires ARMv6 or later
/external/llvm/docs/
DHowToBuildOnARM.rst19 on the ARMv6 and ARMv7 architectures and may be inapplicable to older chips.
/external/swiftshader/third_party/llvm-7.0/llvm/docs/
DHowToBuildOnARM.rst19 on the ARMv6 and ARMv7 architectures and may be inapplicable to older chips.
/external/libvpx/libvpx/
DCHANGELOG442 utilize preload in ARMv6 MC/LPF/Copy routines
519 ARMv6 optimized sad16x16
520 ARMv6 optimized half pixel variance calculations
641 Add 4-tap version of 2nd-pass ARMv6 MC filter.

12