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Searched refs:ARR_SIZE (Results 1 – 22 of 22) sorted by relevance

/external/capstone/arch/AArch64/
DAArch64BaseInfo.c638 for (i = 0; i < ARR_SIZE(SysRegPairs); ++i) { in A64SysRegMapper_toString()
649 for (i = 0; i < ARR_SIZE(CycloneSysRegPairs); ++i) { in A64SysRegMapper_toString()
737 ARR_SIZE(TLBIPairs),
758 ARR_SIZE(ATPairs),
779 ARR_SIZE(DBarrierPairs),
796 ARR_SIZE(DCPairs),
808 ARR_SIZE(ICPairs),
818 ARR_SIZE(ISBPairs),
845 ARR_SIZE(PRFMPairs),
859 ARR_SIZE(PStatePairs),
[all …]
DAArch64Mapping.c14277 int i = insn_find(insns, ARR_SIZE(insns), id, &h->insn_cache); in AArch64_get_insn_id()
14787 if (id < ARR_SIZE(insn_name_maps)) in AArch64_insn_name()
14791 for (i = 0; i < ARR_SIZE(alias_insn_name_maps); i++) { in AArch64_insn_name()
14839 int i = name2id(&insn_name_maps[1], ARR_SIZE(insn_name_maps) - 1, name); in AArch64_map_insn()
14843 i = name2id(alias_insn_name_maps, ARR_SIZE(alias_insn_name_maps), name); in AArch64_map_insn()
14936 if (r < ARR_SIZE(map)) in AArch64_map_vregister()
DAArch64Disassembler.c237 for (i = 0; i < ARR_SIZE(MI->flat_insn->detail->arm64.operands); i++) in _getInstruction()
/external/swiftshader/third_party/LLVM/test/CodeGen/CellSPU/useful-harnesses/
Di64operations.c178 int64_tests_eq, ARR_SIZE(int64_tests_eq)},
180 int64_tests_neq, ARR_SIZE(int64_tests_neq)},
182 int64_tests_sgt, ARR_SIZE(int64_tests_sgt)},
184 int64_tests_sle, ARR_SIZE(int64_tests_sle)},
186 int64_tests_sge, ARR_SIZE(int64_tests_sge)},
188 int64_tests_slt, ARR_SIZE(int64_tests_slt)}
247 uint64_tests_ugt, ARR_SIZE(uint64_tests_ugt)},
249 uint64_tests_ule, ARR_SIZE(uint64_tests_ule)},
251 uint64_tests_uge, ARR_SIZE(uint64_tests_uge)},
253 uint64_tests_ult, ARR_SIZE(uint64_tests_ult)}
[all …]
Di64operations.h3 #define ARR_SIZE(arr) (sizeof(arr)/sizeof(arr[0])) macro
/external/capstone/arch/Sparc/
DSparcMapping.c2804 i = insn_find(insns, ARR_SIZE(insns), id, &h->insn_cache); in Sparc_get_insn_id()
2826 for (i = 0; i < ARR_SIZE(insn_hints); i++) { in Sparc_get_insn_id()
3137 for (i = 0; i < ARR_SIZE(alias_insn_names); i++) { in Sparc_insn_name()
3212 if (r < ARR_SIZE(map)) in Sparc_map_register()
3225 i = name2id(&insn_name_maps[1], ARR_SIZE(insn_name_maps) - 1, name); in Sparc_map_insn()
3275 i = name2id(alias_icc_maps, ARR_SIZE(alias_icc_maps), name); in Sparc_map_ICC()
3284 i = name2id(alias_fcc_maps, ARR_SIZE(alias_fcc_maps), name); in Sparc_map_FCC()
3300 for(i = 0; i < ARR_SIZE(hint_maps); i++) { in Sparc_map_hint()
/external/capstone/
Dutils.h49 #define ARR_SIZE(a) (sizeof(a)/sizeof(a[0])) macro
DMCInst.c15 #define MCINST_CACHE (ARR_SIZE(mcInst->Operands) - 1)
/external/capstone/arch/XCore/
DXCoreMapping.c65 for(i = 1; i < ARR_SIZE(reg_name_maps); i++) { in XCore_reg_id()
1374 i = insn_find(insns, ARR_SIZE(insns), id, &h->insn_cache); in XCore_get_insn_id()
1540 for (i = 0; i < ARR_SIZE(alias_insn_names); i++) { in XCore_insn_name()
1576 if (r < ARR_SIZE(map)) in XCore_map_register()
/external/mesa3d/src/gallium/drivers/r600/sb/
Dsb_bc_builder.cpp339 .ARR_SIZE(bc.array_size) in build_cf_mem()
350 .ARR_SIZE(bc.array_size) in build_cf_mem()
361 .ARR_SIZE(bc.array_size) in build_cf_mem()
Dsb_bc_fmt_def.inc171 BC_FIELD(CF_ALLOC_EXPORT_WORD1_BUF, ARR_SIZE, ARR_SZ, 11, 0)
183 BC_FIELD(CF_ALLOC_EXPORT_WORD1_BUF, ARR_SIZE, ARR_SZ, 11, 0)
194 BC_FIELD(CF_ALLOC_EXPORT_WORD1_BUF, ARR_SIZE, ARR_SZ, 11, 0)
/external/capstone/bindings/ocaml/
Docaml.c13 #define ARR_SIZE(a) (sizeof(a)/sizeof(a[0])) macro
319 lcount = list_count(insn[j-1].detail->x86.prefix, ARR_SIZE(insn[j-1].detail->x86.prefix)); in _cs_disasm()
330 lcount = list_count(insn[j-1].detail->x86.opcode, ARR_SIZE(insn[j-1].detail->x86.opcode)); in _cs_disasm()
/external/capstone/arch/X86/
DX86ATTInstPrinter.c897 …sizeof(MI->flat_insn->detail->x86.operands[0]) * (ARR_SIZE(MI->flat_insn->detail->x86.operands) - … in X86_ATT_printInst()
911 …sizeof(MI->flat_insn->detail->x86.operands[0]) * (ARR_SIZE(MI->flat_insn->detail->x86.operands) - … in X86_ATT_printInst()
DX86IntelInstPrinter.c515 …sizeof(MI->flat_insn->detail->x86.operands[0]) * (ARR_SIZE(MI->flat_insn->detail->x86.operands) - … in X86_Intel_printInst()
DX86DisassemblerDecoder.c1132 for (i = idx - 1; i < ARR_SIZE(x86_16_bit_eq_tbl) && x86_16_bit_eq_tbl[i].first == orig; i++) { in is16BitEquivalent()
DX86Mapping.c47056 int i = insn_find(insns, ARR_SIZE(insns), id, &h->insn_cache); in X86_get_insn_id()
47495 for (i = 0; i < ARR_SIZE(insn_regs_intel); i++) { in X86_insn_reg_intel()
47509 for (i = 0; i < ARR_SIZE(insn_regs_intel2); i++) { in X86_insn_reg_intel2()
47526 for (i = 0; i < ARR_SIZE(insn_regs_intel2); i++) { in X86_insn_reg_att2()
47543 for (i = 0; i < ARR_SIZE(insn_regs_att); i++) { in X86_insn_reg_att()
47557 int i = insn_find(insns, ARR_SIZE(insns), opcode, &h->insn_cache); in valid_repne()
47619 int i = insn_find(insns, ARR_SIZE(insns), opcode, &h->insn_cache); in valid_bnd()
47664 int i = insn_find(insns, ARR_SIZE(insns), opcode, &h->insn_cache); in valid_rep()
47719 int i = insn_find(insns, ARR_SIZE(insns), opcode, &h->insn_cache); in valid_repe()
47862 memcpy(MI->flat_insn->detail->x86.prefix, MI->x86_prefix, ARR_SIZE(MI->x86_prefix)); in X86_lockrep()
/external/capstone/arch/SystemZ/
DSystemZMapping.c4321 i = insn_find(insns, ARR_SIZE(insns), id, &h->insn_cache); in SystemZ_get_insn_id()
5048 for (i = 0; i < ARR_SIZE(alias_insn_names); i++) { in SystemZ_insn_name()
5117 if (r < ARR_SIZE(map)) in SystemZ_map_register()
/external/capstone/arch/PowerPC/
DPPCMapping.c6896 i = insn_find(insns, ARR_SIZE(insns), id, &h->insn_cache); in PPC_get_insn_id()
7882 for (i = 0; i < ARR_SIZE(alias_insn_names); i++) { in PPC_insn_name()
7991 if (r < ARR_SIZE(map)) in PPC_map_register()
8097 for(i = 0; i < ARR_SIZE(alias_insn_name_maps); i++) { in PPC_alias_insn()
8107 x = name2id(&insn_name_maps[1], ARR_SIZE(insn_name_maps) - 1, name); in PPC_alias_insn()
/external/capstone/arch/Mips/
DMipsMapping.c9221 i = insn_find(insns, ARR_SIZE(insns), id, &h->insn_cache); in Mips_get_insn_id()
9923 i = name2id(&insn_name_maps[1], ARR_SIZE(insn_name_maps) - 1, name); in Mips_map_insn()
10016 if (r < ARR_SIZE(map)) in Mips_map_register()
/external/capstone/arch/ARM/
DARMDisassembler.c459 for (i = 0; i < ARR_SIZE(MI->flat_insn->detail->arm.operands); i++) in _ARM_getInstruction()
701 for (i = 0; i < ARR_SIZE(MI->flat_insn->detail->arm.operands); i++) in _Thumb_getInstruction()
DARMInstPrinter.c367 for (i = 0; i < ARR_SIZE(insn_update_flgs); i++) { in ARM_post_printer()
373 for (j = 0; j < ARR_SIZE(insn->detail->regs_write); j++) { in ARM_post_printer()
DARMMapping.c13548 int i = insn_find(insns, ARR_SIZE(insns), id, &h->insn_cache); in ARM_get_insn_id()