Searched refs:AddSubReg (Results 1 – 4 of 4) sorted by relevance
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCVSXFMAMutate.cpp | 220 unsigned AddSubReg = AddendMI->getOperand(1).getSubReg(); in processBlock() local
251 MI->getOperand(3).setSubReg(AddSubReg); in processBlock()
265 MI->getOperand(2).setSubReg(AddSubReg); in processBlock()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCVSXFMAMutate.cpp | 221 unsigned AddSubReg = AddendMI->getOperand(1).getSubReg(); in processBlock() local
252 MI.getOperand(3).setSubReg(AddSubReg); in processBlock()
266 MI.getOperand(2).setSubReg(AddSubReg); in processBlock()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.cpp | 1851 static const MachineInstrBuilder &AddSubReg(const MachineInstrBuilder &MIB, in AddSubReg() function
1890 AddSubReg(MIB, DestReg, Indices[SubReg], RegState::Define, TRI); in copyPhysRegTuple()
1891 AddSubReg(MIB, SrcReg, Indices[SubReg], 0, TRI); in copyPhysRegTuple()
1892 AddSubReg(MIB, SrcReg, Indices[SubReg], getKillRegState(KillSrc), TRI); in copyPhysRegTuple()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.cpp | 2404 static const MachineInstrBuilder &AddSubReg(const MachineInstrBuilder &MIB, in AddSubReg() function
2444 AddSubReg(MIB, DestReg, Indices[SubReg], RegState::Define, TRI); in copyPhysRegTuple()
2445 AddSubReg(MIB, SrcReg, Indices[SubReg], 0, TRI); in copyPhysRegTuple()
2446 AddSubReg(MIB, SrcReg, Indices[SubReg], getKillRegState(KillSrc), TRI); in copyPhysRegTuple()
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