| /external/vixl/test/aarch32/ |
| D | test-disasm-a32.cc | 1596 COMPARE_T32(Asr(r2, r2, Operand(r2, ROR, r2)), in TEST()
1600 COMPARE_T32(Asr(r2, r2, Operand(r2, ROR, r2)), in TEST()
3259 COMPARE_T32(Asr(eq, r0, r1, 16), in TEST()
3263 COMPARE_T32(Asr(eq, r0, r1, 32), in TEST()
3267 COMPARE_T32(Asr(eq, r0, r1, 0), in TEST()
3273 COMPARE_T32(Asr(eq, r7, r7, r3), in TEST()
3277 COMPARE_T32(Asr(eq, r8, r8, r3), in TEST()
4025 CHECK_T32_16(Asr(DontCare, r0, r1, 32), "asrs r0, r1, #32\n"); in TEST()
4027 CHECK_T32_16_IT_BLOCK(Asr(DontCare, eq, r0, r1, 32), in TEST()
4031 CHECK_T32_16(Asr(DontCare, r0, r0, r1), "asrs r0, r1\n"); in TEST()
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| D | test-simulator-cond-rd-rn-operand-rm-a32.cc | 142 M(Asr) \
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| D | test-simulator-cond-rd-rn-operand-rm-t32.cc | 142 M(Asr) \
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| D | test-assembler-aarch32.cc | 785 __ Asr(r5, r1, 16); in TEST() local
813 __ Asr(r5, r1, r9); in TEST() local
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| /external/swiftshader/third_party/subzero/src/DartARM32/ |
| D | assembler_arm.h | 1059 void Asr(Register rd, Register rm, const Operand& shift_imm,
1062 void Asr(Register rd, Register rm, Register rs, Condition cond = AL);
1089 Asr(reg, reg, Operand(kSmiTagSize), cond);
1093 Asr(dst, src, Operand(kSmiTagSize), cond);
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| D | assembler_arm.cc | 2632 void Assembler::Asr(Register rd, Register rm, const Operand& shift_imm,
2657 void Assembler::Asr(Register rd, Register rm, Register rs, Condition cond) {
2681 Asr(rd, rm, Operand(31), cond); in SignFill()
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| /external/honggfuzz/examples/apache-httpd/corpus_http2/ |
| D | ed5830dff5509b2282c3253668159ae8.00003847.honggfuzz.cov | 33 �Bٚ���� -F+��������n}$1�1]b��TC��%�� Ãz�]v�v�����pS攽��?sti�Asr�VgA2g��#��Jt�^м�0�W��`�!K�Z��…
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| D | ea3c48a5b0b88c375c8c2aa32fb1d16c.0000a43d.honggfuzz.cov | 81 �Bٚ���� -F+��������n}$1�1]b��TC��%�� Ãz�]v�v�����pS攽��?sti�Asr�ѓ�L��d�����c��%d���<�;� ��?� …
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| D | 464c8308d3a6d7841287c2c9fe80c83d.0001fec7.honggfuzz.cov | 327 �Bٚ���� -F+��������n}$1�1]b��TC��%�� Ãz�]v�v�����pS攽��?sti�Asr�ѓ�L��d�����c��%d���<�;� ��?� …
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| /external/honggfuzz/examples/apache-httpd/corpus_http1/ |
| D | ed5830dff5509b2282c3253668159ae8.00003847.honggfuzz.cov | 33 �Bٚ���� -F+��������n}$1�1]b��TC��%�� Ãz�]v�v�����pS攽��?sti�Asr�VgA2g��#��Jt�^м�0�W��`�!K�Z��…
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| D | ea3c48a5b0b88c375c8c2aa32fb1d16c.0000a43d.honggfuzz.cov | 81 �Bٚ���� -F+��������n}$1�1]b��TC��%�� Ãz�]v�v�����pS攽��?sti�Asr�ѓ�L��d�����c��%d���<�;� ��?� …
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| D | 464c8308d3a6d7841287c2c9fe80c83d.0001fec7.honggfuzz.cov | 327 �Bٚ���� -F+��������n}$1�1]b��TC��%�� Ãz�]v�v�����pS攽��?sti�Asr�ѓ�L��d�����c��%d���<�;� ��?� …
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| /external/v8/src/arm64/ |
| D | macro-assembler-arm64-inl.h | 274 void TurboAssembler::Asr(const Register& rd, const Register& rn,
281 void TurboAssembler::Asr(const Register& rd, const Register& rn, in Asr() function
1045 Asr(dst, src, kSmiShift); in SmiUntag()
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| D | macro-assembler-arm64.h | 583 inline void Asr(const Register& rd, const Register& rn, unsigned shift);
584 inline void Asr(const Register& rd, const Register& rn, const Register& rm);
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| /external/v8/src/wasm/baseline/arm64/ |
| D | liftoff-assembler-arm64.h | 407 I32_SHIFTOP(i32_sar, Asr) in I32_BINOP()
416 I64_SHIFTOP(i64_sar, Asr) in I32_BINOP()
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| /external/swiftshader/third_party/subzero/src/ |
| D | IceInstARM32.h | 384 Asr, enumerator
1006 using InstARM32Asr = InstARM32ThreeAddrGPR<InstARM32::Asr>;
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| D | IceInstARM32.cpp | 3486 template class InstARM32ThreeAddrGPR<InstARM32::Asr>;
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| /external/v8/src/compiler/arm64/ |
| D | code-generator-arm64.cc | 1152 ASSEMBLE_SHIFT(Asr, 64); in AssembleArchInstruction()
1155 ASSEMBLE_SHIFT(Asr, 32); in AssembleArchInstruction()
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| /external/vixl/src/aarch32/ |
| D | macro-assembler-aarch32.h | 1229 void Asr(Condition cond, Register rd, Register rm, const Operand& operand) { in Asr() function
1246 void Asr(Register rd, Register rm, const Operand& operand) { in Asr() function
1247 Asr(al, rd, rm, operand); in Asr()
1249 void Asr(FlagsUpdate flags, in Asr() function
1256 Asr(cond, rd, rm, operand); in Asr()
1270 Asr(cond, rd, rm, operand); in Asr()
1275 void Asr(FlagsUpdate flags, in Asr() function
1279 Asr(flags, al, rd, rm, operand); in Asr()
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| /external/vixl/src/aarch64/ |
| D | macro-assembler-aarch64.h | 983 void Asr(const Register& rd, const Register& rn, unsigned shift) { in Asr() function
990 void Asr(const Register& rd, const Register& rn, const Register& rm) { in Asr() function
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| /external/vixl/test/aarch64/ |
| D | test-assembler-aarch64.cc | 10150 __ Asr(x16, x0, x1); in TEST() local
10151 __ Asr(x17, x0, x2); in TEST() local
10152 __ Asr(x18, x0, x3); in TEST() local
10153 __ Asr(x19, x0, x4); in TEST() local
10154 __ Asr(x20, x0, x5); in TEST() local
10155 __ Asr(x21, x0, x6); in TEST() local
10157 __ Asr(w22, w0, w1); in TEST() local
10158 __ Asr(w23, w0, w2); in TEST() local
10159 __ Asr(w24, w0, w3); in TEST() local
10160 __ Asr(w25, w0, w4); in TEST() local
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